Re: [PATCH v4 1/4] KVM: arm64: Correctly handle zero register during MMIO

2015-12-04 Thread Marc Zyngier
On 04/12/15 12:03, Pavel Fedin wrote: > On ARM64 register index of 31 corresponds to both zero register and SP. > However, all memory access instructions, use ZR as transfer register. SP > is used only as a base register in indirect memory addressing, or by > register-register arithmetics, which ca

[PATCH v4 1/4] KVM: arm64: Correctly handle zero register during MMIO

2015-12-04 Thread Pavel Fedin
On ARM64 register index of 31 corresponds to both zero register and SP. However, all memory access instructions, use ZR as transfer register. SP is used only as a base register in indirect memory addressing, or by register-register arithmetics, which cannot be trapped here. Correct emulation is ac