Re: [PATCH v4 17/21] KVM: ARM64: Add helper to handle PMCR register bits

2015-11-02 Thread Christopher Covington
On 10/30/2015 02:21 AM, Shannon Zhao wrote: > From: Shannon Zhao > > According to ARMv8 spec, when writing 1 to PMCR.E, all counters are > enabled by PMCNTENSET, while writing 0 to PMCR.E, all counters are > disabled. When writing 1 to PMCR.P, reset all event counters,

[PATCH v4 17/21] KVM: ARM64: Add helper to handle PMCR register bits

2015-10-30 Thread Shannon Zhao
From: Shannon Zhao According to ARMv8 spec, when writing 1 to PMCR.E, all counters are enabled by PMCNTENSET, while writing 0 to PMCR.E, all counters are disabled. When writing 1 to PMCR.P, reset all event counters, not including PMCCNTR, to zero. When writing 1 to