On Fri, Feb 08, 2013 at 12:07:36AM -0200, Marcelo Tosatti wrote:
On Thu, Feb 07, 2013 at 03:52:24PM +0200, Gleb Natapov wrote:
Its not a bad idea to have a new KVM_REQ_ bit for PIR processing (just
as the current patches do).
Without the numbers I do not see why.
KVM_REQ_EVENT already
On Thu, Feb 07, 2013 at 07:49:47PM -0200, Marcelo Tosatti wrote:
On Thu, Feb 07, 2013 at 04:01:11PM +0200, Gleb Natapov wrote:
On Wed, Feb 06, 2013 at 08:49:23PM -0200, Marcelo Tosatti wrote:
Second is that interrupt may be
reported as delivered, but it will be coalesced (possible only
On Fri, Feb 08, 2013 at 02:28:44PM +0200, Gleb Natapov wrote:
On Thu, Feb 07, 2013 at 07:49:47PM -0200, Marcelo Tosatti wrote:
On Thu, Feb 07, 2013 at 04:01:11PM +0200, Gleb Natapov wrote:
On Wed, Feb 06, 2013 at 08:49:23PM -0200, Marcelo Tosatti wrote:
Second is that interrupt may be
On Wed, Feb 06, 2013 at 10:24:06PM -0200, Marcelo Tosatti wrote:
On Wed, Feb 06, 2013 at 08:49:23PM -0200, Marcelo Tosatti wrote:
On Tue, Feb 05, 2013 at 09:32:50AM +0200, Gleb Natapov wrote:
On Mon, Feb 04, 2013 at 06:47:30PM -0200, Marcelo Tosatti wrote:
On Mon, Feb 04, 2013 at
On Wed, Feb 06, 2013 at 08:49:23PM -0200, Marcelo Tosatti wrote:
Second is that interrupt may be
reported as delivered, but it will be coalesced (possible only with the self
IPI with the same vector):
Starting condition: PIR=0, IRR=0 vcpu is in a guest mode
io thread
On Thu, Feb 07, 2013 at 04:01:11PM +0200, Gleb Natapov wrote:
On Wed, Feb 06, 2013 at 08:49:23PM -0200, Marcelo Tosatti wrote:
Second is that interrupt may be
reported as delivered, but it will be coalesced (possible only with the
self
IPI with the same vector):
Starting
On Thu, Feb 07, 2013 at 03:52:24PM +0200, Gleb Natapov wrote:
Its not a bad idea to have a new KVM_REQ_ bit for PIR processing (just
as the current patches do).
Without the numbers I do not see why.
KVM_REQ_EVENT already means... counting... many things. Its a well
defined request, to sync
On Tue, Feb 05, 2013 at 09:32:50AM +0200, Gleb Natapov wrote:
On Mon, Feb 04, 2013 at 06:47:30PM -0200, Marcelo Tosatti wrote:
On Mon, Feb 04, 2013 at 05:59:52PM -0200, Marcelo Tosatti wrote:
On Mon, Feb 04, 2013 at 07:13:01PM +0200, Gleb Natapov wrote:
On Mon, Feb 04, 2013 at 12:43:45PM
On Wed, Feb 06, 2013 at 08:49:23PM -0200, Marcelo Tosatti wrote:
On Tue, Feb 05, 2013 at 09:32:50AM +0200, Gleb Natapov wrote:
On Mon, Feb 04, 2013 at 06:47:30PM -0200, Marcelo Tosatti wrote:
On Mon, Feb 04, 2013 at 05:59:52PM -0200, Marcelo Tosatti wrote:
On Mon, Feb 04, 2013 at
According the SDM, software should not touch the IRR when target
vcpu
is
running. Instead, use locked way to access PIR. So your solution may
wrong. Then your apicv patches are broken, because they do exactly
that.
Which code is broken?
The one that updates IRR directly on the
On Tue, Feb 05, 2013 at 05:57:14AM +, Zhang, Yang Z wrote:
Marcelo Tosatti wrote on 2013-02-05:
On Mon, Feb 04, 2013 at 05:59:52PM -0200, Marcelo Tosatti wrote:
On Mon, Feb 04, 2013 at 07:13:01PM +0200, Gleb Natapov wrote:
On Mon, Feb 04, 2013 at 12:43:45PM -0200, Marcelo Tosatti wrote:
Gleb Natapov wrote on 2013-02-05:
On Tue, Feb 05, 2013 at 05:57:14AM +, Zhang, Yang Z wrote:
Marcelo Tosatti wrote on 2013-02-05:
On Mon, Feb 04, 2013 at 05:59:52PM -0200, Marcelo Tosatti wrote:
On Mon, Feb 04, 2013 at 07:13:01PM +0200, Gleb Natapov wrote:
On Mon, Feb 04, 2013 at
On Tue, Feb 05, 2013 at 10:35:55AM +, Zhang, Yang Z wrote:
Gleb Natapov wrote on 2013-02-05:
On Tue, Feb 05, 2013 at 05:57:14AM +, Zhang, Yang Z wrote:
Marcelo Tosatti wrote on 2013-02-05:
On Mon, Feb 04, 2013 at 05:59:52PM -0200, Marcelo Tosatti wrote:
On Mon, Feb 04, 2013 at
Gleb Natapov wrote on 2013-02-05:
On Tue, Feb 05, 2013 at 10:35:55AM +, Zhang, Yang Z wrote:
Gleb Natapov wrote on 2013-02-05:
On Tue, Feb 05, 2013 at 05:57:14AM +, Zhang, Yang Z wrote:
Marcelo Tosatti wrote on 2013-02-05:
On Mon, Feb 04, 2013 at 05:59:52PM -0200, Marcelo Tosatti
On Tue, Feb 05, 2013 at 10:58:28AM +, Zhang, Yang Z wrote:
Gleb Natapov wrote on 2013-02-05:
On Tue, Feb 05, 2013 at 10:35:55AM +, Zhang, Yang Z wrote:
Gleb Natapov wrote on 2013-02-05:
On Tue, Feb 05, 2013 at 05:57:14AM +, Zhang, Yang Z wrote:
Marcelo Tosatti wrote on
Gleb Natapov wrote on 2013-02-05:
On Tue, Feb 05, 2013 at 10:58:28AM +, Zhang, Yang Z wrote:
Gleb Natapov wrote on 2013-02-05:
On Tue, Feb 05, 2013 at 10:35:55AM +, Zhang, Yang Z wrote:
Gleb Natapov wrote on 2013-02-05:
On Tue, Feb 05, 2013 at 05:57:14AM +, Zhang, Yang Z wrote:
On Tue, Feb 05, 2013 at 01:26:42PM +, Zhang, Yang Z wrote:
Gleb Natapov wrote on 2013-02-05:
On Tue, Feb 05, 2013 at 10:58:28AM +, Zhang, Yang Z wrote:
Gleb Natapov wrote on 2013-02-05:
On Tue, Feb 05, 2013 at 10:35:55AM +, Zhang, Yang Z wrote:
Gleb Natapov wrote on
Gleb Natapov wrote on 2013-02-05:
On Tue, Feb 05, 2013 at 01:26:42PM +, Zhang, Yang Z wrote:
Gleb Natapov wrote on 2013-02-05:
On Tue, Feb 05, 2013 at 10:58:28AM +, Zhang, Yang Z wrote:
Gleb Natapov wrote on 2013-02-05:
On Tue, Feb 05, 2013 at 10:35:55AM +, Zhang, Yang Z wrote:
On Tue, Feb 05, 2013 at 01:40:44PM +, Zhang, Yang Z wrote:
Gleb Natapov wrote on 2013-02-05:
On Tue, Feb 05, 2013 at 01:26:42PM +, Zhang, Yang Z wrote:
Gleb Natapov wrote on 2013-02-05:
On Tue, Feb 05, 2013 at 10:58:28AM +, Zhang, Yang Z wrote:
Gleb Natapov wrote on
Sorry for the late response.
Marcelo Tosatti wrote on 2013-02-04:
On Thu, Jan 31, 2013 at 03:55:56PM +0200, Gleb Natapov wrote:
On Thu, Jan 31, 2013 at 11:44:43AM -0200, Marcelo Tosatti wrote:
On Thu, Jan 31, 2013 at 03:38:37PM +0200, Gleb Natapov wrote:
On Thu, Jan 31, 2013 at 11:32:45AM
This patch is too old. Some issues you point out already fixed in v2 patch.
Please review v2 patch and give some comments.
Gleb Natapov wrote on 2013-01-31:
On Thu, Dec 13, 2012 at 03:29:40PM +0800, Yang Zhang wrote:
From: Yang Zhang yang.z.zh...@intel.com
Posted Interrupt allows APIC
On Sun, Feb 03, 2013 at 10:57:00PM -0200, Marcelo Tosatti wrote:
On Thu, Jan 31, 2013 at 03:55:56PM +0200, Gleb Natapov wrote:
On Thu, Jan 31, 2013 at 11:44:43AM -0200, Marcelo Tosatti wrote:
On Thu, Jan 31, 2013 at 03:38:37PM +0200, Gleb Natapov wrote:
On Thu, Jan 31, 2013 at 11:32:45AM
On Mon, Feb 04, 2013 at 11:55:53AM +0200, Gleb Natapov wrote:
On Sun, Feb 03, 2013 at 10:57:00PM -0200, Marcelo Tosatti wrote:
On Thu, Jan 31, 2013 at 03:55:56PM +0200, Gleb Natapov wrote:
On Thu, Jan 31, 2013 at 11:44:43AM -0200, Marcelo Tosatti wrote:
On Thu, Jan 31, 2013 at 03:38:37PM
On Mon, Feb 04, 2013 at 12:43:45PM -0200, Marcelo Tosatti wrote:
Any example how software relies on such two-interrupts-queued-in-IRR/ISR
behaviour?
Don't know about guests, but KVM relies on it to detect interrupt
coalescing. So if interrupt is set in IRR but not in PIR interrupt will
On Mon, Feb 04, 2013 at 07:13:01PM +0200, Gleb Natapov wrote:
On Mon, Feb 04, 2013 at 12:43:45PM -0200, Marcelo Tosatti wrote:
Any example how software relies on such
two-interrupts-queued-in-IRR/ISR behaviour?
Don't know about guests, but KVM relies on it to detect interrupt
On Mon, Feb 04, 2013 at 05:59:52PM -0200, Marcelo Tosatti wrote:
On Mon, Feb 04, 2013 at 07:13:01PM +0200, Gleb Natapov wrote:
On Mon, Feb 04, 2013 at 12:43:45PM -0200, Marcelo Tosatti wrote:
Any example how software relies on such
two-interrupts-queued-in-IRR/ISR behaviour?
Marcelo Tosatti wrote on 2013-02-05:
On Mon, Feb 04, 2013 at 05:59:52PM -0200, Marcelo Tosatti wrote:
On Mon, Feb 04, 2013 at 07:13:01PM +0200, Gleb Natapov wrote:
On Mon, Feb 04, 2013 at 12:43:45PM -0200, Marcelo Tosatti wrote:
Any example how software relies on such
On Mon, Feb 04, 2013 at 06:47:30PM -0200, Marcelo Tosatti wrote:
On Mon, Feb 04, 2013 at 05:59:52PM -0200, Marcelo Tosatti wrote:
On Mon, Feb 04, 2013 at 07:13:01PM +0200, Gleb Natapov wrote:
On Mon, Feb 04, 2013 at 12:43:45PM -0200, Marcelo Tosatti wrote:
Any example how software
On Thu, Jan 31, 2013 at 03:55:56PM +0200, Gleb Natapov wrote:
On Thu, Jan 31, 2013 at 11:44:43AM -0200, Marcelo Tosatti wrote:
On Thu, Jan 31, 2013 at 03:38:37PM +0200, Gleb Natapov wrote:
On Thu, Jan 31, 2013 at 11:32:45AM -0200, Marcelo Tosatti wrote:
On Thu, Jan 31, 2013 at 11:43:48AM
On Thu, Dec 13, 2012 at 03:29:40PM +0800, Yang Zhang wrote:
From: Yang Zhang yang.z.zh...@intel.com
Posted Interrupt allows APIC interrupts to inject into guest directly
without any vmexit.
- When delivering a interrupt to guest, if target vcpu is running,
update Posted-interrupt
On Wed, Jan 30, 2013 at 09:03:11PM -0200, Marcelo Tosatti wrote:
Posted interrupt patch:
2) Must move IN_GUEST_MODE assignment after local_irq_disable, in
vcpu_enter_guest function. Otherwise:
cpu0 vcpu1-cpu1
vcpu-mode = IN_GUEST_MODE
if
On Thu, Jan 31, 2013 at 11:43:48AM +0200, Gleb Natapov wrote:
On Wed, Jan 30, 2013 at 09:03:11PM -0200, Marcelo Tosatti wrote:
Posted interrupt patch:
2) Must move IN_GUEST_MODE assignment after local_irq_disable, in
vcpu_enter_guest function. Otherwise:
cpu0
On Thu, Jan 31, 2013 at 11:32:45AM -0200, Marcelo Tosatti wrote:
On Thu, Jan 31, 2013 at 11:43:48AM +0200, Gleb Natapov wrote:
On Wed, Jan 30, 2013 at 09:03:11PM -0200, Marcelo Tosatti wrote:
Posted interrupt patch:
2) Must move IN_GUEST_MODE assignment after local_irq_disable, in
On Thu, Jan 31, 2013 at 03:38:37PM +0200, Gleb Natapov wrote:
On Thu, Jan 31, 2013 at 11:32:45AM -0200, Marcelo Tosatti wrote:
On Thu, Jan 31, 2013 at 11:43:48AM +0200, Gleb Natapov wrote:
On Wed, Jan 30, 2013 at 09:03:11PM -0200, Marcelo Tosatti wrote:
Posted interrupt patch:
2)
On Thu, Jan 31, 2013 at 11:44:43AM -0200, Marcelo Tosatti wrote:
On Thu, Jan 31, 2013 at 03:38:37PM +0200, Gleb Natapov wrote:
On Thu, Jan 31, 2013 at 11:32:45AM -0200, Marcelo Tosatti wrote:
On Thu, Jan 31, 2013 at 11:43:48AM +0200, Gleb Natapov wrote:
On Wed, Jan 30, 2013 at 09:03:11PM
On Fri, Jan 25, 2013 at 12:40:21AM +, Zhang, Yang Z wrote:
Marcelo Tosatti wrote on 2013-01-25:
On Thu, Dec 13, 2012 at 03:29:40PM +0800, Yang Zhang wrote:
From: Yang Zhang yang.z.zh...@intel.com
Posted Interrupt allows APIC interrupts to inject into guest directly
without any
On Wed, Jan 30, 2013 at 09:03:11PM -0200, Marcelo Tosatti wrote:
On Fri, Jan 25, 2013 at 12:40:21AM +, Zhang, Yang Z wrote:
Marcelo Tosatti wrote on 2013-01-25:
On Thu, Dec 13, 2012 at 03:29:40PM +0800, Yang Zhang wrote:
From: Yang Zhang yang.z.zh...@intel.com
Posted Interrupt
On Wed, Jan 30, 2013 at 09:03:11PM -0200, Marcelo Tosatti wrote:
Some comments:
Enable ack-on-exit feature patch:
1) Value of register VM_EXIT_INTR_INFO is available at
vmx-exit_intr_info. See commit
887864758580c80710947c38a4692032163777df.
It is available only for
On Thu, Dec 13, 2012 at 03:29:40PM +0800, Yang Zhang wrote:
From: Yang Zhang yang.z.zh...@intel.com
Posted Interrupt allows APIC interrupts to inject into guest directly
without any vmexit.
- When delivering a interrupt to guest, if target vcpu is running,
update Posted-interrupt
Marcelo Tosatti wrote on 2013-01-25:
On Thu, Dec 13, 2012 at 03:29:40PM +0800, Yang Zhang wrote:
From: Yang Zhang yang.z.zh...@intel.com
Posted Interrupt allows APIC interrupts to inject into guest directly
without any vmexit.
- When delivering a interrupt to guest, if target vcpu is
On Thu, Dec 13, 2012 at 03:29:40PM +0800, Yang Zhang wrote:
From: Yang Zhang yang.z.zh...@intel.com
Posted Interrupt allows APIC interrupts to inject into guest directly
without any vmexit.
- When delivering a interrupt to guest, if target vcpu is running,
update Posted-interrupt
Marcelo Tosatti wrote on 2013-01-23:
On Thu, Dec 13, 2012 at 03:29:40PM +0800, Yang Zhang wrote:
From: Yang Zhang yang.z.zh...@intel.com
Posted Interrupt allows APIC interrupts to inject into guest directly
without any vmexit.
- When delivering a interrupt to guest, if target vcpu is
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