-Original Message-
From: Wood Scott-B07421
Sent: Thursday, July 18, 2013 10:48 PM
To: Bhushan Bharat-R65777
Cc: kvm-...@vger.kernel.org; kvm@vger.kernel.org; ag...@suse.de; Bhushan
Bharat-
R65777
Subject: Re: [PATCH 2/2 v2] kvm: powerpc: set cache coherency only for kernel
;
kvm@vger.kernel.org; Bhushan
Bharat-R65777
Subject: Re: [PATCH 2/2 v2] kvm: powerpc: set cache coherency
only
for kernel
managed pages
On 07/18/2013 12:32:18 PM, Alexander Graf wrote:
On 18.07.2013, at 19:17, Scott Wood wrote:
On 07/18/2013 08:19:03 AM
Bharat-R65777; kvm-...@vger.kernel.org;
kvm@vger.kernel.org; Bhushan
Bharat-R65777
Subject: Re: [PATCH 2/2 v2] kvm: powerpc: set cache coherency
only
for kernel
managed pages
On 07/18/2013 12:32:18 PM, Alexander Graf wrote:
On 18.07.2013, at 19:17, Scott
-...@vger.kernel.org;
kvm@vger.kernel.org
Subject: Re: [PATCH 2/2 v2] kvm: powerpc: set cache coherency
only
for kernel
managed pages
On 07/21/2013 11:39:45 PM, Bhushan Bharat-R65777 wrote:
-Original Message-
From: Wood Scott-B07421
Sent: Thursday
v2] kvm: powerpc: set cache coherency only
for kernel
managed pages
On 07/18/2013 08:19:03 AM, Bharat Bhushan wrote:
If there is a struct page for the requested mapping then it's
normal
RAM and the mapping is set to M bit (coherent, cacheable)
otherwise
this is treated as I/O and we
: Wood Scott-B07421; Alexander Graf; kvm-...@vger.kernel.org;
kvm@vger.kernel.org
Subject: Re: [PATCH 2/2 v2] kvm: powerpc: set cache coherency
only
for kernel
managed pages
On 07/21/2013 11:39:45 PM, Bhushan Bharat-R65777 wrote:
-Original Message
-Original Message-
From: Wood Scott-B07421
Sent: Thursday, July 18, 2013 10:48 PM
To: Bhushan Bharat-R65777
Cc: kvm-ppc@vger.kernel.org; k...@vger.kernel.org; ag...@suse.de; Bhushan
Bharat-
R65777
Subject: Re: [PATCH 2/2 v2] kvm: powerpc: set cache coherency only for kernel
@vger.kernel.org;
k...@vger.kernel.org; Bhushan
Bharat-R65777
Subject: Re: [PATCH 2/2 v2] kvm: powerpc: set cache coherency
only
for kernel
managed pages
On 07/18/2013 12:32:18 PM, Alexander Graf wrote:
On 18.07.2013, at 19:17, Scott Wood wrote:
On 07/18/2013 08:19:03 AM
Bharat-R65777; kvm-ppc@vger.kernel.org;
k...@vger.kernel.org; Bhushan
Bharat-R65777
Subject: Re: [PATCH 2/2 v2] kvm: powerpc: set cache coherency
only
for kernel
managed pages
On 07/18/2013 12:32:18 PM, Alexander Graf wrote:
On 18.07.2013, at 19:17
-ppc@vger.kernel.org;
k...@vger.kernel.org
Subject: Re: [PATCH 2/2 v2] kvm: powerpc: set cache coherency
only
for kernel
managed pages
On 07/21/2013 11:39:45 PM, Bhushan Bharat-R65777 wrote:
-Original Message-
From: Wood Scott-B07421
Sent: Thursday
v2] kvm: powerpc: set cache coherency only
for kernel
managed pages
On 07/18/2013 12:32:18 PM, Alexander Graf wrote:
On 18.07.2013, at 19:17, Scott Wood wrote:
On 07/18/2013 08:19:03 AM, Bharat Bhushan wrote:
Likewise, we want to make sure this matches the host entry
: Re: [PATCH 2/2 v2] kvm: powerpc: set cache coherency only
for kernel
managed pages
On 07/18/2013 12:32:18 PM, Alexander Graf wrote:
On 18.07.2013, at 19:17, Scott Wood wrote:
On 07/18/2013 08:19:03 AM, Bharat Bhushan wrote:
Likewise, we want to make sure
v2] kvm: powerpc: set cache coherency only
for kernel
managed pages
On 07/18/2013 12:32:18 PM, Alexander Graf wrote:
On 18.07.2013, at 19:17, Scott Wood wrote:
On 07/18/2013 08:19:03 AM, Bharat Bhushan wrote:
Likewise, we want to make sure this matches the host entry
Subject: Re: [PATCH 2/2 v2] kvm: powerpc: set cache coherency only
for kernel
managed pages
On 07/18/2013 12:32:18 PM, Alexander Graf wrote:
On 18.07.2013, at 19:17, Scott Wood wrote:
On 07/18/2013 08:19:03 AM, Bharat Bhushan wrote:
Likewise, we want to make sure
-Original Message-
From: Wood Scott-B07421
Sent: Thursday, July 18, 2013 11:09 PM
To: Alexander Graf
Cc: Bhushan Bharat-R65777; kvm-...@vger.kernel.org; kvm@vger.kernel.org;
Bhushan
Bharat-R65777
Subject: Re: [PATCH 2/2 v2] kvm: powerpc: set cache coherency only for kernel
-Original Message-
From: Wood Scott-B07421
Sent: Thursday, July 18, 2013 11:09 PM
To: Alexander Graf
Cc: Bhushan Bharat-R65777; kvm-ppc@vger.kernel.org; k...@vger.kernel.org;
Bhushan
Bharat-R65777
Subject: Re: [PATCH 2/2 v2] kvm: powerpc: set cache coherency only for kernel
On 18.07.2013, at 15:19, Bharat Bhushan wrote:
If there is a struct page for the requested mapping then it's
normal RAM and the mapping is set to M bit (coherent, cacheable)
otherwise this is treated as I/O and we set I + G (cache inhibited,
guarded)
This helps setting proper TLB
Subject: Re: [PATCH 2/2 v2] kvm: powerpc: set cache coherency only for kernel
managed pages
On 18.07.2013, at 15:19, Bharat Bhushan wrote:
If there is a struct page for the requested mapping then it's normal
RAM and the mapping is set to M bit (coherent, cacheable) otherwise
@vger.kernel.org; Wood Scott-B07421; Bhushan
Bharat-R65777
Subject: Re: [PATCH 2/2 v2] kvm: powerpc: set cache coherency only for kernel
managed pages
On 18.07.2013, at 15:19, Bharat Bhushan wrote:
If there is a struct page for the requested mapping then it's normal
RAM and the mapping is set
On 07/18/2013 08:19:03 AM, Bharat Bhushan wrote:
If there is a struct page for the requested mapping then it's
normal RAM and the mapping is set to M bit (coherent, cacheable)
otherwise this is treated as I/O and we set I + G (cache
inhibited, guarded)
This helps setting proper TLB mapping
On 18.07.2013, at 19:17, Scott Wood wrote:
On 07/18/2013 08:19:03 AM, Bharat Bhushan wrote:
If there is a struct page for the requested mapping then it's
normal RAM and the mapping is set to M bit (coherent, cacheable)
otherwise this is treated as I/O and we set I + G (cache inhibited,
On 07/18/2013 12:32:18 PM, Alexander Graf wrote:
On 18.07.2013, at 19:17, Scott Wood wrote:
On 07/18/2013 08:19:03 AM, Bharat Bhushan wrote:
Likewise, we want to make sure this matches the host entry.
Unfortunately, this is a bit of a mess already. 64-bit booke appears
to always set
On 18.07.2013, at 15:19, Bharat Bhushan wrote:
If there is a struct page for the requested mapping then it's
normal RAM and the mapping is set to M bit (coherent, cacheable)
otherwise this is treated as I/O and we set I + G (cache inhibited,
guarded)
This helps setting proper TLB
...@vger.kernel.org; Wood Scott-B07421; Bhushan
Bharat-R65777
Subject: Re: [PATCH 2/2 v2] kvm: powerpc: set cache coherency only for kernel
managed pages
On 18.07.2013, at 15:19, Bharat Bhushan wrote:
If there is a struct page for the requested mapping then it's normal
RAM and the mapping is set
On 18.07.2013, at 19:17, Scott Wood wrote:
On 07/18/2013 08:19:03 AM, Bharat Bhushan wrote:
If there is a struct page for the requested mapping then it's
normal RAM and the mapping is set to M bit (coherent, cacheable)
otherwise this is treated as I/O and we set I + G (cache inhibited,
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