Avi Kivity wrote:
I'm guessing the problem is due to the second instruction. We don't
clear the 'blocked by interrupt shadow' flag when we emulate, which
extends interrupt shadow by one more instruction. If the instruction
sequence is 'sti hlt' we end in an inconsistent state.
Ah, and
H. Peter Anvin wrote:
Avi Kivity wrote:
I'm guessing the problem is due to the second instruction. We don't
clear the 'blocked by interrupt shadow' flag when we emulate, which
extends interrupt shadow by one more instruction. If the instruction
sequence is 'sti hlt' we end in an
On Tue, Apr 07, 2009 at 09:14:58PM -0700, H. Peter Anvin wrote:
Glauber Costa wrote:
While in real mode, sti does not block interrupts from the subsequent
instruction. This is stated at Intel SDM Volume 2b, page 4-432
I don't see how you're getting that idea from the STI documentation --
Glauber Costa wrote:
While in real mode, sti does not block interrupts from the subsequent
instruction. This is stated at Intel SDM Volume 2b, page 4-432
I don't see how you're getting that idea from the STI documentation --
and I am quite sure that that is not the case. Quite on the contrary.
H. Peter Anvin wrote:
Glauber Costa wrote:
While in real mode, sti does not block interrupts from the subsequent
instruction. This is stated at Intel SDM Volume 2b, page 4-432
I don't see how you're getting that idea from the STI documentation --
and I am quite sure that that is not
