On Tue, Jan 31, 2012 at 02:50:07PM +0100, Peter Zijlstra wrote:
On Tue, 2012-01-31 at 15:47 +0200, Avi Kivity wrote:
They really need to return quickly to userspace, and they really need to
perform some operation between rcu_assign_pointer() and returning, so no.
Bugger :/
Michael Tokarev mjt at tls.msk.ru writes:
You need to understand how to (pre-)configure networking
for qemu (pre- if you want to run it as non-root), this
is described in the users guide and in a lot of howtos
all around the 'net.
/mjt
Thanks! I was able to find the needed info to
On 01/31/2012 04:05 PM, Jan Kiszka wrote:
On 2012-01-31 22:02, Anthony Liguori wrote:
On 01/31/2012 11:41 AM, Jan Kiszka wrote:
In legacy mode, the HPET suppresses the RTC interrupt delivery via IRQ
8 but keeps track of the RTC output level and applies it when legacy
mode is turned off again.
On 2012-01-31 23:38, Anthony Liguori wrote:
On 01/31/2012 04:05 PM, Jan Kiszka wrote:
On 2012-01-31 22:02, Anthony Liguori wrote:
On 01/31/2012 11:41 AM, Jan Kiszka wrote:
In legacy mode, the HPET suppresses the RTC interrupt delivery via IRQ
8 but keeps track of the RTC output level and
On 01/31/2012 04:00 PM, Jan Kiszka wrote:
On 2012-01-31 21:49, Anthony Liguori wrote:
On 01/31/2012 11:41 AM, Jan Kiszka wrote:
Convert the PC speaker device to a qdev ISA model. Move the public
interface to a dedicated header file at this chance.
Signed-off-by: Jan
On 2012-01-31 23:40, Anthony Liguori wrote:
On 01/31/2012 04:00 PM, Jan Kiszka wrote:
On 2012-01-31 21:49, Anthony Liguori wrote:
On 01/31/2012 11:41 AM, Jan Kiszka wrote:
Convert the PC speaker device to a qdev ISA model. Move the public
interface to a dedicated header file at this chance.
On 01/31/2012 04:48 PM, Jan Kiszka wrote:
On 2012-01-31 23:40, Anthony Liguori wrote:
Why is what's in the tree not usable?
Just don't do pcspk_init as a static inline (which is not that nice to
do anyway) and you don't need to worry about the availability of an
accessor.
The current pattern
Dear All,
I am using version 1.0 of qemu-kvm along with 3.2.x host+guest kernels on an
X86_64 server. I was unable to trigger a hotplug of a vCPU from the qemu's
monitor prompt (tripped over an assertion in qemu).
Tried to look through the recent archives and noticed a couple of proposed
On Tue, Jan 31, 2012 at 8:29 PM, Orit Wasserman owass...@redhat.com wrote:
On 01/31/2012 05:35 AM, Zhi Yong Wu wrote:
HI,
Can anyone let me know know the difference between VMXON region and
VMCS region? relationship?
There is no relationship between them:
VMXON region is created per
Might happen when hardware virtualization is not supported.
Reported-by: Ingo Molnar mi...@elte.hu
Signed-off-by: Sasha Levin levinsasha...@gmail.com
---
tools/kvm/builtin-run.c |4
1 files changed, 4 insertions(+), 0 deletions(-)
diff --git a/tools/kvm/builtin-run.c
On Tue, Jan 31, 2012 at 05:34:37PM +1100, Matt Evans wrote:
The generated DT is the bare minimum structure required for SPAPR (on which
subsequent patches for VIO, XICS, PCI etc. will build); root node, cpus,
memory.
The DT contains CPU-specific configuration; a very simple 'cpu info'
On Tue, Jan 31, 2012 at 05:34:41PM +1100, Matt Evans wrote:
This provides the PCI bridge, definitions for the address layout of the
windows
and wires in IRQs. Once PCI devices are all registered, they are enumerated
and
DT nodes generated for each.
Signed-off-by: Matt Evans
On 01/02/12 14:39, David Gibson wrote:
On Tue, Jan 31, 2012 at 05:34:37PM +1100, Matt Evans wrote:
The generated DT is the bare minimum structure required for SPAPR (on which
subsequent patches for VIO, XICS, PCI etc. will build); root node, cpus,
memory.
The DT contains CPU-specific
On 01/02/12 14:40, David Gibson wrote:
On Tue, Jan 31, 2012 at 05:34:41PM +1100, Matt Evans wrote:
This provides the PCI bridge, definitions for the address layout of the
windows
and wires in IRQs. Once PCI devices are all registered, they are enumerated
and
DT nodes generated for each.
On Tue, 2012-01-31 at 14:13 -0700, Alex Williamson wrote:
On Tue, 2012-01-31 at 14:45 +0200, Avi Kivity wrote:
On 01/28/2012 04:21 PM, Alex Williamson wrote:
Stop using compatibility mode and at the same time fix available
access sizes. The PCI spec indicates that the MSI-X table may
This patch series introduces a new infrastructure to the driver core
for representing device isolation groups. That is, groups of
devices which can be isolated in such a way that the rest of the
system can be protected from them, even in the presence of userspace
or a guest OS directly driving
This patch adds code to the code for the powernv platform to create
and populate isolation groups on hardware using the p7ioc (aka IODA) PCI host
bridge used on some IBM POWER systems.
Signed-off-by: Alexey Kardashevskiy a...@ozlabs.ru
Signed-off-by: David Gibson da...@gibson.dropbear.id.au
---
This patch adds code to the code for the powernv platform to create
and populate isolation groups on hardware using the p5ioc2 PCI host
bridge used on some IBM POWER systems.
Signed-off-by: Alexey Kardashevskiy a...@ozlabs.ru
Signed-off-by: David Gibson da...@gibson.dropbear.id.au
---
In order to safely drive a device with a userspace driver, or to pass
it through to a guest system, we must first make sure that the device
is isolated in such a way that it cannot interfere with other devices
on the system. This isolation is only available on some systems and
will generally
This series enables better runtime MSI-X table support so
that we can track vector updates for routing, enabling
guest interrupt smp_affinity, as well as vectors setup
after the MSI-X PCI capability is enabled, allowing for
MSI-X on devices assigned to FreeBSD guests. Thanks,
Alex
v2:
-
Signed-off-by: Alex Williamson alex.william...@redhat.com
---
hw/device-assignment.c |8
1 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/hw/device-assignment.c b/hw/device-assignment.c
index 7f4a5ec..d82f274 100644
--- a/hw/device-assignment.c
+++
Stop using compatibility mode and at the same time fix available
access sizes. The PCI spec indicates that the MSI-X table may
only be accessed as DWORD or QWORD. 8-byte accesses are still
getting split in exec.c, but this will pre-enable it.
Signed-off-by: Alex Williamson
This makes access much easier.
Signed-off-by: Alex Williamson alex.william...@redhat.com
---
hw/device-assignment.c | 55 ++--
hw/device-assignment.h |9 +++-
2 files changed, 33 insertions(+), 31 deletions(-)
diff --git
We'll use this in a few more places for reseting the MSI-X
table and ignoring certain accesses, so it seems worth two
bytes to not recalculate all the time.
Signed-off-by: Alex Williamson alex.william...@redhat.com
---
hw/device-assignment.c | 17 +++--
hw/device-assignment.h |
Per the PCI spec, all vectors should be masked at handoff.
Signed-off-by: Alex Williamson alex.william...@redhat.com
---
hw/device-assignment.c | 20 +++-
1 files changed, 19 insertions(+), 1 deletions(-)
diff --git a/hw/device-assignment.c b/hw/device-assignment.c
index
We still only initialize the number used in the host. This lets
us do direct access based on MSI-X table offset on write without
needing to translate between physical vector space and initalized
vector space. It's expected that guests will typically use the
majority of the available vectors, so
We've already got it defined, use it.
Signed-off-by: Alex Williamson alex.william...@redhat.com
---
hw/device-assignment.c |6 +++---
1 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/hw/device-assignment.c b/hw/device-assignment.c
index fe10a23..71685ee 100644
---
When a guest enables MSI-X in PCI configuration space we walk
through the MSI-X vector table trying to guess what might get
used. We have to guess because we don't do anything with
writes to the vector table, so we look for clues ahead of time
to pre-enable the vectors we think will be used.
On Tue, 31 Jan 2012, Sasha Levin wrote:
Might happen when hardware virtualization is not supported.
Reported-by: Ingo Molnar mi...@elte.hu
Signed-off-by: Sasha Levin levinsasha...@gmail.com
---
tools/kvm/builtin-run.c |4
1 files changed, 4 insertions(+), 0 deletions(-)
diff --git
Hi all,
Started reading through the git tree at
git://github.com/virtualopensystems/linux-kvm-arm.git (kvm-a15-v6-stage
branch), and noticed some things. I'm learning ARM as I go, so
apologies in advance for any dumb questions.
Psuedo-quoted below:
On Wed, Feb 01, 2012 at 09:05:34AM +0200, Pekka Enberg wrote:
On Tue, 31 Jan 2012, Sasha Levin wrote:
Might happen when hardware virtualization is not supported.
Reported-by: Ingo Molnar mi...@elte.hu
Signed-off-by: Sasha Levin levinsasha...@gmail.com
---
tools/kvm/builtin-run.c |4
On Tue, Jan 31, 2012 at 10:33:14PM -0700, Alex Williamson wrote:
When a guest enables MSI-X in PCI configuration space we walk
through the MSI-X vector table trying to guess what might get
used. We have to guess because we don't do anything with
writes to the vector table, so we look for
On Tue, Jan 31, 2012 at 10:33:14PM -0700, Alex Williamson wrote:
@@ -1438,11 +1448,71 @@ static void msix_mmio_write(void *opaque,
target_phys_addr_t addr,
uint64_t val, unsigned size)
{
AssignedDevice *adev = opaque;
+PCIDevice *pdev = adev-dev;
+
On Wed, 1 Feb 2012, Cyrill Gorcunov wrote:
I suspect we need something like
---
tools/kvm/builtin-run.c |5 +
tools/kvm/kvm.c |2 +-
2 files changed, 6 insertions(+), 1 deletion(-)
Index: linux-2.6.git/tools/kvm/builtin-run.c
On Wed, Feb 01, 2012 at 09:26:00AM +0200, Pekka Enberg wrote:
On Wed, 1 Feb 2012, Cyrill Gorcunov wrote:
I suspect we need something like
---
tools/kvm/builtin-run.c |5 +
tools/kvm/kvm.c |2 +-
2 files changed, 6 insertions(+), 1 deletion(-)
Index:
On 01/31/2012 09:49 PM, Anthony Liguori wrote:
+DEFINE_PROP_HEX32(iobase, PCSpkState, iobase, -1),
+DEFINE_PROP_PTR(pit, PCSpkState, pit),
Please don't introduce a pointer property here. They cannot be used in
a meaningful way in qdev. Why not register a linkTYPE_PIT in
Hello Paolo,
On Mon, Jan 30, 2012 at 10:48 AM, Paolo Bonzini pbonz...@redhat.com wrote:
On 01/20/2012 05:45 PM, Paolo Bonzini wrote:
This is the first implementation of the virtio-scsi driver, a virtual
HBA that will be supported by KVM. It implements a subset of the spec,
in particular it
On 31 Jan 2012, at 18:59, Pekka Enberg wrote:
On Tue, Jan 31, 2012 at 8:34 AM, Matt Evans m...@ozlabs.org wrote:
+static struct cpu_info cpu_power7_info = {
+ POWER7,
+ power7_page_sizes_prop, sizeof(power7_page_sizes_prop),
+ power7_segment_sizes_prop,
On 31 Jan 2012, at 19:11, Pekka Enberg wrote:
On Tue, Jan 31, 2012 at 8:34 AM, Matt Evans m...@ozlabs.org wrote:
+#define DEBUG_SPAPR_HCALLS
I suppose this shouldn't be defined by default?
Well, I had a bit of a debate about it. I left it on as it is actually
interesting whilst
On 01/02/12 14:40, David Gibson wrote:
On Tue, Jan 31, 2012 at 05:34:41PM +1100, Matt Evans wrote:
This provides the PCI bridge, definitions for the address layout of the
windows
and wires in IRQs. Once PCI devices are all registered, they are enumerated
and
DT nodes generated for each.
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