On 08/17/2012 03:36 PM, Richard Davies wrote:
Hi Avi,
Thanks to you and several others for offering help. We will work with Avi at
first, but are grateful for all the other offers of help. We have a number
of other qemu-related projects which we'd be interested in getting done, and
will get
On Sat, Aug 18, 2012 at 05:36:26PM -0700, Nicholas A. Bellinger wrote:
On Sat, 2012-08-18 at 22:12 +0300, Michael S. Tsirkin wrote:
On Tue, Aug 14, 2012 at 01:31:14PM -0700, Nicholas A. Bellinger wrote:
On Mon, 2012-08-13 at 11:53 +0300, Michael S. Tsirkin wrote:
On Mon, Aug 13, 2012 at
Avi Kivity wrote:
Richard Davies wrote:
The host in question has 128GB RAM and dual AMD Opteron 6128 (16 cores
total). It is running kernel 3.5.1 and qemu-kvm 1.1.1.
In this morning's test, we have 3 guests, all booting Windows with 40GB RAM
and 8 cores each (we have seen small VMs go
On Sat, Aug 18, 2012 at 01:25:05AM +0200, Bernd Schubert wrote:
On 08/12/2012 01:45 PM, Michael S. Tsirkin wrote:
On Mon, Jul 30, 2012 at 08:08:31PM +0200, Bernd Schubert wrote:
On 07/30/2012 07:33 PM, Bernd Schubert wrote:
Hello Stefan,
Stefan Hajnoczi stefanha at gmail.com writes:
On 08/19/2012 05:56 AM, Andi Kleen wrote:
From: Andi Kleen a...@linux.intel.com
The VMX code references a local assembler label between two inline
assembler statements. This assumes they both end up in the same
assembler files. In some experimental builds of gcc this is not
necessarily
On 08/17/2012 08:29 PM, Marcelo Tosatti wrote:
On Thu, Aug 16, 2012 at 05:54:49PM +0300, Avi Kivity wrote:
Instead of populating the the entire register file, read in registers
as they are accessed, and write back only the modified ones. This
saves a VMREAD and VMWRITE on Intel (for rsp,
On 19 August 2012 05:34, Christoffer Dall c.d...@virtualopensystems.com wrote:
On Thu, Aug 16, 2012 at 2:25 PM, Alexander Graf ag...@suse.de wrote:
A single hva can have multiple gpas mapped, no? At least that's what I
gathered
from the discussion about my attempt to a function similar to
On 08/17/2012 09:39 PM, Marcelo Tosatti wrote:
Yes. Well, Avi mentioned earlier that there are users for change of GPA
base. But, if my understanding is correct, the code that emulates
change of BAR in QEMU is:
/* now do the real mapping */
if (r-addr != PCI_BAR_UNMAPPED)
On 08/17/2012 06:04 PM, Jan Kiszka wrote:
Can anyone imagine that such a barrier may actually be required? If it
is currently possible that env-stop is evaluated before we called into
sigtimedwait in qemu_kvm_eat_signals, then we could actually eat the
signal without properly processing its
On 08/17/2012 01:55 PM, Jan Kiszka wrote:
On 2012-07-10 12:41, Jan Kiszka wrote:
On 2012-07-02 11:07, Avi Kivity wrote:
On 06/29/2012 07:37 PM, Jan Kiszka wrote:
Instead of flushing pending coalesced MMIO requests on every vmexit,
this provides a mechanism to selectively flush when memory
On 08/17/2012 09:56 AM, Peter Zijlstra wrote:
On Fri, 2012-08-17 at 09:40 +0800, Yan, Zheng wrote:
Peter, do I need to submit a patch disables uncore on virtualized CPU?
I think Avi prefers the method where KVM 'fakes' the MSRs and we have to
detect if the MSRs actually work or not.
s/we
The sub-register used to access the stack (sp, esp, or rsp) is not
determined by the address size attribute like other memory references,
but by the stack segment's B bit (if not in x86_64 mode).
Fix by using the existing stack_mask() to figure out the correct mask.
This long-existing bug was
On 08/19/2012 12:38 PM, Peter Maydell wrote:
On 19 August 2012 05:34, Christoffer Dall c.d...@virtualopensystems.com
wrote:
On Thu, Aug 16, 2012 at 2:25 PM, Alexander Graf ag...@suse.de wrote:
A single hva can have multiple gpas mapped, no? At least that's what I
gathered
from the
On 08/17/2012 03:36 PM, Richard Davies wrote:
Hi Avi,
Thanks to you and several others for offering help. We will work with Avi at
first, but are grateful for all the other offers of help. We have a number
of other qemu-related projects which we'd be interested in getting done, and
will get
ipxe contains the following snippet:
/* Copy ROM to image source PMM block */
pushw %es
xorw%ax, %ax
movw%ax, %es
movl%esi, %edi
xorl%esi, %esi
movzbl romheader_size, %ecx
shll$9, %ecx
addr32 rep movsb
The reason we use a local label is so that we the function isn't split
into two from the profiler's point of view. See cd2276a795b013d1.
Hmm that commit message is not very enlightening.
The goal was to force a compiler error?
With LTO there is no way to force two functions be in the same
On 08/19/2012 06:09 PM, Andi Kleen wrote:
The reason we use a local label is so that we the function isn't split
into two from the profiler's point of view. See cd2276a795b013d1.
Hmm that commit message is not very enlightening.
The goal was to force a compiler error?
No, the goal was to
On Sun, Aug 19, 2012 at 06:12:57PM +0300, Avi Kivity wrote:
On 08/19/2012 06:09 PM, Andi Kleen wrote:
The reason we use a local label is so that we the function isn't split
into two from the profiler's point of view. See cd2276a795b013d1.
Hmm that commit message is not very
On 08/19/2012 06:34 PM, Michael Brown wrote:
On Sunday 19 Aug 2012 16:07:05 Avi Kivity wrote:
Which is exactly what happens here. My understanding of big real mode is
that to achieve a segment limit != 0x, you must go into 32-bit
protected mode, load a segment with a larger limit, and
On Sunday 19 Aug 2012 16:07:05 Avi Kivity wrote:
Which is exactly what happens here. My understanding of big real mode is
that to achieve a segment limit != 0x, you must go into 32-bit
protected mode, load a segment with a larger limit, and return into real
mode without touching the
On Sun, Aug 19, 2012 at 06:07:05PM +0300, Avi Kivity wrote:
ipxe contains the following snippet:
/* Copy ROM to image source PMM block */
pushw %es
xorw%ax, %ax
movw%ax, %es
movl%esi, %edi
xorl%esi, %esi
movzbl romheader_size,
On 08/19/2012 06:44 PM, Kevin O'Connor wrote:
On Sun, Aug 19, 2012 at 06:07:05PM +0300, Avi Kivity wrote:
ipxe contains the following snippet:
/* Copy ROM to image source PMM block */
pushw %es
xorw%ax, %ax
movw%ax, %es
movl%esi, %edi
xorl
On Sun, Aug 19, 2012 at 04:34:50PM +0100, Michael Brown wrote:
On Sunday 19 Aug 2012 16:07:05 Avi Kivity wrote:
(and that seabios needs changes to either work in
big real mode, or to put the processor back into big real mode after
returning from a PMM service.
If seabios switches into
On Sun, Aug 19, 2012 at 9:00 AM, Avi Kivity a...@redhat.com wrote:
On 08/19/2012 12:38 PM, Peter Maydell wrote:
On 19 August 2012 05:34, Christoffer Dall c.d...@virtualopensystems.com
wrote:
On Thu, Aug 16, 2012 at 2:25 PM, Alexander Graf ag...@suse.de wrote:
A single hva can have multiple
On 08/19/2012 05:55 PM, Avi Kivity wrote:
On 08/17/2012 09:56 AM, Peter Zijlstra wrote:
On Fri, 2012-08-17 at 09:40 +0800, Yan, Zheng wrote:
Peter, do I need to submit a patch disables uncore on virtualized CPU?
I think Avi prefers the method where KVM 'fakes' the MSRs and we have to
detect
On 08/19/2012 05:55 PM, Avi Kivity wrote:
On 08/17/2012 09:56 AM, Peter Zijlstra wrote:
On Fri, 2012-08-17 at 09:40 +0800, Yan, Zheng wrote:
Peter, do I need to submit a patch disables uncore on virtualized CPU?
I think Avi prefers the method where KVM 'fakes' the MSRs and we have to
detect
On 08/17/2012 09:39 PM, Marcelo Tosatti wrote:
Yes. Well, Avi mentioned earlier that there are users for change of GPA
base. But, if my understanding is correct, the code that emulates
change of BAR in QEMU is:
/* now do the real mapping */
if (r-addr != PCI_BAR_UNMAPPED)
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