Il 01/06/2014 23:11, Alex Williamson ha scritto:
It's really a nit, but I think kvm=no is preferrable (more consistent
with how hyper-v leaves are enabled).
Happy to oblige, but I'm not sure what I'm looking for. We enably
hyper-v leaves if hyperv_enabled(), which seems to boil down to the
This patch enables irqfd and irq routing on ARM.
It turns on CONFIG_HAVE_KVM_EVENTFD and CONFIG_HAVE_KVM_IRQ_ROUTING
irqfd framework enables to assign physical IRQs to guests.
1) user-side uses KVM_IRQFD VM ioctl to pass KVM a kvm_irqfd struct that
associates a VM, an eventfd, an IRQ number
On Sun, 2014-06-01 at 11:31 +0300, Marcel Apfelbaum wrote:
On Fri, 2014-05-30 at 17:41 -0300, Eduardo Habkost wrote:
The kvm-type machine option was left out when MachineState was
introduced, preventing the kvm-type option from being used. Add the
missing property.
Very interesting how did
Hi,
I am current try to enable kvm over cortex-a53 over 3.10 kernel.
After some patches backporting, I manage to get the /dev/kvm showed
out, and build
pass for the kernel.
However while I try to use the lkvm to launch the guest, some error shows up:
# lkvm run -k nfs/Image -m 256 -c 1 --name
On 02/06/14 10:09, Lei Wen wrote:
Hi,
I am current try to enable kvm over cortex-a53 over 3.10 kernel.
After some patches backporting, I manage to get the /dev/kvm showed
out, and build
pass for the kernel.
However while I try to use the lkvm to launch the guest, some error shows up:
01.06.2014 20:25, Alex Williamson цкщеу:
The latest Nvidia driver (337.88) specifically checks for KVM as the
hypervisor and reports Code 43 for the driver in a Windows guest when
found. Removing or changing the KVM signature is sufficient to allow
the driver to load.
Hmm.. Why does it do
I'm running
kernel-3.14.4-200.fc20.x86_64
qemu-1.6.2-5.fc20.x86_64
xen-4.4.0-4.fc21
In process of trying to get a Xen hypervisor running inside a KVM guest I
found that there's a problem with x2apic. NB I do *not* use nested-VMX
here, just trying to get plain Xen paravirt working before
On 02/06/14 13:45, Daniel P. Berrange wrote:
I'm running
kernel-3.14.4-200.fc20.x86_64
qemu-1.6.2-5.fc20.x86_64
xen-4.4.0-4.fc21
In process of trying to get a Xen hypervisor running inside a KVM guest I
found that there's a problem with x2apic. NB I do *not* use nested-VMX
here, just
On Mon, 2014-06-02 at 14:32 +0400, Michael Tokarev wrote:
01.06.2014 20:25, Alex Williamson цкщеу:
The latest Nvidia driver (337.88) specifically checks for KVM as the
hypervisor and reports Code 43 for the driver in a Windows guest when
found. Removing or changing the KVM signature is
Rusty, hi!
I'd like to ask for a small clarification about the virtio spec.
The virtio specification is put the way that it allows the out-of-order
completions in general. Although it states that it's mostly relevant to
the virtio-blk it doesn't explicitly bans it for virtio networking
devices
Hi Eric,
On Mon, Jun 02 2014 at 8:29:56 am BST, Eric Auger eric.au...@linaro.org
wrote:
This patch enables irqfd and irq routing on ARM.
It turns on CONFIG_HAVE_KVM_EVENTFD and CONFIG_HAVE_KVM_IRQ_ROUTING
irqfd framework enables to assign physical IRQs to guests.
1) user-side uses
On Mon, 2014-06-02 at 09:09 +0200, Paolo Bonzini wrote:
Il 01/06/2014 23:11, Alex Williamson ha scritto:
It's really a nit, but I think kvm=no is preferrable (more consistent
with how hyper-v leaves are enabled).
Happy to oblige, but I'm not sure what I'm looking for. We enably
On 06/02/2014 03:54 PM, Marc Zyngier wrote:
Hi Eric,
On Mon, Jun 02 2014 at 8:29:56 am BST, Eric Auger eric.au...@linaro.org
wrote:
This patch enables irqfd and irq routing on ARM.
It turns on CONFIG_HAVE_KVM_EVENTFD and CONFIG_HAVE_KVM_IRQ_ROUTING
irqfd framework enables to assign
On Mon, Jun 02, 2014 at 11:56:59AM +0300, Marcel Apfelbaum wrote:
On Sun, 2014-06-01 at 11:31 +0300, Marcel Apfelbaum wrote:
On Fri, 2014-05-30 at 17:41 -0300, Eduardo Habkost wrote:
The kvm-type machine option was left out when MachineState was
introduced, preventing the kvm-type option
Hi,
(XEN)
(XEN) Panic on CPU 0:
(XEN) IO-APIC + timer doesn't work! Boot with apic_verbosity=debug and
send a report. Then try booting with the 'noapic' option
(XEN)
Just tried the same a few days
The rdpmc emulation checks that the counter (ECX) is not higher than 2, without
taking into considerations bits 30:31 role (e.g., bit 30 marks whether the
counter is fixed). The fix uses the pmu information for checking the validity
of the pmu counter.
Signed-off-by: Nadav Amit
If the operand-size prefix (0x66) is used in 64-bit mode, the emulator would
assume the destination operand is 64-bit, when it should be 32-bit.
Reminder: movnti does not support 16-bit operands and its default operand size
is 32-bit.
Signed-off-by: Nadav Amit na...@cs.technion.ac.il
---
Currently the emulator does not recognize vex-prefix instructions. However, it
may incorrectly decode lgdt/lidt instructions and try to execute them. This
patch returns unhandlable error on their emulation.
Signed-off-by: Nadav Amit na...@cs.technion.ac.il
---
arch/x86/kvm/emulate.c | 7 +++
The current implementation of cmpxchg does not update the flags correctly,
since the accumulator should be compared with the destination and not the other
way around. The current implementation does not update the flags correctly.
Signed-off-by: Nadav Amit na...@cs.technion.ac.il
---
In 64-bit mode, when the destination is a register, the assignment is done
according to the operand size. Otherwise (memory operand or no 64-bit mode), a
16-bit assignment is performed.
Currently, 16-bit assignment is always done to the destination.
Signed-off-by: Nadav Amit
cmpxchg16b is currently unimplemented in the emulator. The least we can do is
return error upon the emulation of this instruction.
Signed-off-by: Nadav Amit na...@cs.technion.ac.il
---
arch/x86/kvm/emulate.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git
The SGDT and SIDT instructions are not privilaged, i.e. they can be executed
with CPL0.
Signed-off-by: Nadav Amit na...@cs.technion.ac.il
---
arch/x86/kvm/emulate.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/x86/kvm/emulate.c b/arch/x86/kvm/emulate.c
index
The x86 emulator of KVM is buggy. This series of patches includes fixes for
various bugs which were detected. Each patch stands on its own. Two patches do
not fix KVM emulation, but cause the emulator to fail more nicely by returning
an unhandlable error, instead of performing wrong emulation
The current emulator implementation ignores the high 32 bits of the base in
long-mode. During segment load from the LDT, the base of the LDT is calculated
incorrectly and may cause the wrong segment to be loaded.
Signed-off-by: Nadav Amit na...@cs.technion.ac.il
---
arch/x86/kvm/emulate.c | 6
The current implementation ignores the LDTR/TR base high 32-bits on long-mode.
As a result the loaded segment descriptor may be incorrect.
Signed-off-by: Nadav Amit na...@cs.technion.ac.il
---
arch/x86/kvm/emulate.c | 8 +++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git
Read guest last instruction from kvmppc_get_last_inst() allowing the function
to fail in order to emulate again. On bookehv architecture search for
the physical address and kmap it, instead of using Load External PID (lwepx)
instruction. This fixes an infinite loop caused by lwepx's data TLB miss
On book3e, guest last instruction is read on the exit path using load
external pid (lwepx) dedicated instruction. This load operation may fail
due to TLB eviction and execute-but-not-read entries.
This patch lay down the path for an alternative solution to read the guest
last instruction, by
On book3e, KVM uses load external pid (lwepx) dedicated instruction to read
guest last instruction on the exit path. lwepx exceptions (DTLB_MISS, DSI
and LRAT), generated by loading a guest address, needs to be handled by KVM.
These exceptions are generated in a substituted guest translation
Add mising defines MAS0_GET_TLBSEL() and MAS1_GET_TSIZE() for Book3E.
Signed-off-by: Mihai Caraman mihai.cara...@freescale.com
---
v3:
- no change
v2:
- no change
arch/powerpc/include/asm/mmu-book3e.h | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git
Il 02/06/2014 15:30, Alex Williamson ha scritto:
Then they'll be pissing off more users and driving them to AMD by doing
so. In any case, having the ability to hide the hypervisor seems to
stand on it's own. What if we want to test whether a guest behavior is
the result of a paravirtual
Il 02/06/2014 16:42, Alex Williamson ha scritto:
Same as your no-kvm, just with the default flipped from false to true.
Ah, easy enough. Do we want to limit the scope a bit by indicating
exactly what is getting disabled, perhaps kvm-msr=on|off? Thanks,
The capabilities are actually already
The commit 1d628af7 add load inst fixup made an attempt to handle
failures generated by reading the guest current instruction. The fixup
code that was added works by chance hiding the real issue.
Load external pid (lwepx) instruction, used by KVM to read guest
instructions, is executed in a
On Fri, May 30, 2014 at 09:24:24AM -0700, Andi Kleen wrote:
To avoid any problems with guest pages being swapped by the host we
pin the pages when the PEBS buffer is setup, by intercepting
that MSR.
It will avoid guest page to be swapped, but shadow paging code may still
drop
BTW I found some more problems in the v1 version.
With EPT it is less likely to happen (but still possible IIRC depending
on memory
pressure and how much memory shadow paging code is allowed to use),
without EPT
it will happen for sure.
Don't care about the non EPT case,
On Sat, May 31, 2014 at 5:42 AM, Gavin Shan gws...@linux.vnet.ibm.com wrote:
On Fri, May 30, 2014 at 04:12:32PM -0600, Bjorn Helgaas wrote:
On Mon, May 19, 2014 at 01:01:10PM +1000, Gavin Shan wrote:
The MSIx vector table lives in device memory, which may be cleared as
part of a backdoor device
The latest Nvidia driver (337.88) specifically checks for KVM as the
hypervisor and reports Code 43 for the driver in a Windows guest when
found. Removing or changing the KVM signature is sufficient for the
driver to load and work. This patch adds an option to easily allow
the KVM hypervisor
02.06.2014 17:30, Alex Williamson wrote:
On Mon, 2014-06-02 at 14:32 +0400, Michael Tokarev wrote:
01.06.2014 20:25, Alex Williamson wrote:
The latest Nvidia driver (337.88) specifically checks for KVM as the
hypervisor and reports Code 43 for the driver in a Windows guest when
found.
On Mon, 2014-06-02 at 22:01 +0400, Michael Tokarev wrote:
02.06.2014 17:30, Alex Williamson wrote:
On Mon, 2014-06-02 at 14:32 +0400, Michael Tokarev wrote:
01.06.2014 20:25, Alex Williamson wrote:
The latest Nvidia driver (337.88) specifically checks for KVM as the
hypervisor and reports
Michael Tokarev m...@tls.msk.ru writes:
02.06.2014 17:30, Alex Williamson wrote:
On Mon, 2014-06-02 at 14:32 +0400, Michael Tokarev wrote:
01.06.2014 20:25, Alex Williamson wrote:
The latest Nvidia driver (337.88) specifically checks for KVM as the
hypervisor and reports Code 43 for the
On Thu, May 29, 2014 at 6:12 PM, Andi Kleen a...@firstfloor.org wrote:
From: Andi Kleen a...@linux.intel.com
PEBS (Precise Event Bases Sampling) profiling is very powerful,
allowing improved sampling precision and much additional information,
like address or TSX abort profiling. cycles:p and
Alex Williamson alex.william...@redhat.com writes:
The latest Nvidia driver (337.88) specifically checks for KVM as the
hypervisor and reports Code 43 for the driver in a Windows guest when
found. Removing or changing the KVM signature is sufficient for the
driver to load and work. This
On Mon, Jun 02, 2014 at 07:45:35PM +0300, Gleb Natapov wrote:
On Fri, May 30, 2014 at 09:24:24AM -0700, Andi Kleen wrote:
To avoid any problems with guest pages being swapped by the host we
pin the pages when the PEBS buffer is setup, by intercepting
that MSR.
It will avoid guest
On Mon, 2014-06-02 at 15:09 -0400, Bandan Das wrote:
Alex Williamson alex.william...@redhat.com writes:
The latest Nvidia driver (337.88) specifically checks for KVM as the
hypervisor and reports Code 43 for the driver in a Windows guest when
found. Removing or changing the KVM signature
On Mon, 2014-06-02 at 15:03 -0400, Bandan Das wrote:
Michael Tokarev m...@tls.msk.ru writes:
02.06.2014 17:30, Alex Williamson wrote:
On Mon, 2014-06-02 at 14:32 +0400, Michael Tokarev wrote:
01.06.2014 20:25, Alex Williamson wrote:
The latest Nvidia driver (337.88) specifically checks
On Wed, May 07, 2014 at 04:52:13PM -0400, Gabriel L. Somlo wrote:
Treat monitor and mwait instructions as nop, which is architecturally
correct (but inefficient) behavior. We do this to prevent misbehaving
guests (e.g. OS X = 10.7) from crashing after they fail to check for
monitor/mwait
Am 02.06.2014 um 21:25 schrieb Gabriel L. Somlo gso...@gmail.com:
On Wed, May 07, 2014 at 04:52:13PM -0400, Gabriel L. Somlo wrote:
Treat monitor and mwait instructions as nop, which is architecturally
correct (but inefficient) behavior. We do this to prevent misbehaving
guests (e.g. OS X
It seems to me that with this patch, there is no way to expose a
PMU-without-PEBS to the guest if the host has PEBS.
If you clear the CPUIDs then noone would ilikely access it.
But fair enough, I'll add extra checks for CPUID.
It would be a bigger concern if we expected virtual PMU migration
On Mon, Jun 02, 2014 at 09:48:19PM +0200, Alexander Graf wrote:
Am 02.06.2014 um 21:25 schrieb Gabriel L. Somlo gso...@gmail.com:
On Wed, May 07, 2014 at 04:52:13PM -0400, Gabriel L. Somlo wrote:
Treat monitor and mwait instructions as nop, which is architecturally
correct (but
On Mon, Jun 02, 2014 at 03:25:30PM -0400, Gabriel L. Somlo wrote:
On Wed, May 07, 2014 at 04:52:13PM -0400, Gabriel L. Somlo wrote:
Treat monitor and mwait instructions as nop, which is architecturally
correct (but inefficient) behavior. We do this to prevent misbehaving
guests (e.g. OS X =
Am 02.06.2014 um 22:20 schrieb Michael S. Tsirkin m...@redhat.com:
On Mon, Jun 02, 2014 at 09:48:19PM +0200, Alexander Graf wrote:
Am 02.06.2014 um 21:25 schrieb Gabriel L. Somlo gso...@gmail.com:
On Wed, May 07, 2014 at 04:52:13PM -0400, Gabriel L. Somlo wrote:
Treat monitor and
On Mon, Jun 02, 2014 at 10:35:56PM +0200, Alexander Graf wrote:
Am 02.06.2014 um 22:20 schrieb Michael S. Tsirkin m...@redhat.com:
On Mon, Jun 02, 2014 at 09:48:19PM +0200, Alexander Graf wrote:
Am 02.06.2014 um 21:25 schrieb Gabriel L. Somlo gso...@gmail.com:
On Wed, May
The following changes since commit 96b2e73c5471542cb9c622c4360716684f8797ed:
Revert net/mlx4_en: Use affinity hint (2014-06-02 00:18:48 -0700)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/mst/vhost.git vhost-next
for you to fetch changes up to
Am 02.06.2014 um 22:41 schrieb Michael S. Tsirkin m...@redhat.com:
On Mon, Jun 02, 2014 at 10:35:56PM +0200, Alexander Graf wrote:
Am 02.06.2014 um 22:20 schrieb Michael S. Tsirkin m...@redhat.com:
On Mon, Jun 02, 2014 at 09:48:19PM +0200, Alexander Graf wrote:
Am 02.06.2014 um
From: Michael S. Tsirkin m...@redhat.com
Date: Mon, 2 Jun 2014 23:55:15 +0300
The following changes since commit 96b2e73c5471542cb9c622c4360716684f8797ed:
Revert net/mlx4_en: Use affinity hint (2014-06-02 00:18:48 -0700)
are available in the git repository at:
A few additional questions:)
1. If IO to a block device goes through QEMU and not vhost, are there
data copies between kernel and user mode if I do IO to a block device
or is it zero copy? Kind of related to Question (2) also.
2. A related question to (1), is the QEMU process separate from the
Michael Mueller provided a patch to reduce the size of
vhost-net structure as some allocations could fail under
memory pressure/fragmentation. We are still left with
high order allocations though.
This patch is handling the problem at the core level, allowing
vhost structures to use vmalloc() if
All memory accesses are done under some VQ mutex.
So lock/unlock all VQs is a faster equivalent of synchronize_rcu()
for memory access changes.
Some guests cause a lot of these changes, so it's helpful
to make them faster.
Reported-by: Gonglei (Arei) arei.gong...@huawei.com
Signed-off-by: Michael
On Mon, Jun 02, 2014 at 02:03:12PM -0700, David Miller wrote:
From: Michael S. Tsirkin m...@redhat.com
Date: Mon, 2 Jun 2014 23:55:15 +0300
The following changes since commit 96b2e73c5471542cb9c622c4360716684f8797ed:
Revert net/mlx4_en: Use affinity hint (2014-06-02 00:18:48 -0700)
Reposting with actual patches included.
The following changes since commit 96b2e73c5471542cb9c622c4360716684f8797ed:
Revert net/mlx4_en: Use affinity hint (2014-06-02 00:18:48 -0700)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/mst/vhost.git
On Tue, 2014-06-03 at 00:30 +0300, Michael S. Tsirkin wrote:
All memory accesses are done under some VQ mutex.
So lock/unlock all VQs is a faster equivalent of synchronize_rcu()
for memory access changes.
Some guests cause a lot of these changes, so it's helpful
to make them faster.
Needed by platform device drivers, such as the upcoming
vfio-platform driver, in order to bypass the existing OF, ACPI,
id_table and name string matches, and successfully be able to be
bound to any device, like so:
echo vfio-platform /sys/bus/platform/devices/fff51000.ethernet/driver_override
Now, we have general CMA reserved area management framework,
so use it for future maintainabilty. There is no functional change.
Signed-off-by: Joonsoo Kim iamjoonsoo@lge.com
diff --git a/arch/powerpc/kvm/book3s_hv_builtin.c
b/arch/powerpc/kvm/book3s_hv_builtin.c
index 8cd0dae..43c3f81
Now, we have general CMA reserved area management framework,
so use it for future maintainabilty. There is no functional change.
Signed-off-by: Joonsoo Kim iamjoonsoo@lge.com
diff --git a/drivers/base/Kconfig b/drivers/base/Kconfig
index b3fe1cc..4eac559 100644
--- a/drivers/base/Kconfig
+++
Currently, there are two users on CMA functionality, one is the DMA
subsystem and the other is the kvm on powerpc. They have their own code
to manage CMA reserved area even if they looks really similar.
From my guess, it is caused by some needs on bitmap management. Kvm side
wants to maintain
Currently, there are two users on CMA functionality, one is the DMA
subsystem and the other is the kvm on powerpc. They have their own code
to manage CMA reserved area even if they looks really similar.
From my guess, it is caused by some needs on bitmap management. Kvm side
wants to maintain
On Mon, Jun 02, 2014 at 11:01:07PM +0200, Alexander Graf wrote:
Am 02.06.2014 um 22:41 schrieb Michael S. Tsirkin m...@redhat.com:
On Mon, Jun 02, 2014 at 10:35:56PM +0200, Alexander Graf wrote:
Am 02.06.2014 um 22:20 schrieb Michael S. Tsirkin m...@redhat.com:
On Mon, Jun
Hi Marc,
On Mon, Jun 2, 2014 at 5:27 PM, Marc Zyngier marc.zyng...@arm.com wrote:
On 02/06/14 10:09, Lei Wen wrote:
Hi,
I am current try to enable kvm over cortex-a53 over 3.10 kernel.
After some patches backporting, I manage to get the /dev/kvm showed
out, and build
pass for the kernel.
A few additional questions:)
1. If IO to a block device goes through QEMU and not vhost, are there
data copies between kernel and user mode if I do IO to a block device
or is it zero copy? Kind of related to Question (2) also.
I'm not sure, it perhaps depend on which IO mode you chose, qemu
On Mon, Jun 02, 2014 at 07:42:58PM -0500, Kim Phillips wrote:
Needed by platform device drivers, such as the upcoming
vfio-platform driver, in order to bypass the existing OF, ACPI,
id_table and name string matches, and successfully be able to be
bound to any device, like so:
echo
On Mon, Jun 2, 2014 at 8:43 PM, Zhang Haoyu zhan...@sangfor.com wrote:
A few additional questions:)
1. If IO to a block device goes through QEMU and not vhost, are there
data copies between kernel and user mode if I do IO to a block device
or is it zero copy? Kind of related to Question (2) also.
Add mising defines MAS0_GET_TLBSEL() and MAS1_GET_TSIZE() for Book3E.
Signed-off-by: Mihai Caraman mihai.cara...@freescale.com
---
v3:
- no change
v2:
- no change
arch/powerpc/include/asm/mmu-book3e.h | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git
On book3e, KVM uses load external pid (lwepx) dedicated instruction to read
guest last instruction on the exit path. lwepx exceptions (DTLB_MISS, DSI
and LRAT), generated by loading a guest address, needs to be handled by KVM.
These exceptions are generated in a substituted guest translation
On book3e, guest last instruction is read on the exit path using load
external pid (lwepx) dedicated instruction. This load operation may fail
due to TLB eviction and execute-but-not-read entries.
This patch lay down the path for an alternative solution to read the guest
last instruction, by
The commit 1d628af7 add load inst fixup made an attempt to handle
failures generated by reading the guest current instruction. The fixup
code that was added works by chance hiding the real issue.
Load external pid (lwepx) instruction, used by KVM to read guest
instructions, is executed in a
Read guest last instruction from kvmppc_get_last_inst() allowing the function
to fail in order to emulate again. On bookehv architecture search for
the physical address and kmap it, instead of using Load External PID (lwepx)
instruction. This fixes an infinite loop caused by lwepx's data TLB miss
Now, we have general CMA reserved area management framework,
so use it for future maintainabilty. There is no functional change.
Signed-off-by: Joonsoo Kim iamjoonsoo@lge.com
diff --git a/drivers/base/Kconfig b/drivers/base/Kconfig
index b3fe1cc..4eac559 100644
--- a/drivers/base/Kconfig
+++
Now, we have general CMA reserved area management framework,
so use it for future maintainabilty. There is no functional change.
Signed-off-by: Joonsoo Kim iamjoonsoo@lge.com
diff --git a/arch/powerpc/kvm/book3s_hv_builtin.c
b/arch/powerpc/kvm/book3s_hv_builtin.c
index 8cd0dae..43c3f81
Currently, there are two users on CMA functionality, one is the DMA
subsystem and the other is the kvm on powerpc. They have their own code
to manage CMA reserved area even if they looks really similar.
From my guess, it is caused by some needs on bitmap management. Kvm side
wants to maintain
Currently, there are two users on CMA functionality, one is the DMA
subsystem and the other is the kvm on powerpc. They have their own code
to manage CMA reserved area even if they looks really similar.
From my guess, it is caused by some needs on bitmap management. Kvm side
wants to maintain
On Tue, May 20, 2014 at 01:25:11PM +0200, Alexander Graf wrote:
On 20.05.14 10:30, Gavin Shan wrote:
If we detects frozen state on PE that has been passed to guest, we
needn't handle it. Instead, we rely on the guest to detect and recover
it. The patch avoid EEH event on the frozen passed PE
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