Hi Stefan,
On 08/28/2015 07:58 PM, Stefan Hajnoczi wrote:
+goto do_unmap;
+}
+
+nvdimm->device_index = new_device_index();
+sprintf(name, "NVDIMM-%d", nvdimm->device_index);
+memory_region_init_ram_ptr(>mr, OBJECT(dev), name, nvdimm_size,
+
On 08/28/2015 07:59 PM, Stefan Hajnoczi wrote:
On Wed, Aug 26, 2015 at 06:42:01PM +0800, Xiao Guangrong wrote:
On 08/26/2015 12:16 AM, Stefan Hajnoczi wrote:
On Fri, Aug 14, 2015 at 10:52:06PM +0800, Xiao Guangrong wrote:
+#ifdef NVDIMM_DEBUG
+#define nvdebug(fmt, ...) fprintf(stderr,
Hello!
> my overall concern with this patch is that it adds complexity to an
> already really bad situation, and potentially increases the likelihood
> of not seeing any debug info at all.
Why? In this case we currently already drop into C code. I do the same, with
some more useful
printout.
On 08/28/2015 08:01 PM, Stefan Hajnoczi wrote:
On Wed, Aug 26, 2015 at 06:46:35PM +0800, Xiao Guangrong wrote:
On 08/26/2015 12:23 AM, Stefan Hajnoczi wrote:
On Fri, Aug 14, 2015 at 10:52:07PM +0800, Xiao Guangrong wrote:
static void dsm_write(void *opaque, hwaddr addr,
Hi Eduardo,
Thank you for reviewing my patches.
On 08/29/2015 01:25 AM, Eduardo Habkost wrote:
On Fri, Aug 14, 2015 at 10:52:00PM +0800, Xiao Guangrong wrote:
NVDIMM reserves all the free range above 4G to do:
- Persistent Memory (PMEM) mapping
- implement NVDIMM ACPI device _DSM method
On Mon, Aug 31, 2015 at 11:12:07AM +0800, Jason Wang wrote:
>
>
> On 08/26/2015 01:10 PM, Jason Wang wrote:
> > On 08/25/2015 07:51 PM, Michael S. Tsirkin wrote:
> >> > On Tue, Aug 25, 2015 at 05:05:47PM +0800, Jason Wang wrote:
> >> > We register wildcard mmio eventfd on two buses, one for
Hello!
> > + len = vgic_v3_get_reg_size(attr);
> > + if (len < 0)
> > + return len;
> >
> > - return -ENXIO;
> > + ret = vgic_v3_attr_regs_access(dev, attr, (len == 8) ? (void *) :
> > + (void *), len, false);
>
> this use of the ternary
On 08/31/2015 07:33 PM, Michael S. Tsirkin wrote:
> On Mon, Aug 31, 2015 at 04:03:59PM +0800, Jason Wang wrote:
>> >
>> >
>> > On 08/31/2015 03:29 PM, Michael S. Tsirkin wrote:
>>> > > Thinking more about this, invoking the 0-length write after
>>> > > > >> > the != 0
On Mon, 2015-08-31 at 13:43 +0200, Antonios Motakis wrote:
>
> On 18-Aug-15 19:44, Alex Williamson wrote:
> > On Mon, 2015-08-17 at 17:38 +0200, Eric Auger wrote:
> >> On 08/12/2015 08:56 PM, Alex Williamson wrote:
> >>> On Mon, 2015-08-10 at 15:20 +0200, Eric Auger wrote:
> This function
On Mon, Aug 31, 2015 at 09:23:13PM +0800, Xiao Guangrong wrote:
> I have another question, the eventfd memory is never read by guest and it's
> always
> a write MMIO VM-exit, why you build it on RO memslot? Why not just use normal
> MMIO page
> instead?
We do that at the moment, that's slower
https://bugzilla.kernel.org/show_bug.cgi?id=100671
cebbert.l...@gmail.com changed:
What|Removed |Added
CC||cebbert.l...@gmail.com
---
On Wed, Jul 08, 2015 at 05:19:12PM +0100, Marc Zyngier wrote:
> In order to switch between host and guest, a VHE-enabled kernel
> must use different accessors for certain system registers.
>
> This patch uses runtime patching to use the right instruction
> when required...
So am I reading this
On Wed, Jul 08, 2015 at 05:19:15PM +0100, Marc Zyngier wrote:
> As we're starting to get different requirements for non-VHE and VHE
> code paths, use a slightly more fine-grained approach:
>
> - __save/restore_sysregs: save/restore non-shared sysregs
> - __save/restore_shared_sysregs:
On Wed, Jul 08, 2015 at 05:19:16PM +0100, Marc Zyngier wrote:
> With VHE enabled, it is possible to let the kernel handle an interrupt
> without saving the full guest context, and without restoring the full
> host context either. This reduces the latency of handling an interrupt.
>
> When an
Hmm:
On Fri, Aug 14, 2015 at 4:57 PM, Paolo Bonzini wrote:
>
> Xiao Guangrong (9):
> KVM: MMU: fully check zero bits for sptes
The above commit causes an annoying new compiler warning.
The warning is bogus ("variable 'leaf' possibly uninitialized"),
because the use
On 8/31/15 3:44 PM, Wanpeng Li wrote:
On 8/30/15 6:26 AM, Peter Kieser wrote:
Thanks, Wanpeng. Applied this to Linux 3.18 and seeing much higher CPU
usage (200%) for qemu 2.4.0 process on a Windows 10 x64 guest. qemu
parameters:
Interesting. I test this against latest kvm tree and stable qemu
On Mon, Aug 31, 2015 at 10:53:58AM +0800, Xiao Guangrong wrote:
>
>
> On 08/30/2015 05:12 PM, Michael S. Tsirkin wrote:
> >Even when we skip data decoding, MMIO is slightly slower
> >than port IO because it uses the page-tables, so the CPU
> >must do a pagewalk on each access.
> >
> >This
On Mon, Aug 31, 2015 at 10:46:59AM +0200, Ard Biesheuvel wrote:
> On 30 August 2015 at 15:54, Christoffer Dall
> wrote:
> > Provide a better quality of implementation and be architecture compliant
> > on ARMv7 for the architected timer by resetting the CNTV_CTL to 0
On 08/25/2015 05:27 PM, Andre Przywara wrote:
> Hi Eric,
>
> On 14/08/15 12:58, Eric Auger wrote:
>> On 07/10/2015 04:21 PM, Andre Przywara wrote:
>>> The LPI configuration and pending tables of the GICv3 LPIs are held
>>> in tables in (guest) memory. To achieve reasonable performance, we
>>>
On 30 August 2015 at 15:54, Christoffer Dall
wrote:
> Provide a better quality of implementation and be architecture compliant
> on ARMv7 for the architected timer by resetting the CNTV_CTL to 0 on
> reset of the timer, and call kvm_timer_update_state(vcpu) at the
On Mon, Aug 31, 2015 at 10:43:27AM +0300, Pavel Fedin wrote:
> Hello!
>
> > > I had imagined we would encode the GICv3 register accesses through the
> > > device API and not through the system register API, since I'm not crazy
> > > about polluting the general system register handling logic with
On 08/25/2015 05:47 PM, Andre Przywara wrote:
> Hi Eric,
>
> On 14/08/15 13:35, Eric Auger wrote:
>> On 08/14/2015 01:58 PM, Eric Auger wrote:
>>> On 07/10/2015 04:21 PM, Andre Przywara wrote:
The LPI configuration and pending tables of the GICv3 LPIs are held
in tables in (guest)
Hello!
> I think it's worth moving the thing to device attributes, yes,
> especially given that I never expect us to trap and emulate GICv3 system
> register accesses from a guest in KVM. Is that correct?
Yes, but nevertheless, for GICv2 attributes we reuse the same code which is
expected to
On 31 August 2015 at 10:57, Christoffer Dall
wrote:
> On Mon, Aug 31, 2015 at 10:46:59AM +0200, Ard Biesheuvel wrote:
>> On 30 August 2015 at 15:54, Christoffer Dall
>> wrote:
>> > Provide a better quality of implementation and be
On Fri, Aug 07, 2015 at 06:08:32PM +0200, Eric Auger wrote:
> In case KVM_SET_MP_STATE ioctl is called just after we executed the
> vcpu_sleep check, we can enter the guest although KVM_MP_STATE_STOPPED
> is set. Let's check the power_off state in the critical section,
> just before entering the
Hello! Two weeks has passed, i have fixed up Marc's notes, so PING...
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electronics Research center Russia
> -Original Message-
> From: kvm-ow...@vger.kernel.org [mailto:kvm-ow...@vger.kernel.org] On Behalf
> Of Pavel Fedin
> Sent:
On 08/31/2015 03:29 PM, Michael S. Tsirkin wrote:
> Thinking more about this, invoking the 0-length write after
> > >> > the != 0 length one would be better: it would mean we only
> > >> > handle the userspace MMIO like this.
>>> > > Right.
>>> > >
>> >
>> > Using current unittest.
On Sun, Aug 30, 2015 at 07:39:05PM +0100, Peter Maydell wrote:
> On 30 August 2015 at 17:50, Christoffer Dall
> wrote:
> > I had imagined we would encode the GICv3 register accesses through the
> > device API and not through the system register API, since I'm not
Hello!
> Fundamentally what's changed is that you now run more custom code in C
> code.
Yes, but it doesn't do anything super-dupper, just decodes some values into a
human-readable form.
and i forgot this note...
>> -
>> -.align 3
>> -2: .quad HYP_PAGE_OFFSET
>> -.quad
On Mon, Aug 31, 2015 at 04:32:52PM +0800, Xiao Guangrong wrote:
>
>
> On 08/31/2015 03:46 PM, Michael S. Tsirkin wrote:
> >On Mon, Aug 31, 2015 at 10:53:58AM +0800, Xiao Guangrong wrote:
> >>
> >>
> >>On 08/30/2015 05:12 PM, Michael S. Tsirkin wrote:
> >>>Even when we skip data decoding, MMIO is
On 8/30/15 6:26 AM, Peter Kieser wrote:
Thanks, Wanpeng. Applied this to Linux 3.18 and seeing much higher CPU
usage (200%) for qemu 2.4.0 process on a Windows 10 x64 guest. qemu
parameters:
Interesting. I test this against latest kvm tree and stable qemu 2.0.0,
4 vCPUs on pCPU0(other pCPUs
On 18-Aug-15 19:44, Alex Williamson wrote:
> On Mon, 2015-08-17 at 17:38 +0200, Eric Auger wrote:
>> On 08/12/2015 08:56 PM, Alex Williamson wrote:
>>> On Mon, 2015-08-10 at 15:20 +0200, Eric Auger wrote:
This function makes possible to change the automasked mode.
Signed-off-by:
Hello!
> > I had imagined we would encode the GICv3 register accesses through the
> > device API and not through the system register API, since I'm not crazy
> > about polluting the general system register handling logic with GIC
> > registers solely for the purposes of migration.
>
> There's
On 08/31/2015 03:46 PM, Michael S. Tsirkin wrote:
On Mon, Aug 31, 2015 at 10:53:58AM +0800, Xiao Guangrong wrote:
On 08/30/2015 05:12 PM, Michael S. Tsirkin wrote:
Even when we skip data decoding, MMIO is slightly slower
than port IO because it uses the page-tables, so the CPU
must do a
On 08/24/2015 06:33 PM, Andre Przywara wrote:
> Hi Eric,
>
> On 12/08/15 10:01, Eric Auger wrote:
>
>>> diff --git a/virt/kvm/arm/vgic.c b/virt/kvm/arm/vgic.c
>>> index bc40137..394622c 100644
>>> --- a/virt/kvm/arm/vgic.c
>>> +++ b/virt/kvm/arm/vgic.c
>>> @@ -79,7 +79,6 @@
>>> #include
On 08/25/2015 04:34 PM, Andre Przywara wrote:
> Hi Eric,
>
> On 14/08/15 12:58, Eric Auger wrote:
>> On 07/10/2015 04:21 PM, Andre Przywara wrote:
>>> As the actual LPI number in a guest can be quite high, but is mostly
>>> assigned using a very sparse allocation scheme, bitmaps and arrays
>>>
On Mon, Aug 31, 2015 at 10:35:05AM +0300, Pavel Fedin wrote:
> Hello!
>
> > > + len = vgic_v3_get_reg_size(attr);
> > > + if (len < 0)
> > > + return len;
> > >
> > > - return -ENXIO;
> > > + ret = vgic_v3_attr_regs_access(dev, attr, (len == 8) ? (void *) :
> > > +
On 08/24/2015 07:24 PM, Andre Przywara wrote:
> Hi,
>
> On 12/08/15 14:02, Eric Auger wrote:
>> On 07/10/2015 04:21 PM, Andre Przywara wrote:
>>> Currently we initialize all the possible GIC frame addresses in one
>>> function, without looking at the specific GIC model we instantiate
>>> for the
On Mon, Aug 31, 2015 at 09:33:40AM +0300, Pavel Fedin wrote:
> Hello!
>
> > my overall concern with this patch is that it adds complexity to an
> > already really bad situation, and potentially increases the likelihood
> > of not seeing any debug info at all.
>
> Why? In this case we currently
On Fri, Aug 07, 2015 at 06:08:33PM +0200, Eric Auger wrote:
> We introduce kvm_arm_halt_guest and resume functions. They
> will be used for IRQ forward state change.
>
> Halt is synchronous and prevents the guest from being re-entered.
> We use the same mechanism put in place for PSCI former
On Mon, Aug 31, 2015 at 04:03:59PM +0800, Jason Wang wrote:
>
>
> On 08/31/2015 03:29 PM, Michael S. Tsirkin wrote:
> > Thinking more about this, invoking the 0-length write after
> > > >> > the != 0 length one would be better: it would mean we only
> > > >> > handle the userspace
On Tue, Sep 01, 2015 at 11:33:43AM +0800, Jason Wang wrote:
>
>
> On 08/31/2015 07:33 PM, Michael S. Tsirkin wrote:
> > On Mon, Aug 31, 2015 at 04:03:59PM +0800, Jason Wang wrote:
> >> >
> >> >
> >> > On 08/31/2015 03:29 PM, Michael S. Tsirkin wrote:
> >>> > > Thinking more about this,
On 08/30/2015 05:12 PM, Michael S. Tsirkin wrote:
> Even when we skip data decoding, MMIO is slightly slower
> than port IO because it uses the page-tables, so the CPU
> must do a pagewalk on each access.
>
> This overhead is normally masked by using the TLB cache:
> but not so for KVM MMIO,
On Tue, Sep 01, 2015 at 11:37:13AM +0800, Jason Wang wrote:
>
>
> On 08/30/2015 05:12 PM, Michael S. Tsirkin wrote:
> > Even when we skip data decoding, MMIO is slightly slower
> > than port IO because it uses the page-tables, so the CPU
> > must do a pagewalk on each access.
> >
> > This
On 09/01/2015 12:36 PM, Michael S. Tsirkin wrote:
> On Tue, Sep 01, 2015 at 11:37:13AM +0800, Jason Wang wrote:
>> >
>> >
>> > On 08/30/2015 05:12 PM, Michael S. Tsirkin wrote:
>>> > > Even when we skip data decoding, MMIO is slightly slower
>>> > > than port IO because it uses the
On 09/01/2015 12:31 PM, Michael S. Tsirkin wrote:
> On Tue, Sep 01, 2015 at 11:33:43AM +0800, Jason Wang wrote:
>>
>> On 08/31/2015 07:33 PM, Michael S. Tsirkin wrote:
>>> On Mon, Aug 31, 2015 at 04:03:59PM +0800, Jason Wang wrote:
>
> On 08/31/2015 03:29 PM, Michael S. Tsirkin wrote:
Linus, I am sorry for the annoyance.
On 09/01/2015 08:47 AM, Linus Torvalds wrote:
Hmm:
On Fri, Aug 14, 2015 at 4:57 PM, Paolo Bonzini wrote:
Xiao Guangrong (9):
KVM: MMU: fully check zero bits for sptes
The above commit causes an annoying new compiler
On 08/31/2015 07:27 PM, Michael S. Tsirkin wrote:
On Mon, Aug 31, 2015 at 04:32:52PM +0800, Xiao Guangrong wrote:
On 08/31/2015 03:46 PM, Michael S. Tsirkin wrote:
On Mon, Aug 31, 2015 at 10:53:58AM +0800, Xiao Guangrong wrote:
On 08/30/2015 05:12 PM, Michael S. Tsirkin wrote:
Even
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