From: Avi Kivity a...@redhat.com
We inherited kvm-userspace's directory structure, which is now wrong.
Signed-off-by: Avi Kivity a...@redhat.com
diff --git a/Makefile b/Makefile
index 1e0420e..a8e8e0b 100644
--- a/Makefile
+++ b/Makefile
@@ -51,7 +51,7 @@ install:
tmpspec =
Gleb Natapov wrote:
On Thu, May 14, 2009 at 10:34:11PM +0800, Dong, Eddie wrote:
Gleb Natapov wrote:
On Thu, May 14, 2009 at 09:43:33PM +0800, Dong, Eddie wrote:
Avi Kivity wrote:
Dong, Eddie wrote:
OK.
Also back to Gleb's question, the reason I want to do that is to
simplify event
SVM adds another way to do INVLPG by ASID which Hyper-V makes use of,
so let's implement it!
For now we just do the same thing invlpg does, as asid switching
means we flush the mmu anyways. That might change one day though.
Signed-off-by: Alexander Graf ag...@suse.de
---
arch/x86/kvm/svm.c |
If we couldn't find a page on read_emulated, it might be a good
idea to tell the guest about that and inject a #PF.
We do the same already for write faults. I don't know why it was
not implemented for reads.
Signed-off-by: Alexander Graf ag...@suse.de
---
arch/x86/kvm/x86.c |7 +--
1
Hyper-V uses some MSRs, some of which are actually reserved for BIOS usage.
But let's be nice today and have it its way, because otherwise it fails
terribly.
For MSRs where I could find a name I used the name, otherwise they're just
added in their hex form for now.
Signed-off-by: Alexander Graf
Now that we have nested SVM in place, let's make use of it and virtualize
something non-kvm.
The first interesting target that came to my mind here was Hyper-V.
This patchset makes Windows Server 2008 boot with Hyper-V, which runs
the dom0 in virtualized mode already. I haven't been able to run a
A 64bit PTE can have bit7 set to 1 which means Use this bit for the PAT.
Currently KVM's MMU code treats this bit as reserved, even though it's not.
As long as we're not required to make use of the PAT bits which is only
required for DMA/MMIO from my understanding, we can safely ignore it.
While trying to get Hyper-V running, I realized that the interrupt injection
mechanisms that are in place right now are not 100% correct.
This patch makes nested SVM's interrupt injection behave more like on a
real machine.
Signed-off-by: Alexander Graf ag...@suse.de
---
arch/x86/kvm/svm.c |
Michael Goldish 写道:
Hi Micheal, thanks for your comments.
Hi Jason,
We already have patches that implement similar functionality here in
TLV, as mentioned in the to-do list (item #4 under 'Framework').
They're not yet committed upstream because they're still quite fresh.
OK, I would pay
Michael Goldish 写道:
- sudhir kumar smalik...@gmail.com wrote:
On Thu, May 14, 2009 at 12:22 PM, jason wang jasow...@redhat.com
wrote:
sudhir kumar 写道:
Hi Uri/Lucas,
Do you have any plans for enhancing kvm-autotest?
I was looking mainly on the following 2 aspects:
(1).
we
When using nested SVM we usually want the guest to see the exact CPUID values
we gave it and not some mangled ones.
Hyper-V for example doesn't even start when the hypervisor present bit is set.
Signed-off-by: Alexander Graf ag...@suse.de
---
target-i386/helper.c |4 ++--
1 files changed, 2
Xu, Jiajun wrote:
Hi all,
Latest kvm can not build with 2.6.30-rc4 kernel. Could anyone help on the issue?
Error as following:
make[1]: Leaving directory
`/workspace/ia32e/nightly/kvm-master-2.6.30-rc4-20090515011054681/qemu-kvm'
The external module is now build using the kvm-kmod
On 15.05.2009, at 10:22, Alexander Graf wrote:
Now that we have nested SVM in place, let's make use of it and
virtualize
something non-kvm.
The first interesting target that came to my mind here was Hyper-V.
This patchset makes Windows Server 2008 boot with Hyper-V, which runs
the dom0 in
Hello,
On (Thu) May 14 2009 [11:08:29], Passera, Pablo R wrote:
Amit,
I trying to use PVDMA. I've downloaded a kernel snapshot from the
your kvm git, but I couldn't download a snapshot or the repo from your
kvm-userspace tree. I tried to launch the VM using kvm-85 user space but it
Alexander Graf wrote:
When using nested SVM we usually want the guest to see the exact CPUID values
we gave it and not some mangled ones.
That would triggered by -cpu host, not nesting.
@@ -1506,7 +1506,7 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index,
uint32_t count,
On 15.05.2009, at 13:09, Avi Kivity wrote:
Alexander Graf wrote:
When using nested SVM we usually want the guest to see the exact
CPUID values
we gave it and not some mangled ones.
That would triggered by -cpu host, not nesting.
Oh we have -cpu host already? If so, we don't need that
Alexander Graf wrote:
When using nested SVM we usually want the guest to see the exact
CPUID values
we gave it and not some mangled ones.
That would triggered by -cpu host, not nesting.
Oh we have -cpu host already?
No, we don't :)
hm - treating the hypervisor bit like any other cpuid
This patch sets bits 1 in disabled processor's _STA.
According to the ACPI spec, this bit means:
Set if the device is enabled and decoding its resources.
Without it, Windows 2008 device manager shows the processors
as malfunctioning hardware.
Signed-off-by: Glauber Costa glom...@redhat.com
---
Hi Amit,
Thanks for your answer. I was able to get your userspace pvdma version.
So now, I am using the PVDMA patched kernel and the PVDMA patches userspace.
However, I am not able to start the VM. I am running qemu with the following
options (I am trying without any pci passthrough
Hello Avi,
On Thu, 2009-05-14 at 11:57 +0530, Jaswinder Singh Rajput wrote:
Use standard msr-index.h's MSR declaration.
MSR_IA32_TSC is better than MSR_IA32_TIME_STAMP_COUNTER as it also solves
80 column issue.
Signed-off-by: Jaswinder Singh Rajput jaswinderraj...@gmail.com
---
If this
On Thu, 2009-05-14 at 11:00 +0530, Jaswinder Singh Rajput wrote:
Here is the patch:
[PATCH -tip] x86: kvm/x86.c use MSR names in place of address
Replace 0xc0010010 with MSR_K8_SYSCFG and 0xc0010015 with MSR_K7_HWCR.
Signed-off-by: Jaswinder Singh Rajput jaswinderraj...@gmail.com
---
On Fri, May 15, 2009 at 12:53:42PM +0200, Alexander Graf wrote:
On 15.05.2009, at 12:25, Michael S. Tsirkin wrote:
On Fri, May 15, 2009 at 10:22:16AM +0200, Alexander Graf wrote:
A 64bit PTE can have bit7 set to 1 which means Use this bit for the
PAT.
Currently KVM's MMU code treats this
On Fri, May 15, 2009 at 10:22:17AM +0200, Alexander Graf wrote:
If we couldn't find a page on read_emulated, it might be a good
idea to tell the guest about that and inject a #PF.
We do the same already for write faults. I don't know why it was
not implemented for reads.
Have you checked
On Fri, May 15, 2009 at 10:22:19AM +0200, Alexander Graf wrote:
SVM adds another way to do INVLPG by ASID which Hyper-V makes use of,
so let's implement it!
For now we just do the same thing invlpg does, as asid switching
means we flush the mmu anyways. That might change one day though.
On Fri, 2009-05-15 at 11:56 -0300, Marcelo Tosatti wrote:
Ross,
Can you confirm the qemu process CPU consumption is down to acceptable
levels if you dont specify -no-acpi?
Thanks
Simply starting without -no-acpi did not help. I tried to do a Windows
XP repair, but seemed to end up
Signed-off-by: Jan Kiszka jan.kis...@siemens.com
---
.gitignore | 118 +++-
1 files changed, 60 insertions(+), 58 deletions(-)
diff --git a/.gitignore b/.gitignore
index 22a8200..bdebd0a 100644
--- a/.gitignore
+++ b/.gitignore
@@ -3,64
Beth,
On Thu, May 14, 2009 at 12:20:29PM -0400, Beth Kon wrote:
Anthony Liguori wrote:
Vincent Minet wrote:
External ACPI tables are counted twice for the RSDT size and the load
address for the first external table is in the MADT (interrupt override
entries are overwritten).
Signed-off-by:
Jan Kiszka wrote:
--- a/Makefile
+++ b/Makefile
@@ -68,3 +68,6 @@ rpm:all
clean:
$(MAKE) -C $(KERNELDIR) M=`pwd` $@
+
+distclean:
+ rm -f config.kbuild config.mak
This one is cleaner:
-
Remove the configure output config.kbuild and config.mak via distclean.
[
Applies to kvm.git:833367b57c plus the irqfd patch, v8, as posted here:
http://lkml.org/lkml/2009/5/14/258
]
This is v2 of the series. For more details, please see the header to
patch 4/4.
[
Changelog:
v2:
*) added optional data-matching capability (via
We want to use eventfd from KVM which can be compiled as a module, so
export the interfaces.
Signed-off-by: Gregory Haskins ghask...@novell.com
---
fs/eventfd.c |3 +++
1 files changed, 3 insertions(+), 0 deletions(-)
diff --git a/fs/eventfd.c b/fs/eventfd.c
index 2a701d5..3f0e197 100644
Today this function returns void and will internally BUG_ON if it fails.
We want to create dynamic MMIO/PIO entries driven from userspace later in
the series, so enhance this API to return an error code on failure.
We also fix up all the callsites to check the return code and BUG_ON if
it fails.
We want to support the notion of dynamic MMIO/PIO registrations and
therefore will need to support both register as well as unregister.
However, the current io_bus code is structured as a linear array and
is not conducive to unregistering, so refactor to allow holes in the
array. We then enhance
iosignalfd is a mechanism to register PIO/MMIO regions to trigger an eventfd
signal when written to by a guest. Host userspace can register any arbitrary
IO address with a corresponding eventfd and then pass the eventfd to a
specific end-point of interest for handling.
Normal IO requires a
Gregory Haskins wrote:
[
Applies to kvm.git:833367b57c plus the irqfd patch, v8, as posted here:
http://lkml.org/lkml/2009/5/14/258
I should also mention: NOT FOR INCLUSION
I am still testing this code, so this is an rfc for now.
]
This is v2 of the series. For more
An iosignalfd allows an eventfd to attach to a specific PIO/MMIO region in the
guest. Any guest-writes to that region will trigger an eventfd signal.
For more details, see the kernel side patches submitted here:
http://lkml.org/lkml/2009/5/15/303
Signed-off-by: Gregory Haskins
The smaller the patch... sigh.
Remove the configure output config.kbuild, config.mak and arch links via
distclean.
Signed-off-by: Jan Kiszka jan.kis...@siemens.com
---
Makefile |3 +++
1 files changed, 3 insertions(+), 0 deletions(-)
diff --git a/Makefile b/Makefile
index
On Thu, May 14, 2009 at 05:30:16PM -0300, Marcelo Tosatti wrote:
+ trace_kvm_cr_write(cr, val);
switch (cr) {
case 0:
- kvm_set_cr0(vcpu, kvm_register_read(vcpu, reg));
+ kvm_set_cr0(vcpu, val);
On Thu, 14 May 2009 10:32:05 +0800
Yu Zhao yu.z...@intel.com wrote:
This patch series implements Address Translation Service support for
the Intel IOMMU. The PCIe Endpoint that supports ATS capability can
request the DMA address translation from the IOMMU and cache the
translation itself.
On Fri, May 15, 2009 at 01:10:34PM -0400, Christoph Hellwig wrote:
On Thu, May 14, 2009 at 05:30:16PM -0300, Marcelo Tosatti wrote:
+ trace_kvm_cr_write(cr, val);
switch (cr) {
case 0:
- kvm_set_cr0(vcpu, kvm_register_read(vcpu, reg));
Marcelo Tosatti wrote:
Beth,
On Thu, May 14, 2009 at 12:20:29PM -0400, Beth Kon wrote:
Anthony Liguori wrote:
Vincent Minet wrote:
External ACPI tables are counted twice for the RSDT size and the load
address for the first external table is in the MADT (interrupt override
Using ACPI fixes the problem; CPU useage is now quite low. Start line
was
sudo vdeq kvm -net nic,vlan=1,macaddr=52:54:a0:12:01:00 \
-net vde,vlan=1,sock=/var/run/vde2/tap0.ctl \
-boot d -cdrom /usr/local/backup/XPProSP3.iso \
-std-vga -hda /dev/turtle/XP00 \
-soundhw es1370
On Thu, May 14, 2009 at 10:43:05PM +0200, Jan Kiszka wrote:
When using the in-kernel PIT the speaker emulation has to synchronize
the PIT state with KVM. Enhance the existing speaker sound device and
allow it to take over port 0x61 by using KVM_CREATE_PIT2 where
available. This unbreaks
On May 15, 2009, at 3:24 PM, Ross Boylan wrote:
Using ACPI fixes the problem; CPU useage is now quite low. Start line
was
sudo vdeq kvm -net nic,vlan=1,macaddr=52:54:a0:12:01:00 \
-net vde,vlan=1,sock=/var/run/vde2/tap0.ctl \
-boot d -cdrom /usr/local/backup/XPProSP3.iso \
-std-vga
This patch is also based on the patch by Vincent Minet. It corrects the size
calculation of the RSDT, and checks for overflow of MAX_RSDT_ENTRIES,
assuming that the external table entry count is contained within
MAX_RSDT_ENTRIES.
Signed-off-by: Beth Kon e...@us.ibm.com
diff --git
Hi Cam, I have gone through you latest shared memory patch.
I have a few questions and comments.
Comment:-
+if (ivshmem_enabled) {
+ivshmem_init(ivshmem_device);
+ram_size += ivshmem_get_size();
+}
+
In your initial patch this part of the patch is
+if
Beth Kon wrote:
This patch is also based on the patch by Vincent Minet. It corrects the size
calculation of the RSDT, and checks for overflow of MAX_RSDT_ENTRIES,
assuming that the external table entry count is contained within
MAX_RSDT_ENTRIES.
Signed-off-by: Beth Kon e...@us.ibm.com
This patch is also based on the patch by Vincent Minet. It corrects the size
calculation of the RSDT, and checks for overflow of MAX_RSDT_ENTRIES,
assuming that the external table entry count is contained within
MAX_RSDT_ENTRIES.
Signed-off-by: Beth Kon e...@us.ibm.com
diff --git
On 15-May-09, at 8:45 PM, Kumar, Venkat wrote:
Hi Cam, I have gone through you latest shared memory patch.
I have a few questions and comments.
Comment:-
+if (ivshmem_enabled) {
+ivshmem_init(ivshmem_device);
+ram_size += ivshmem_get_size();
+}
+
In your initial patch
On 15-May-09, at 8:54 PM, Kumar, Venkat wrote:
Cam,
A questions on interrupts as well.
What is unix:path that needs to be passed in the argument list?
Can it be any string?
It has to be a valid path on the host. It will create a unix domain
socket on that path.
If my understanding is
Based on Hollis's idea,
this patch map (vcpu, as, pid) to individual shadow id.
Every vcpu has a mapping table,
which keep the mapping from guest (as, id) to shadow id.
Every hardware core has a shadow id reference table,
which keep the mapping from shadow id to (vcpu, as, pid).
When mapping is
There are several reasons to discard shadow TLB.
1. After implement shadow ID support for E500,
keep shadow TLB may incur potential coherence problem.
(if shadow ID mappings change, shadow TLB cannot be updated intime)
2. We use shadow TLB restore hardware TLB in vcpu_load().
However, since
Only flush TLB when a reset to the shadow mappings is needed.
For guest tlbia, we can reset vcpu's mappings instead of a real flush.
And because different vcpu maps to different IDs,
no flush is needed at vcpu_put() and mmu_destroy().
Signed-off-by: Liu Yu yu@freescale.com
---
Invalidate TLB0 hardware entry when
the related guest TLB entry is invalidated.
It's a bug we didn't do this before.
It didn't make problem is because that
we flushed TLB every time when we enterred to guest's userspace.
Signed-off-by: Liu Yu yu@freescale.com
---
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