Alexander Graf ag...@suse.de writes:
Am 15.04.2014 um 18:56 schrieb Markus Armbruster arm...@redhat.com:
Alexander Graf ag...@suse.de writes:
On 04/15/2014 04:00 PM, Markus Armbruster wrote:
Juan Quintela quint...@redhat.com writes:
Juan Quintela quint...@redhat.com wrote:
Hi
Am 16.04.2014 um 08:26 schrieb Markus Armbruster arm...@redhat.com:
Alexander Graf ag...@suse.de writes:
Am 15.04.2014 um 18:56 schrieb Markus Armbruster arm...@redhat.com:
Alexander Graf ag...@suse.de writes:
On 04/15/2014 04:00 PM, Markus Armbruster wrote:
Juan Quintela
Hi Mario,
On 16/04/14 02:24, Mario Smarduch wrote:
Hi Eric, Mark -
what repository should I use to pick up Eric patches?
The initial posting was there:
https://lists.cs.columbia.edu/pipermail/kvmarm/2014-April/008791.html
Reading Eric's patch again, it is not doing exactly the same thing,
On 16/04/14 10:13, Marc Zyngier wrote:
Hi Mario,
On 16/04/14 02:24, Mario Smarduch wrote:
Hi Eric, Mark -
what repository should I use to pick up Eric patches?
The initial posting was there:
https://lists.cs.columbia.edu/pipermail/kvmarm/2014-April/008791.html
Reading Eric's
When entering an exception after an ICEBP, the saved instruction
pointer should point to after the instruction.
This fixes the bug here: https://bugs.launchpad.net/qemu/+bug/1119686
Signed-off-by: Huw Davies h...@codeweavers.com
---
v2: Mask off DR6_RESERVED before comparing to zero.
On 2014-04-16 11:02, Huw Davies wrote:
When entering an exception after an ICEBP, the saved instruction
pointer should point to after the instruction.
This fixes the bug here: https://bugs.launchpad.net/qemu/+bug/1119686
Signed-off-by: Huw Davies h...@codeweavers.com
---
v2: Mask off
On 15.04.14 17:32, Eric Auger wrote:
On 04/15/2014 04:55 PM, Alexander Graf wrote:
On 04/15/2014 04:00 PM, Markus Armbruster wrote:
Juan Quintela quint...@redhat.com writes:
Juan Quintela quint...@redhat.com wrote:
Hi
Please, send any topic that you are interested in covering.
Thanks,
On 15.04.14 10:33, Liu Ping Fan wrote:
Numa fault is a method which help to achieve auto numa balancing.
When such a page fault takes place, the page fault handler will check
whether the page is placed correctly. If not, migration should be
involved to cut down the distance between the cpu and
On 14.04.14 00:56, Paul Mackerras wrote:
Testing by Michael Neuling revealed that commit e4e38121507a (KVM:
PPC: Book3S HV: Add transactional memory support) is missing the code
that saves away the checkpointed state of the guest when switching to
the host. This adds that code, which was in
On Wed, Apr 09, 2014 at 04:21:58PM +0200, Christian Borntraeger wrote:
From: Alexander Yarygin yary...@linux.vnet.ibm.com
Trace events potentially can have a '-' in their trace system name,
e.g. kvm on s390 defines kvm-s390:* tracepoints.
tools/perf could not parse them, because there was no
On 16/04/14 15:00, Jiri Olsa wrote:
On Wed, Apr 09, 2014 at 04:21:58PM +0200, Christian Borntraeger wrote:
From: Alexander Yarygin yary...@linux.vnet.ibm.com
Trace events potentially can have a '-' in their trace system name,
e.g. kvm on s390 defines kvm-s390:* tracepoints.
tools/perf could
On 16/04/14 15:28, Christian Borntraeger wrote:
On 16/04/14 15:00, Jiri Olsa wrote:
On Wed, Apr 09, 2014 at 04:21:58PM +0200, Christian Borntraeger wrote:
From: Alexander Yarygin yary...@linux.vnet.ibm.com
Trace events potentially can have a '-' in their trace system name,
e.g. kvm on s390
On Wed, Apr 16, 2014 at 03:31:15PM +0200, Christian Borntraeger wrote:
On 16/04/14 15:28, Christian Borntraeger wrote:
On 16/04/14 15:00, Jiri Olsa wrote:
On Wed, Apr 09, 2014 at 04:21:58PM +0200, Christian Borntraeger wrote:
From: Alexander Yarygin yary...@linux.vnet.ibm.com
Trace
Move typecast on out of range value of mem.ea to
decode_modrm. rip_relative is only set in decode_modrm,
change it to a local var
Signed-off-by: Bandan Das b...@redhat.com
---
arch/x86/include/asm/kvm_emulate.h | 8 +---
arch/x86/kvm/emulate.c | 20 +---
2 files
x86_decode_insn already sets a default for seg_override,
so remove it from the zeroed area. Also replace set/get functions
with direct access to the field.
Signed-off-by: Bandan Das b...@redhat.com
---
arch/x86/include/asm/kvm_emulate.h | 3 +--
arch/x86/kvm/emulate.c | 41
The same information can be gleaned from ctxt-d and avoids having
to zero/NULL initialize intercept and check_perm
Signed-off-by: Bandan Das b...@redhat.com
---
arch/x86/kvm/emulate.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/x86/kvm/emulate.c
A lot of initializations are unnecessary as they get set to
appropriate values before actually being used. Optimize
placement of fields in x86_emulate_ctxt
Signed-off-by: Bandan Das b...@redhat.com
---
arch/x86/include/asm/kvm_emulate.h | 20 +++-
arch/x86/kvm/emulate.c
While initializing emulation context structure, kvm memsets to 0 a
number of fields some of which are redundant since they get set
eventually in x86_decode_insn. Cleanup unnecessary initializations
and remove some fields.
This is on top of Paolo's RFC
KVM: x86: speedups for emulator memory
Core emulator functions all belong in emulator.c,
x86 should have no knowledge of emulator internals
Signed-off-by: Bandan Das b...@redhat.com
---
arch/x86/include/asm/kvm_emulate.h | 1 +
arch/x86/kvm/emulate.c | 13 +
arch/x86/kvm/x86.c | 13
Remove the if conditional - that will help us avoid
an else initialize to 0 Also, rearrange operators
for slightly better code.
Signed-off-by: Bandan Das b...@redhat.com
---
arch/x86/kvm/emulate.c | 14 ++
1 file changed, 6 insertions(+), 8 deletions(-)
diff --git
On Fri, Apr 04, 2014 at 06:31:04AM +0300, Nadav Amit wrote:
KVM does not handle the reserved bits of x86 page tables correctly:
In PAE, bits 5:8 are reserved in the PDPTE.
In IA-32e, bit 8 is not reserved.
Signed-off-by: Nadav Amit na...@cs.technion.ac.il
---
arch/x86/kvm/mmu.c |6
On Mon, Apr 07, 2014 at 06:37:47PM +0300, Nadav Amit wrote:
According to Intel specifications, only general purpose registers and segment
selectors should are saved in the old TSS during 32-bit task-switch.
should be
Signed-off-by: Nadav Amit na...@cs.technion.ac.il
---
On Thu, Apr 10, 2014 at 01:16:44PM +0200, Christian Borntraeger wrote:
From: Dominik Dingel din...@linux.vnet.ibm.com
To enable CMMA and to reset its state we use the vm kvm_device ioctls,
encapsulating attributes within the KVM_S390_VM_MEM_CTRL group.
Signed-off-by: Dominik Dingel
On 16.04.14 20:49, Marcelo Tosatti wrote:
On Thu, Apr 10, 2014 at 01:16:44PM +0200, Christian Borntraeger wrote:
From: Dominik Dingel din...@linux.vnet.ibm.com
To enable CMMA and to reset its state we use the vm kvm_device ioctls,
encapsulating attributes within the KVM_S390_VM_MEM_CTRL
On Mon, Apr 14, 2014 at 05:59:05PM -0700, Marcus White wrote:
Hello,
A friendly bump to see if anyone has any ideas:-)
Cheers!
On Sun, Apr 13, 2014 at 2:01 PM, Marcus White
roastedseawee...@gmail.com wrote:
Hello,
I had some basic questions regarding KVM, and would appreciate any
On 04/16/2014 12:03 PM, Marcelo Tosatti wrote:
@@ -3550,9 +3550,9 @@ static void reset_rsvds_bits_mask(struct kvm_vcpu
*vcpu,
break;
case PT64_ROOT_LEVEL:
context-rsvd_bits_mask[0][3] = exb_bit_rsvd |
-rsvd_bits(maxphyaddr, 51) |
On Wed, Apr 16, 2014 at 02:17:08PM -0700, H. Peter Anvin wrote:
On 04/16/2014 12:03 PM, Marcelo Tosatti wrote:
@@ -3550,9 +3550,9 @@ static void reset_rsvds_bits_mask(struct kvm_vcpu
*vcpu,
break;
case PT64_ROOT_LEVEL:
context-rsvd_bits_mask[0][3] =
On Thu, Mar 27, 2014 at 12:30:34PM +0100, Paolo Bonzini wrote:
About 25% of the time spent in emulation of invalid guest state
is wasted in checking whether emulation is required for the next
instruction. However, this almost never changes except when a
segment register (or TR or LDTR)
Revised iteration after initial comments. Still just for ARMv7. I looked
at the ARMv8 code and yes it practically appears to reuse most of
fault handling in ARMv7, I wasn't aware so much code was in common.
But before then want to make sure it's reliable on real hardware.
This patch adds
Add support for initial write protection of guest VM, to later manage dirty
pages. Reduced TLB flushing to one flush after memory region is write protected.
This is based on Erics patch, which applied cleanly. The only patch I found
in the archives was the memory region delete, but still in
Add HYP API to invalidate all VM TLBs without passing address parameter,
that kvm_tlb_flush_vmid_ipa() uses. Hopefully this is a valid way
to do it. Tests show nothing is broken.
The address parameter is confusing since whole VM is being invalidated.
Signed-off-by: Mario Smarduch
Add support for dirty bitmap management. Wanted to make it generic but function
does a couple things different then the x86 version.
Signed-off-by: Mario Smarduch m.smard...@samsung.com
---
arch/arm/include/asm/kvm_host.h |3 ++
arch/arm/kvm/arm.c | 71
Additional logic to handle second stage page faults during migration. Primarily
page faults are prevented from creating huge pages.
Signed-off-by: Mario Smarduch m.smard...@samsung.com
---
arch/arm/kvm/mmu.c | 33 +++--
1 file changed, 31 insertions(+), 2
This should be in an earlier patch, omitted by mistake.
Signed-off-by: Mario Smarduch m.smard...@samsung.com
---
arch/arm/include/asm/kvm_host.h |1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/include/asm/kvm_host.h b/arch/arm/include/asm/kvm_host.h
index 16ed4e4..d77c425 100644
On 15.04.14 10:33, Liu Ping Fan wrote:
Numa fault is a method which help to achieve auto numa balancing.
When such a page fault takes place, the page fault handler will check
whether the page is placed correctly. If not, migration should be
involved to cut down the distance between the cpu and
On 14.04.14 00:56, Paul Mackerras wrote:
Testing by Michael Neuling revealed that commit e4e38121507a (KVM:
PPC: Book3S HV: Add transactional memory support) is missing the code
that saves away the checkpointed state of the guest when switching to
the host. This adds that code, which was in
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