Re: [PATCH v3 1/5] KVM: Redesign kvm_io_bus_ API to pass VCPU structure to the callbacks.

2015-01-24 Thread Paolo Bonzini
On 24/01/2015 12:59, Nikolay Nikolaev wrote: This is needed in e.g. ARM vGIC emulation, where the MMIO handling depends on the VCPU that does the access. Signed-off-by: Nikolay Nikolaev n.nikol...@virtualopensystems.com --- arch/powerpc/kvm/mpic.c| 10 ++

[PATCH v3 2/6] KVM: nVMX: Enable nested virtualize x2apic mode.

2015-01-24 Thread Wincy Van
When L2 is using x2apic, we can use virtualize x2apic mode to gain higher performance, especially in apicv case. This patch also introduces nested_vmx_check_apicv_controls for the nested apicv patches. Signed-off-by: Wincy Van fanwenyi0...@gmail.com --- arch/x86/kvm/vmx.c | 121

[PATCH v3 3/6] KVM: nVMX: Make nested control MSRs per-cpu.

2015-01-24 Thread Wincy Van
To enable nested apicv support, we need per-cpu vmx control MSRs: 1. If in-kernel irqchip is enabled, we can enable nested posted interrupt, we should set posted intr bit in the nested_vmx_pinbased_ctls_high. 2. If in-kernel irqchip is disabled, we can not enable nested posted

[PATCH v3 4/6] KVM: nVMX: Enable nested apic register virtualization.

2015-01-24 Thread Wincy Van
We can reduce apic register virtualization cost with this feature, it is also a requirement for virtual interrupt delivery and posted interrupt processing. Signed-off-by: Wincy Van fanwenyi0...@gmail.com --- arch/x86/kvm/vmx.c | 24 1 files changed, 20 insertions(+), 4

[PATCH v3 1/6] KVM: nVMX: Use hardware MSR bitmap

2015-01-24 Thread Wincy Van
Currently, if L1 enables MSR_BITMAP, we will emulate this feature, all of L2's msr access is intercepted by L0. Since many features like virtualize x2apic mode has a complicated logic and it is difficult for us to emulate, we should use hardware and merge the bitmap. This patch introduces

[PATCH v3 0/6] KVM: nVMX: Enable nested apicv support.

2015-01-24 Thread Wincy Van
v1 --- v2: Use spin lock to ensure vmcs12 is safe when doing nested posted interrupt delivery. v2 --- v3: 1. Add a new field in nested_vmx to avoid the spin lock in v2. 2. Drop send eoi to L1 when doing nested interrupt delivery. 3. Use hardware MSR bitmap to enable nested virtualize

Re: [patch] KVM: always initialize *pdata in get_msr()

2015-01-24 Thread Dan Carpenter
On Fri, Jan 23, 2015 at 05:08:03PM +0100, Radim Krčmář wrote: This patch will prevent future detection of functional bugs :( Hm. You're right. Smatch should be able to follow the logic. The code to handle this is pretty new. I'll look into why it wasn't working. regards, dan carpenter --

[PATCH v3 6/6] KVM: nVMX: Enable nested posted interrupt processing.

2015-01-24 Thread Wincy Van
If vcpu has a interrupt in vmx non-root mode, we will kick that vcpu to inject interrupt timely. With posted interrupt processing, the kick intr is not needed, and interrupts are fully taken care of by hardware. In nested vmx, this feature avoids much more vmexits than non-nested vmx. This patch

[PATCH v3 5/6] KVM: nVMX: Enable nested virtual interrupt delivery.

2015-01-24 Thread Wincy Van
With virtual interrupt delivery, the hardware prevent KVM from the low efficiency interrupt inject way. In nested vmx, it is a important feature, we can reduce much more nested-vmexit, especially in high throughput scenes. Signed-off-by: Wincy Van fanwenyi0...@gmail.com --- arch/x86/kvm/vmx.c |

[PATCH v3 0/5] ARM: KVM: Enable the ioeventfd capability of KVM on ARM

2015-01-24 Thread Nikolay Nikolaev
The IOEVENTFD KVM capability is a prerequisite for vhost support. This series enables the ioeventfd KVM capability on ARM. The implementation routes MMIO access in the IO abort handler to the KVM IO bus. If there is already a registered ioeventfd handler for this address, the file descriptor

[PATCH v3 2/5] KVM: ARM: on IO mem abort - route the call to KVM MMIO bus

2015-01-24 Thread Nikolay Nikolaev
On IO memory abort, try to handle the MMIO access thorugh the KVM registered read/write callbacks. This is done by invoking the relevant kvm_io_bus_* API. Signed-off-by: Nikolay Nikolaev n.nikol...@virtualopensystems.com --- arch/arm/kvm/mmio.c | 33 + 1 file

[PATCH v3 4/5] ARM/ARM64: enable linking against eventfd

2015-01-24 Thread Nikolay Nikolaev
This enables compilation of the eventfd feature on ARM/ARM64. Signed-off-by: Nikolay Nikolaev n.nikol...@virtualopensystems.com --- arch/arm/kvm/Kconfig|1 + arch/arm/kvm/Makefile |2 +- arch/arm64/kvm/Kconfig |1 + arch/arm64/kvm/Makefile |2 +- 4 files changed, 4

[PATCH v3 5/5] ARM: enable KVM_CAP_IOEVENTFD

2015-01-24 Thread Nikolay Nikolaev
KVM on arm will support the eventfd extension. Signed-off-by: Nikolay Nikolaev n.nikol...@virtualopensystems.com --- arch/arm/kvm/arm.c |3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm/kvm/arm.c b/arch/arm/kvm/arm.c index 6fbfa5f..ec5ebef 100644 --- a/arch/arm/kvm/arm.c +++

[PATCH v3 3/5] KVM: ARM VGIC add kvm_io_bus_ frontend

2015-01-24 Thread Nikolay Nikolaev
In io_mem_abort remove the call to vgic_handle_mmio. The target is to have a single MMIO handling path - that is through the kvm_io_bus_ API. Register a kvm_io_device in kvm_vgic_init on the whole vGIC MMIO region. Both read and write calls are redirected to vgic_io_dev_access where kvm_exit_mmio

[PATCH v3 1/5] KVM: Redesign kvm_io_bus_ API to pass VCPU structure to the callbacks.

2015-01-24 Thread Nikolay Nikolaev
This is needed in e.g. ARM vGIC emulation, where the MMIO handling depends on the VCPU that does the access. Signed-off-by: Nikolay Nikolaev n.nikol...@virtualopensystems.com --- arch/powerpc/kvm/mpic.c| 10 ++ arch/powerpc/kvm/powerpc.c |4 ++-- arch/s390/kvm/diag.c |