is simply the 16-bit bus-device-function
triplet, which should be easily available to the userland tool.
Signed-off-by: Andre Przywara
---
Documentation/virtual/kvm/api.txt | 8 ++--
include/uapi/linux/kvm.h | 4 +++-
2 files changed, 9 insertions(+), 3 deletions(-)
diff --git a
Currently we destroy the VGIC emulation in one function that cares for
all emulated models. The ITS emulation will require some
differentiation, so introduce a per-emulation-model destroy method.
Use it for a tiny GICv3 specific code already.
Signed-off-by: Andre Przywara
---
include/kvm
hardware, so the sync points are well known.
Provide functions that read the guest memory and store the
information from the property and status table in the kernel.
Signed-off-by: Andre Przywara
---
virt/kvm/arm/its-emul.c | 140
1 file changed, 140
as we are not yet ready for the show.
Signed-off-by: Andre Przywara
---
arch/arm64/kvm/Makefile| 1 +
include/kvm/arm_vgic.h | 6 ++
include/linux/irqchip/arm-gic-v3.h | 1 +
virt/kvm/arm/its-emul.c| 127 +
virt/kvm/ar
inguishing them is easy. With LPIs being only edge-triggered, we
get away with a less complex IRQ handling.
Signed-off-by: Andre Przywara
---
include/kvm/arm_vgic.h | 2 ++
virt/kvm/arm/its-emul.c | 66 +++
virt/kvm/arm/its-emul.h | 3 ++
vi
emulation.
Signed-off-by: Andre Przywara
---
include/kvm/arm_vgic.h | 4
virt/kvm/arm/vgic-v3-emul.c | 43 +++
virt/kvm/arm/vgic.c | 35 +++
virt/kvm/arm/vgic.h | 4
4 files changed, 86 insertions
uest being
quite low. Should the number of LPIs exceed the number where iterating
the lists becomes painful, we can later revisit this and use more
efficient data structures.
Signed-off-by: Andre Przywara
---
include/kvm/arm_vgic.h | 3 +++
virt/kvm/arm/its-e
Add emulation for some basic MMIO registers used in the ITS emulation.
This includes:
- GITS_{CTLR,TYPER,IIDR}
- ID registers
- GITS_{CBASER,CREAD,CWRITER}
those implement the ITS command buffer handling
Signed-off-by: Andre Przywara
---
include/kvm/arm_vgic.h | 3 +
include
-by: Andre Przywara
---
include/kvm/arm_vgic.h | 1 +
virt/kvm/arm/its-emul.c | 49 +
virt/kvm/arm/its-emul.h | 2 ++
virt/kvm/arm/vgic-v3-emul.c | 1 +
4 files changed, 53 insertions(+)
diff --git a/include/kvm/arm_vgic.h b/include/kvm
ITS commands and let them store
the requested relation into our own data structures.
Error handling is very basic at this point, as we don't have a good
way of communicating errors to the guest (usually a SError).
Signed-off-by: Andre Przywara
---
include/linux/irqchip/arm-gic-v3.h | 1 +
that check.
Signed-off-by: Andre Przywara
---
Documentation/virtual/kvm/devices/arm-vgic.txt | 7 +++
arch/arm64/include/uapi/asm/kvm.h | 3 +++
include/kvm/arm_vgic.h | 3 +++
virt/kvm/arm/vgic-v3-emul.c| 1 +
virt/kvm/arm/vgic.c
we enable the KVM_SIGNAL_MSI feature to allow userland to inject
MSIs into the guest. Not having enabled the ITS emulation will lead
to a -ENODEV when trying to inject a MSI.
Signed-off-by: Andre Przywara
---
Documentation/virtual/kvm/api.txt | 2 +-
arch/arm64/kvm/Kconfig| 1
fixes ARM/ARM64 guests using PCI with newer kernels.
Signed-off-by: Andre Przywara
---
include/kvm/virtio-pci.h | 8
virtio/pci.c | 9 ++---
2 files changed, 14 insertions(+), 3 deletions(-)
diff --git a/include/kvm/virtio-pci.h b/include/kvm/virtio-pci.h
index c795ce7
t.kernel.org/pub/scm/linux/kernel/git/will/kvmtool.git
[2] git://linux-arm.org/kvmtool.git (branch gicv3/v2)
http://www.linux-arm.org/git?p=kvmtool.git;a=log;h=refs/heads/gicv3/v2
Andre Przywara (4):
arm: finish VGIC initialisation explicitly
arm: prepare for instantiating different IRQ chi
: Andre Przywara
---
arm/aarch64/include/kvm/kvm-arch.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arm/aarch64/include/kvm/kvm-arch.h
b/arm/aarch64/include/kvm/kvm-arch.h
index 2f08a26..4925736 100644
--- a/arm/aarch64/include/kvm/kvm-arch.h
+++ b/arm/aarch64/include/kvm
between
creation and initialisation more clearly.]
Signed-off-by: Marc Zyngier
Signed-off-by: Andre Przywara
---
arm/gic.c| 60 ++--
arm/include/arm-common/gic.h | 2 +-
arm/kvm.c| 6 ++---
3 files changed, 57
which are not (yet) in the (32 bit) header
files to allow compilation for ARM.
Signed-off-by: Andre Przywara
---
arm/gic.c | 37 +++--
arm/include/arm-common/gic.h | 2 +-
arm/include/arm-common/kvm-arch.h | 18 ++
arm
gic__init_gic() to ease future expansion]
Signed-off-by: Marc Zyngier
Signed-off-by: Andre Przywara
---
arm/gic.c | 25 +
1 file changed, 25 insertions(+)
diff --git a/arm/gic.c b/arm/gic.c
index ce5f7fa..6277af8 100644
--- a/arm/gic.c
+++ b/arm/gic.c
@@ -1,10 +1,12
-off-by: Andre Przywara
---
arm/gic.c | 25 ++---
1 file changed, 22 insertions(+), 3 deletions(-)
diff --git a/arm/gic.c b/arm/gic.c
index 6277af8..8d47562 100644
--- a/arm/gic.c
+++ b/arm/gic.c
@@ -89,24 +89,43 @@ int gic__create(struct kvm *kvm)
return err
llocated so far.
Signed-off-by: Marc Zyngier
Signed-off-by: Andre Przywara
---
include/kvm/irq.h | 1 +
irq.c | 5 +
2 files changed, 6 insertions(+)
diff --git a/include/kvm/irq.h b/include/kvm/irq.h
index 4cec6f0..8a78e43 100644
--- a/include/kvm/irq.h
+++ b/include/kvm/irq.h
Currently we unconditionally create a virtual GICv2 in the guest.
Add a --irqchip= parameter to let the user specify a different GIC
type for the guest.
For now we the only other supported type is GICv3.
Signed-off-by: Andre Przywara
---
arm/aarch64/arm-cpu.c| 2 +-
arm
Extend the vGIC handling code to potentially deal with different IRQ
chip devices instead of hard-coding the GICv2 in.
We extend most vGIC functions to take a type parameter, but still put
GICv2 in at the top for the time being.
Signed-off-by: Andre Przywara
---
arm/aarch32/arm-cpu.c
Hi, contrary to my boasting in the cover letter I managed to
accidentially drop the fix for the GIC device initialization error
handling Will requested from this series.
If we fail the GIC initialization sequence at some point, we should
make sure to not let the gic_fd initialized, so that subseque
Hi Marc,
On 06/08/2015 06:03 PM, Marc Zyngier wrote:
> As we're about to cram more information in the vgic_lr structure
> (HW interrupt number and additional state information), we switch
> to a layout similar to the HW's:
>
> - use bitfields to save space (we don't need more than 10 bits
> to
Hi,
On 06/08/2015 06:04 PM, Marc Zyngier wrote:
> In order to be able to feed physical interrupts to a guest, we need
> to be able to establish the virtual-physical mapping between the two
> worlds.
>
> The mapping is kept in a rbtree, indexed by virtual interrupts.
>
> Signed-off-by: Marc Zyngier
Hi Marc,
On 06/08/2015 06:04 PM, Marc Zyngier wrote:
> To allow a HW interrupt to be injected into a guest, we lookup the
> guest virtual interrupt in the irq_phys_map rbtree, and if we have
> a match, encode both interrupts in the LR.
>
> We also mark the interrupt as "active" at the host distri
On 06/11/2015 10:15 AM, Marc Zyngier wrote:
> On 11/06/15 09:44, Andre Przywara wrote:
>> On 06/08/2015 06:04 PM, Marc Zyngier wrote:
...
>>> @@ -1344,6 +1364,35 @@ static bool vgic_process_maintenance(struct kvm_vcpu
>>> *vcpu)
>>> return level_pending;
Hi Eric,
thanks for the review!
On 06/09/2015 09:52 AM, Eric Auger wrote:
> On 05/29/2015 11:53 AM, Andre Przywara wrote:
>> The ARM GICv3 ITS controller requires a separate register frame to
>> cover ITS specific registers. Add a new VGIC address type and store
>> the addr
Salut Eric,
On 06/09/2015 04:59 PM, Eric Auger wrote:
> On 05/29/2015 11:53 AM, Andre Przywara wrote:
>> As the actual LPI number in a guest can be quite high, but is mostly
>> assigned using a very sparse allocation scheme, bitmaps and arrays
>> for storing the virtual i
Hi Eric,
On 06/09/2015 09:52 AM, Eric Auger wrote:
> On 05/29/2015 11:53 AM, Andre Przywara wrote:
>> In the GICv3 redistributor there are the PENDBASER and PROPBASER
>> registers which we did not emulate so far, as they only make sense
>> when having an ITS. In preparation f
On 06/05/2015 05:41 PM, Will Deacon wrote:
> On Thu, Jun 04, 2015 at 04:20:45PM +0100, Andre Przywara wrote:
Hi Will,
sorry, almost forgot about this email...
>> In PCI config space there is an interrupt line field (offset 0x3f),
>> which is used to initially communicate the
Hi Marc,
On 06/10/2015 06:21 PM, Marc Zyngier wrote:
> On 05/06/15 09:37, Andre Przywara wrote:
>> Extend the vGIC handling code to potentially deal with different IRQ
>> chip devices instead of hard-coding the GICv2 in.
>> We extend most vGIC functions to take a type par
On 06/10/2015 06:40 PM, Marc Zyngier wrote:
> On 05/06/15 09:37, Andre Przywara wrote:
>> The code currently is assuming fixed sized memory regions for the
>> distributor and CPU interface. GICv3 needs a dynamic allocation of
>> its redistributor region, since its size dep
Hello,
some patches to fix at least the build of the new kvmtool for
PowerPC. I could only compile test it so far, so I'd be grateful
if people more familiar with that architecture can have a look
and maybe even test it on actual machines.
Cheers,
Andre.
Andre Przywara (3):
powerpc: impl
explicit big endianness switch from the linker call to
allow linking on little endian PowerPC builds again.
Signed-off-by: Andre Przywara
---
Hi,
this fixed the powerpc64le build for me, while still compiling fine
for big endian. Admittedly this whole init->guest_init.o conversion
has its iss
The powerpc code uses some PAPR hypercalls, of which we need the
hypercall number. Copy the macro definition parts from the kernel's
(private) hvcall.h file and remove the extra tricks formerly used
to be able to include this header file directly.
Signed-off-by: Andre Przywara
---
Hi,
I c
Instead of referring to the Linux header including the barrier
macros, copy over the rather simple implementation for the PowerPC
barrier instructions kvmtool uses. This fixes build for powerpc.
Signed-off-by: Andre Przywara
---
Hi,
I just took what kvmtool seems to have used before, I actually
d regards,
> Pavel Fedin
> Expert Engineer
> Samsung Electronics Research center Russia
>
>
>> -Original Message-
>> From: kvm-ow...@vger.kernel.org [mailto:kvm-ow...@vger.kernel.org] On Behalf
>> Of Pavel
>> Fedin
>> Sent: Wednesday, June 10, 20
branch with those patches included at my repo [2].
[1] git://git.kernel.org/pub/scm/linux/kernel/git/will/kvmtool.git
[2] git://linux-arm.org/kvmtool.git (branch gicv3/v3)
http://www.linux-arm.org/git?p=kvmtool.git;a=log;h=refs/heads/gicv3/v3
Andre Przywara (6):
arm: finish VGIC initialisation e
) header
files to allow compilation for ARM.
Signed-off-by: Andre Przywara
---
arm/gic.c | 36 +++-
arm/include/arm-common/gic.h | 3 ++-
arm/include/arm-common/kvm-arch.h | 7 +++
3 files changed, 44 insertions(+), 2 deletions(-)
diff
-off-by: Andre Przywara
Reviewed-by: Marc Zyngier
---
arm/gic.c | 25 ++---
1 file changed, 22 insertions(+), 3 deletions(-)
diff --git a/arm/gic.c b/arm/gic.c
index 8560c9b..99f0d2b 100644
--- a/arm/gic.c
+++ b/arm/gic.c
@@ -98,24 +98,43 @@ int gic__create(struct kvm *kvm
: Andre Przywara
---
arm/aarch64/include/kvm/kvm-arch.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arm/aarch64/include/kvm/kvm-arch.h
b/arm/aarch64/include/kvm/kvm-arch.h
index 2f08a26..4925736 100644
--- a/arm/aarch64/include/kvm/kvm-arch.h
+++ b/arm/aarch64/include/kvm
between
creation and initialisation more clearly and fix error path.]
Signed-off-by: Marc Zyngier
Signed-off-by: Andre Przywara
---
arm/gic.c| 69 +++-
arm/include/arm-common/gic.h | 2 +-
arm/kvm.c| 6 ++--
3 files
uture extensions
(like expanding the GIC regions).
To be in line with the other architectures, move the now simpler
code into a header file.
Signed-off-by: Andre Przywara
---
arm/include/arm-common/kvm-arch.h | 12
arm/include/arm-common/kvm-cpu-arch.h | 14 --
arm/kvm-
llocated so far.
Signed-off-by: Marc Zyngier
Signed-off-by: Andre Przywara
---
include/kvm/irq.h | 1 +
irq.c | 5 +
2 files changed, 6 insertions(+)
diff --git a/include/kvm/irq.h b/include/kvm/irq.h
index 4cec6f0..8a78e43 100644
--- a/include/kvm/irq.h
+++ b/include/kvm/irq.h
Currently we unconditionally create a virtual GICv2 in the guest.
Add a --irqchip= parameter to let the user specify a different GIC
type for the guest.
For now we the only other supported type is GICv3.
Signed-off-by: Andre Przywara
---
arm/aarch64/arm-cpu.c| 2 +-
arm
tes having reached a VCPU limit.
If we see this and have at least brought up one VCPU already
successfully, then don't panic, but limit the number of VCPUs instead.
Signed-off-by: Andre Przywara
---
arm/gic.c | 6 --
arm/kvm-cpu.c | 11 +--
kvm-cpu.c | 7 +++
3 fi
Extend the vGIC handling code to potentially deal with different IRQ
chip devices instead of hard-coding the GICv2 in.
We extend most vGIC functions to take a type parameter, but still put
GICv2 in at the top for the time being.
Signed-off-by: Andre Przywara
---
arm/aarch32/arm-cpu.c
gic__init_gic() to ease future expansion]
Signed-off-by: Marc Zyngier
Signed-off-by: Andre Przywara
---
arm/gic.c | 25 +
1 file changed, 25 insertions(+)
diff --git a/arm/gic.c b/arm/gic.c
index 1ff3663..8560c9b 100644
--- a/arm/gic.c
+++ b/arm/gic.c
@@ -1,10 +1,12
On 06/17/2015 01:53 PM, Marc Zyngier wrote:
> On 17/06/15 12:21, Andre Przywara wrote:
>> Currently the ARM GIC checks the number of VCPUs against a fixed
>> limit, which is GICv2 specific. Don't pretend we know better than the
>> kernel and let's get rid of that exp
Hi Marc,
On 06/17/2015 01:48 PM, Marc Zyngier wrote:
> On 17/06/15 12:21, Andre Przywara wrote:
>> Currently we separate any incoming MMIO request into one of the ARM
>> memory map regions and take care to spare the GIC.
>> It turns out that this is unnecessary, as we
The powerpc code uses some PAPR hypercalls, of which we need the
hypercall number. Copy just the needed macro definitions from the
kernel's (private) hvcall.h file and remove the extra tricks formerly
used to be able to include this header file directly.
Signed-off-by: Andre Przywara
-
Hi Eric,
On 06/18/2015 09:43 AM, Eric Auger wrote:
> On 05/29/2015 11:53 AM, Andre Przywara wrote:
>> If userspace has provided a base address for the ITS register frame,
>> we enable the bits that advertise LPIs in the GICv3.
>> When the guest has enabled LPIs and t
Hi,
On 06/17/2015 10:43 AM, Andre Przywara wrote:
> For converting the guest/init binary into an object file, we call
> the linker binary, setting the endianness to big endian explicitly
> when compiling kvmtool for powerpc.
> This breaks if the compiler is actually targetting l
rid of the PowerPC
overrides in the Makefile. Possible uses:
$ make CC="gcc -m64" LD="ld -melf64ppc"
(build kvmtool on a PowerPC toolchain defaulting to 32-bit)
$ make CC="gcc -m32" LD="ld -melf_i386"
(build a 32-bit binary on a multilib-enabled x86-64
Hi Will,
On 06/16/2015 06:06 PM, Will Deacon wrote:
> On Mon, Jun 15, 2015 at 11:45:38AM +0100, Andre Przywara wrote:
>> On 06/05/2015 05:41 PM, Will Deacon wrote:
>>> On Thu, Jun 04, 2015 at 04:20:45PM +0100, Andre Przywara wrote:
>>>> In PCI config space there is a
On 06/18/2015 04:03 PM, Pavel Fedin wrote:
> Hello!
>
>> But that fails compilation on ARM (which uses this file as well),
>> because we have a dummy fail function in the header if
>> CONFIG_HAVE_KVM_MSI is not defined.
>
> May be then remove that fail function too? Too many #ifdef's are not go
Hi Michael,
On 19/06/15 02:14, Michael Ellerman wrote:
> On Thu, 2015-06-18 at 16:50 +0100, Andre Przywara wrote:
>> Currently we set CC unconditionally to ${CROSS_COMPILE}gcc, the same
>> for LD.
>> Allow people to override the compiler name by specifying it explicitly
>
Hi Paolo,
On 19/06/15 10:59, Paolo Bonzini wrote:
>
>
> On 18/06/2015 17:50, Andre Przywara wrote:
>> Currently we set CC unconditionally to ${CROSS_COMPILE}gcc, the same
>> for LD.
>> Allow people to override the compiler name by specifying it explicitly
>&g
standard,
so lets fix this better sooner than later.
Signed-off-by: Andre Przywara
---
Hi,
TBH I don't know why we had those casts there in the first place,
but it works without them, even for -std=gnu89.
If people agree with this, we can think about dropping the forced
CFLAGS and LDFLAGS res
Hi Michael,
On 19/06/15 02:08, Michael Ellerman wrote:
> On Thu, 2015-06-18 at 15:52 +0100, Andre Przywara wrote:
>> Hi,
>>
>> On 06/17/2015 10:43 AM, Andre Przywara wrote:
>>> For converting the guest/init binary into an object file, we call
>>> the linke
Hi Eric,
I briefly looked over the series, the patches itself look good overall.
I have one or two comments on the actual code, but want to discuss the
general approach first (more a dump of some first thoughts):
On 18/06/15 18:40, Eric Auger wrote:
> With the advent of GICv3 ITS in-kernel emulat
Hi Eric,
On 18/06/15 18:40, Eric Auger wrote:
> On ARM, the MSI msg (address and data) comes along with
> out-of-band device ID information. The device ID encodes the device
> that composes the MSI msg. Let's create a new routing entry structure
> that enables to encode that information on top of
Hi Eric,
I went back reading the code and looked at how the x86 APIC works more
closely to understand the GSI routing better.
See below for more ...
On 22/06/15 10:21, Eric Auger wrote:
> On 06/22/2015 10:40 AM, Andre Przywara wrote:
>> Hi Eric,
>>
>> I briefly looked
Hi,
On 23/06/15 11:05, Michael Ellerman wrote:
> On Tue, 2015-06-23 at 11:33 +0200, Paolo Bonzini wrote:
>> On 19/06/2015 09:21, Michael Ellerman wrote:
>>> diff --git a/powerpc/spapr.h b/powerpc/spapr.h
>>> index 0537f881c0e4..7a377d093ef4 100644
>>> --- a/powerpc/spapr.h
>>> +++ b/powerpc/spapr.
rPC64, MIPS64, ARM, ARM64, i386 and
x86_64.
Please test whether this works with your toolchain / system!
Cheers,
Andre.
Andre Przywara (2):
Makefile: cleanup guest/init generation
Makefile: use xxd for converting guest/init
Makefile| 21 -
builtin-run.c | 8 -
The dependencies and targets for the guest userland binary are
currently not correct, some are redundant.
Fix them by splitting up guest/guest_init.o creation into its two
steps and describe the dependencies properly.
On the way use automatic variables in some rules.
Signed-off-by: Andre Przywara
the binary file. If this turns out to be not widely installed (it
seems to be part of the vim package in most distributions), we could
think about switching to a scripted implementation using "od" or some
printf trickery.
Signed-off-by: Andre Przywara
---
Makefile| 4 ++--
Hi Will,
do you want me to respin the whole series to address the remaining minor
comments in the last four patches or do you want to take patch 01-06
already (which I think Marc has already agreed upon)?
Then I would just send an updated version of the remaining patches.
Cheers,
Andre.
>
Extend the vGIC handling code to potentially deal with different IRQ
chip devices instead of hard-coding the GICv2 in.
We extend most vGIC functions to take a type parameter, but still put
GICv2 in at the top for the time being.
Signed-off-by: Andre Przywara
Reviewed-by: Marc Zyngier
---
arm
d at my repo [2].
[1] git://git.kernel.org/pub/scm/linux/kernel/git/will/kvmtool.git
[2] git://linux-arm.org/kvmtool.git (branch gicv3/v4)
http://www.linux-arm.org/git?p=kvmtool.git;a=log;h=refs/heads/gicv3/v4
Andre Przywara (6):
arm: finish VGIC initialisation explicitly
arm: simplify M
) header
files to allow compilation for ARM.
Signed-off-by: Andre Przywara
Reviewed-by: Marc Zyngier
---
arm/gic.c | 36 +++-
arm/include/arm-common/gic.h | 1 +
arm/include/arm-common/kvm-arch.h | 7 +++
3 files changed, 43 insertions
uture extensions
(like expanding the GIC regions).
To be in line with the other architectures, move the now simpler
code into a header file.
Signed-off-by: Andre Przywara
Reviewed-by: Marc Zyngier
---
arm/include/arm-common/kvm-arch.h | 12
arm/include/arm-common/kvm-cpu-arch.h
between
creation and initialisation more clearly and fix error path.]
Signed-off-by: Marc Zyngier
Signed-off-by: Andre Przywara
---
arm/gic.c| 69 +++-
arm/include/arm-common/gic.h | 2 +-
arm/kvm.c| 6 ++--
3 files
llocated so far.
Signed-off-by: Marc Zyngier
Signed-off-by: Andre Przywara
---
include/kvm/irq.h | 1 +
irq.c | 5 +
2 files changed, 6 insertions(+)
diff --git a/include/kvm/irq.h b/include/kvm/irq.h
index 4cec6f0..8a78e43 100644
--- a/include/kvm/irq.h
+++ b/include/kvm/irq.h
: Andre Przywara
---
arm/aarch64/include/kvm/kvm-arch.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arm/aarch64/include/kvm/kvm-arch.h
b/arm/aarch64/include/kvm/kvm-arch.h
index 2f08a26..4925736 100644
--- a/arm/aarch64/include/kvm/kvm-arch.h
+++ b/arm/aarch64/include/kvm
tes having reached a VCPU limit.
If we see this and have at least brought up one VCPU already
successfully, then don't panic, but limit the number of VCPUs instead.
Signed-off-by: Andre Przywara
---
arm/gic.c | 6 --
arm/kvm-cpu.c | 7 ++-
kvm-cpu.c | 7 +++
3 fi
-off-by: Andre Przywara
Reviewed-by: Marc Zyngier
---
arm/gic.c | 25 ++---
1 file changed, 22 insertions(+), 3 deletions(-)
diff --git a/arm/gic.c b/arm/gic.c
index 8560c9b..99f0d2b 100644
--- a/arm/gic.c
+++ b/arm/gic.c
@@ -98,24 +98,43 @@ int gic__create(struct kvm *kvm
gic__init_gic() to ease future expansion]
Signed-off-by: Marc Zyngier
Signed-off-by: Andre Przywara
---
arm/gic.c | 25 +
1 file changed, 25 insertions(+)
diff --git a/arm/gic.c b/arm/gic.c
index 1ff3663..8560c9b 100644
--- a/arm/gic.c
+++ b/arm/gic.c
@@ -1,10 +1,12
Currently we unconditionally create a virtual GICv2 in the guest.
Add a --irqchip= parameter to let the user specify a different GIC
type for the guest, when omitting this parameter it still defaults to
--irqchip=gicv2.
For now the only other supported type is --irqchip=gicv3
Signed-off-by: Andre
.
Signed-off-by: Andre Przywara
---
virtio/pci.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/virtio/pci.c b/virtio/pci.c
index 2dff13b..90fcd64 100644
--- a/virtio/pci.c
+++ b/virtio/pci.c
@@ -25,7 +25,7 @@ static int virtio_pci__init_ioeventfd(struct kvm *kvm, struct
Hi Will,
On 29/06/15 11:10, Will Deacon wrote:
> Hi Andre,
>
> On Thu, Jun 18, 2015 at 06:19:53PM +0100, Andre Przywara wrote:
>> I am tempted to remove shmem, since it's broken:
>> a) there is no upstream driver, only some out-of-tree uio driver module
>> in
Hi,
On 29/06/15 13:52, Christoffer Dall wrote:
> Hi Pavel,
>
> [Please cc the kvm/arm list for such patches according to the
> MAINTAINERS file in the future]
>
> On Mon, Jun 29, 2015 at 12:53:46PM +0300, Pavel Fedin wrote:
>> Some hardware (like Raspberry Pi 2) is capable of running KVM, howeve
Hi Christoffer,
thanks for your time to reviewing this! Was probably no pleasure ;-)
On 28/06/15 20:12, Christoffer Dall wrote:
> On Fri, May 29, 2015 at 10:53:18AM +0100, Andre Przywara wrote:
>> The ARM GICv3 ITS MSI controller requires a device ID to be able to
>> assign the p
Hi Eric,
On 29/06/15 16:37, Eric Auger wrote:
> This patch adds compilation and link against irqchip.
>
> On ARM, irqchip routing is not really useful since there is
> a single irqchip. However main motivation behind using irqchip
> code is to enable MSI routing code. With the support of in-kerne
Hi,
On 30/06/15 17:09, Will Deacon wrote:
> On Fri, Jun 26, 2015 at 02:16:15PM +0100, Andre Przywara wrote:
>> Currently the ARM GIC checks the number of VCPUs against a fixed
>> limit, which is GICv2 specific. Don't pretend we know better than the
>> kernel and let&
On 30/06/15 17:13, Will Deacon wrote:
> On Fri, Jun 26, 2015 at 02:16:18PM +0100, Andre Przywara wrote:
>> Currently we unconditionally create a virtual GICv2 in the guest.
>> Add a --irqchip= parameter to let the user specify a different GIC
>> type for the guest, when omitt
Hi Eric,
On 02/07/15 15:49, Eric Auger wrote:
> Hi Pavel,
> On 07/02/2015 09:26 AM, Pavel Fedin wrote:
>> Hello!
>>
>>> -Original Message-
>>> From: kvm-ow...@vger.kernel.org [mailto:kvm-ow...@vger.kernel.org] On
>>> Behalf Of Eric Auger
>>> Sent: Monday, June 29, 2015 6:37 PM
>>> To: er
Hi Eric,
just played a bit with the code and I could make things easier by the
following change:
On 29/06/15 16:37, Eric Auger wrote:
> Add a new kvm_extended_msi struct to store the additional device ID
> specific to ARM. kvm_kernel_irq_routing_entry union now encompasses
> this new struct.
>
>
Hi Eric,
On 29/06/15 16:37, Eric Auger wrote:
> If the ITS modality is not available, let's simply support MSI
> injection by transforming the MSI.data into an SPI ID.
>
> This becomes possible to use KVM_SIGNAL_MSI ioctl for arm too.
>
> Signed-off-by: Eric Auger
> ---
> arch/arm/kvm/Kconfig
Hi Pavel,
On 02/07/15 08:26, Pavel Fedin wrote:
> Hello!
>
>> -Original Message-
>> From: kvm-ow...@vger.kernel.org [mailto:kvm-ow...@vger.kernel.org] On Behalf
>> Of Eric Auger
>> Sent: Monday, June 29, 2015 6:37 PM
>> To: eric.au...@st.com; eric.au...@linaro.org;
>> linux-arm-ker...@
ool.git;a=log;h=refs/heads/gicv3/v5
Andre Przywara (6):
arm: finish VGIC initialisation explicitly
arm: simplify MMIO dispatching
limit number of VCPUs on demand
arm: prepare for instantiating different IRQ chip devices
arm: add support for supplying GICv3 redistributor addresses
between
creation and initialisation more clearly and fix error path.]
Signed-off-by: Marc Zyngier
Signed-off-by: Andre Przywara
---
arm/gic.c| 69 +++-
arm/include/arm-common/gic.h | 2 +-
arm/kvm.c| 6 ++--
3 files
llocated so far.
Signed-off-by: Marc Zyngier
Signed-off-by: Andre Przywara
---
include/kvm/irq.h | 1 +
irq.c | 5 +
2 files changed, 6 insertions(+)
diff --git a/include/kvm/irq.h b/include/kvm/irq.h
index 4cec6f0..8a78e43 100644
--- a/include/kvm/irq.h
+++ b/include/kvm/irq.h
: Andre Przywara
---
arm/aarch64/include/kvm/kvm-arch.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arm/aarch64/include/kvm/kvm-arch.h
b/arm/aarch64/include/kvm/kvm-arch.h
index 2f08a26..4925736 100644
--- a/arm/aarch64/include/kvm/kvm-arch.h
+++ b/arm/aarch64/include/kvm
-off-by: Andre Przywara
Reviewed-by: Marc Zyngier
---
arm/gic.c | 25 ++---
1 file changed, 22 insertions(+), 3 deletions(-)
diff --git a/arm/gic.c b/arm/gic.c
index 8560c9b..99f0d2b 100644
--- a/arm/gic.c
+++ b/arm/gic.c
@@ -98,24 +98,43 @@ int gic__create(struct kvm *kvm
) header
files to allow compilation for ARM.
Signed-off-by: Andre Przywara
Reviewed-by: Marc Zyngier
---
arm/gic.c | 36 +++-
arm/include/arm-common/gic.h | 1 +
arm/include/arm-common/kvm-arch.h | 7 +++
3 files changed, 43 insertions
gic__init_gic() to ease future expansion]
Signed-off-by: Marc Zyngier
Signed-off-by: Andre Przywara
---
arm/gic.c | 25 +
1 file changed, 25 insertions(+)
diff --git a/arm/gic.c b/arm/gic.c
index 1ff3663..8560c9b 100644
--- a/arm/gic.c
+++ b/arm/gic.c
@@ -1,10 +1,12
uture extensions
(like expanding the GIC regions).
To be in line with the other architectures, move the now simpler
code into a header file.
Signed-off-by: Andre Przywara
Reviewed-by: Marc Zyngier
---
arm/include/arm-common/kvm-arch.h | 12
arm/include/arm-common/kvm-cpu-arch.h
Currently we unconditionally create a virtual GICv2 in the guest.
Add a --irqchip= parameter to let the user specify a different GIC
type for the guest, when omitting this parameter it still defaults to
--irqchip=gicv2.
For now the only other supported type is --irqchip=gicv3
Signed-off-by: Andre
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