Re: [Qemu-devel] [kvm-unit-tests PATCHv5 3/3] arm: pmu: Add CPI checking

On 11/10/2015 09:05 PM, Andrew Jones wrote: > On Mon, Nov 02, 2015 at 09:58:14AM -0600, Andrew Jones wrote: >> On Fri, Oct 30, 2015 at 03:32:43PM -0400, Christopher Covington wrote: >>> Hi Drew, >>> >>> On 10/30/2015 09:00 AM, Andrew Jones wrote: >>&

Re: [PATCH] KVM/arm: kernel low level debug support for ARM32 virtual platforms

e, Nov 03, 2015 at 09:44:52AM -0800, Mario Smarduch wrote: >>>>> On 11/3/2015 8:33 AM, Christopher Covington wrote: >>>>>> On 11/02/2015 06:51 PM, Mario Smarduch wrote: >>>>>>>this is a re-post from couple weeks ago, please take time

Re: [PATCH] KVM/arm: kernel low level debug support for ARM32 virtual platforms

tual Platform" > + depends on ARCH_VIRT > + select DEBUG_UART_8250 > + help > + Say Y here if you want the debug print routines to direct > + their output to 8250 UART port on Kvmtool Virtual > + Platform. Appropriate add

Re: [PATCH v4 05/21] KVM: ARM64: Add reset and access handlers for PMSELR register

On 10/30/2015 02:21 AM, Shannon Zhao wrote: > From: Shannon Zhao > > Since the reset value of PMSELR_EL0 is UNKNOWN, use reset_unknown for > its reset handler. As it doesn't need to deal with the acsessing action Nit: accessing > specially, it uses default case to

Re: [PATCH v4 07/21] KVM: ARM64: PMU: Add perf event map and introduce perf event creating function

On 10/30/2015 02:21 AM, Shannon Zhao wrote: > From: Shannon Zhao > > When we use tools like perf on host, perf passes the event type and the > id of this event type category to kernel, then kernel will map them to > hardware event number and write this number to PMU

Re: [PATCH v4 17/21] KVM: ARM64: Add helper to handle PMCR register bits

On 10/30/2015 02:21 AM, Shannon Zhao wrote: > From: Shannon Zhao > > According to ARMv8 spec, when writing 1 to PMCR.E, all counters are > enabled by PMCNTENSET, while writing 0 to PMCR.E, all counters are > disabled. When writing 1 to PMCR.P, reset all event counters,

Re: [PATCH v4 08/21] KVM: ARM64: Add reset and access handlers for PMXEVTYPER register

It seems like it could have an accessor that redirected to PMEVTYPER. > + vcpu_sys_reg(vcpu, PMEVTYPER0_EL0 + val) = > + *vcpu_reg(vcpu, p->Rt); I tried to look around briefly but couldn't find counter number ran

Re: [Qemu-devel] [kvm-unit-tests PATCHv5 3/3] arm: pmu: Add CPI checking

Hi Drew, On 10/30/2015 09:00 AM, Andrew Jones wrote: > On Wed, Oct 28, 2015 at 03:12:55PM -0400, Christopher Covington wrote: >> Calculate the numbers of cycles per instruction (CPI) implied by ARM >> PMU cycle counter values. The code includes a strict checking facil

[kvm-unit-tests PATCHv5 2/3] arm: pmu: Check cycle count increases

Ensure that reads of the PMCCNTR_EL0 are monotonically increasing, even for the smallest delta of two subsequent reads. Signed-off-by: Christopher Covington <c...@codeaurora.org> Reviewed-by: Andrew Jones <drjo...@redhat.com> --- ar

[kvm-unit-tests PATCHv6] ARM PMU tests

inline assembly justification comments uniform. * Check argc properly. Thanks, Christopher Covington -- To unsubscribe from this list: send the line "unsubscribe kvm" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html

[kvm-unit-tests PATCHv5 1/3] arm: Add PMU test

Beginning with a simple sanity check of the control register, add a unit test for the ARM Performance Monitors Unit (PMU). Signed-off-by: Christopher Covington <c...@codeaurora.org> Reviewed-by: Andrew Jones <drjo...@redhat.com> --- arm/pmu.c

[kvm-unit-tests PATCHv5 3/3] arm: pmu: Add CPI checking

allow for different tests to be run on TCG versus KVM. Signed-off-by: Christopher Covington <c...@codeaurora.org> --- arm/pmu.c | 103 +- 1 file changed, 102 insertions(+), 1 deletion(-) diff --git a/arm/pmu.c b/arm/pmu.c index 4

Re: [Qemu-devel] [kvm-unit-tests PATCHv5 2/3] arm: pmu: Check cycle count increases

On 10/26/2015 11:58 AM, Andrew Jones wrote: > On Mon, Oct 26, 2015 at 11:38:49AM -0400, Christopher Covington wrote: >> Ensure that reads of the PMCCNTR_EL0 are monotonically increasing, >> even for the smallest delta of two subsequent reads. >> >> Signed-off-b

[kvm-unit-tests PATCHv5] ARM PMU tests

Changes from v4: * Add Drew's Reviewed-by to first patch. * Explain use of 32-bit cycle count values in AArch32. * Zero-initialize pmu_data struct before use in check_cycles_increase and check_cpi. While the insistence on not using memset is entirely my own vanity, I blame the funny syntax on

[kvm-unit-tests PATCHv5 1/3] arm: Add PMU test

Beginning with a simple sanity check of the control register, add a unit test for the ARM Performance Monitors Unit (PMU). Signed-off-by: Christopher Covington <c...@codeaurora.org> Reviewed-by: Andrew Jones <drjo...@redhat.com> --- arm/pmu.c

[kvm-unit-tests PATCHv5 3/3] arm: pmu: Add CPI checking

allow for different tests to be run on TCG versus KVM. Signed-off-by: Christopher Covington <c...@codeaurora.org> --- arm/pmu.c | 105 +- 1 file changed, 104 insertions(+), 1 deletion(-) diff --git a/arm/pmu.c b/arm/pmu.c index c

[kvm-unit-tests PATCHv5 2/3] arm: pmu: Check cycle count increases

Ensure that reads of the PMCCNTR_EL0 are monotonically increasing, even for the smallest delta of two subsequent reads. Signed-off-by: Christopher Covington <c...@codeaurora.org> --- arm/pmu.c | 60 1 file changed, 60 inse

Re: [Qemu-devel] [kvm-unit-tests PATCHv4 3/3] arm: pmu: Add CPI checking

supported by the in-line assembly code. >> The > > Not all odd counts, right? But rather all multiples of 3? IIUC this is because > the loop is two instructions (sub + branch), and then the clearing of the pmcr > register counts as the 3rd? Clearing the PMCR doesn't happe

Re: [PATCH v3 00/20] KVM: ARM64: Add guest PMU support

289068 seconds time elapsed >> ( +- 0.00% ) >> > > Thanks for V3. One suggestion is to run more perf stress tests, such as > "perf test". So we know the corner cases are covered as much as possible. I'd also recommend Vince

[kvm-unit-tests PATCHv4] ARM PMU tests

Changes from v3 in response to Drew's suggestions: * Improved pmu_data / PMCR fields and usage * Straightened out awkward conditionals * Added 32-bit support * Styling enhancements * Deferred -icount testing to later patch -- To unsubscribe from this list: send the line "unsubscribe kvm" in the

[kvm-unit-tests PATCHv4 1/3] arm: Add PMU test

Beginning with a simple sanity check of the control register, add a unit test for the ARM Performance Monitors Unit (PMU). Signed-off-by: Christopher Covington <c...@codeaurora.org> --- arm/pmu.c| 82 arm/unittes

[kvm-unit-tests PATCHv4 3/3] arm: pmu: Add CPI checking

allow for different tests to be run on TCG versus KVM. Signed-off-by: Christopher Covington <c...@codeaurora.org> --- arm/pmu.c | 91 ++- 1 file changed, 90 insertions(+), 1 deletion(-) diff --git a/arm/pmu.c b/arm/pmu.c index a

[kvm-unit-tests PATCHv4 2/3] arm: pmu: Check cycle count increases

Ensure that reads of the PMCCNTR_EL0 are monotonically increasing, even for the smallest delta of two subsequent reads. Signed-off-by: Christopher Covington <c...@codeaurora.org> --- arm/pmu.c | 54 ++ 1 file changed, 54 insertions(+)

[kvm-unit-tests PATCHv3 3/3] arm: pmu: Add CPI checking

Check the numbers of cycles per instruction (CPI) implied by ARM PMU cycle counter values. Check that in -icount mode these strictly match the specified rate. Signed-off-by: Christopher Covington <c...@codeaurora.org> --- arm/pmu.c

[kvm-unit-tests PATCHv3 1/3] arm: Add PMU test

Beginning with a simple sanity check of the control register, add a unit test for the ARM Performance Monitors Unit (PMU). Signed-off-by: Christopher Covington <c...@codeaurora.org> --- arm/pmu.c | 66 + arm/unittests.cfg

[kvm-unit-tests PATCHv3 2/3] arm: pmu: Check cycle count increases

Ensure that reads of the PMCCNTR_EL0 are monotonically increasing, even for the smallest delta of two subsequent reads. Signed-off-by: Christopher Covington <c...@codeaurora.org> --- arm/pmu.c | 29 + 1 file changed, 29 insertions(+) diff --git a/arm/pmu.c

[kvm-unit-tests PATCHv3] ARM PMU tests

Changes from v2: * Explicit test for monotonically increasing cycle count * Tests now pass or fail * Tests broken into functions * Tests/functions broken into separate patches in series * Style improvements as suggested by Wei Huang and Linux checkpatch.pl * Spelling and comment improvements --

[kvm-unit-tests PATCHv2] arm: Add PMU test

when using -icount. Signed-off-by: Christopher Covington <c...@codeaurora.org> --- arm/pmu.c | 89 + arm/unittests.cfg | 11 ++ config/config-arm64.mak | 4 ++- 3 files changed, 103 insertions(+), 1 deletion(-) creat

[PATCH] arm: Add PMU test

Beginning with just a read of the control register, add plumbing for testing the ARM Performance Monitors Unit (PMU). Signed-off-by: Christopher Covington <c...@codeaurora.org> --- arm/pmu.c| 31 +++ arm/unittests.cfg| 5 +

[PATCHv2] arm: Fail on unknown subtest

Signed-off-by: Christopher Covington <c...@codeaurora.org> --- arm/selftest.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arm/selftest.c b/arm/selftest.c index fc9ec60..f4a5030 100644 --- a/arm/selftest.c +++ b/arm/selftest.c @@ -376,6 +376,9 @@ int main(int argc, char

Re: add multiple times opening support to a virtserialport

? http://events.linuxfoundation.org/sites/events/files/slides/stefanha-kvm-forum-2015.pdf (Video doesn't seem to be up yet, but should probably be available eventually at the following link) https://www.youtube.com/playlist?list=PLW3ep1uCIRfyLNSu708gWG7uvqlolk0ep Regards, Christopher Covington

Re: [Qemu-devel] Announcing qboot, a minimal x86 firmware for QEMU

On 05/27/2015 05:30 AM, Paolo Bonzini wrote: On 26/05/2015 23:25, Christopher Covington wrote: On 05/25/2015 08:53 AM, Paolo Bonzini wrote: On 22/05/2015 13:12, Daniel P. Berrange wrote: In particular I don't see why we need to have a SATA controller and ISA/LPC bridge in every virt

Re: [Qemu-devel] Announcing qboot, a minimal x86 firmware for QEMU

On 05/25/2015 08:53 AM, Paolo Bonzini wrote: On 22/05/2015 13:12, Daniel P. Berrange wrote: In particular I don't see why we need to have a SATA controller and ISA/LPC bridge in every virt machine - root PCI bus only should be possible, as you can provide disks via virtio-blk or virtio-scsi

Re: Standardizing an MSR or other hypercall to get an RNG seed?

On 09/19/2014 05:46 PM, H. Peter Anvin wrote: On 09/19/2014 01:46 PM, Andy Lutomirski wrote: However, it sounds to me that at least for KVM, it is very easy just to emulate the RDRAND instruction. The hypervisor would report to the guest that RDRAND is supported in CPUID and the emulate the

Re: Standardizing an MSR or other hypercall to get an RNG seed?

On 09/19/2014 02:42 PM, Andy Lutomirski wrote: On Fri, Sep 19, 2014 at 11:30 AM, Christopher Covington c...@codeaurora.org wrote: On 09/17/2014 10:50 PM, Andy Lutomirski wrote: Hi all- I would like to standardize on a very simple protocol by which a guest OS can obtain an RNG seed early

Re: Standardizing an MSR or other hypercall to get an RNG seed?

On 09/17/2014 10:50 PM, Andy Lutomirski wrote: Hi all- I would like to standardize on a very simple protocol by which a guest OS can obtain an RNG seed early in boot. The main design requirements are: - The interface should be very easy to use. Linux, at least, will want to use it

Re: [RFC v2] ARM VM System Specification

Hi Peter, On 06/10/2014 10:42 AM, Peter Maydell wrote: On 28 March 2014 18:45, Christoffer Dall christoffer.d...@linaro.org wrote: ARM VM System Specification === The virtual hardware platform must provide a number of mandatory peripherals: Serial console: The

Re: [RFC] ARM VM System Sepcification

Hi Christoffer, On 02/26/2014 02:51 PM, Christoffer Dall wrote: On Wed, Feb 26, 2014 at 02:27:40PM -0500, Christopher Covington wrote: Image format The image format, as presented to the VM, needs to be well-defined in order for prepared disk images to be bootable across various

Re: [RFC] ARM VM System Sepcification

Hi Christoffer, On 02/26/2014 01:34 PM, Christoffer Dall wrote: ARM VM System Specification === Goal The goal of this spec is to allow suitably-built OS images to run on all ARM virtualization solutions, such as KVM or Xen. Would you consider including

Re: [RFC] ARM VM System Sepcification

On 02/26/2014 05:49 PM, Rob Herring wrote: On Wed, Feb 26, 2014 at 1:55 PM, Arnd Bergmann a...@arndb.de wrote: On Wednesday 26 February 2014 10:34:54 Christoffer Dall wrote: ARM VM System Specification === Goal The goal of this spec is to allow suitably-built

Re: [PATCH v2 00/30] Port of KVM to arm64

rework patch (ARM: KVM: promote vfp_host pointer to generic host cpu context). In my opinion things look good. Feel free to add the following to these patches. Reviewed-by: Christopher Covington c...@codeaurora.org [...] Cheers, Christopher -- Employee of Qualcomm Innovation Center, Inc. Qualcomm

Re: [PATCH 16/29] arm64: KVM: HYP mode world switch implementation

Hi Marc, On 03/13/2013 03:59 PM, Christopher Covington wrote: [...] Alternatively, you could consider storing the host registers in a slimmed-down vcpu structure for hosts, rather than on the stack. One potential argument for storing the host in the same sort of vcpu structure as the guest

Re: [kvmarm] [PATCH 14/29] arm64: KVM: guest one-reg interface

Hi Marc, Peter, On 03/14/2013 04:57 AM, Peter Maydell wrote: On 13 March 2013 20:34, Christopher Covington c...@codeaurora.org wrote: My guess at the goal of the code cited above in this email is that it's trying to sanity check that virtualization will work. Rather than taking a default

Re: [PATCH 22/29] arm64: KVM: define 32bit specific registers

Hi Marc, On 03/04/2013 10:47 PM, Marc Zyngier wrote: Define the 32bit specific registers (SPSRs, cp15...). Most CPU registers are directly mapped to a 64bit register (r0-x0...). Only the SPSRs have separate registers. cp15 registers are also mapped into their 64bit counterpart in most

Re: [PATCH 24/29] arm64: KVM: 32bit conditional execution emulation

Hi Marc, On 03/04/2013 10:47 PM, Marc Zyngier wrote: As conditionnal instructions can trap on AArch32, add the thinest conditional possible emulation layer to keep 32bit guests happy. [...] diff --git a/arch/arm64/kvm/emulate.c b/arch/arm64/kvm/emulate.c new file mode 100644 index

Re: [PATCH 28/29] arm64: KVM: 32bit guest fault injection

Hi Marc, Here are a few more preprocessor definition suggestions. On 03/04/2013 10:47 PM, Marc Zyngier wrote: Add fault injection capability for 32bit guests. Signed-off-by: Marc Zyngier marc.zyng...@arm.com --- arch/arm64/kvm/inject_fault.c | 79

Re: [PATCH 10/29] arm64: KVM: Cortex-A57 specific system registers handling

Hi Marc, I wonder if two of these registers could be handled in a generic fashion. On 03/04/2013 10:47 PM, Marc Zyngier wrote: Add the support code for Cortex-A57 specific system registers. Signed-off-by: Marc Zyngier marc.zyng...@arm.com --- arch/arm64/kvm/sys_regs_a57.c | 96

Re: [PATCH 16/29] arm64: KVM: HYP mode world switch implementation

Hi Marc, I like how you were able to use a common fpsimd_(save|restore) macro, and wonder if you can't do the same sort of thing for the general purpose registers and system registers. In the end, both guest and host are EL1 software, and while they may differ in terms of things like VTTBR

Re: [PATCH 14/29] arm64: KVM: guest one-reg interface

Hi Marc, On 03/13/2013 03:48 AM, Marc Zyngier wrote: On 12/03/13 22:07, Christopher Covington wrote: Hi Christopher, On 03/12/2013 02:05 PM, Marc Zyngier wrote: On 12/03/13 17:31, Christopher Covington wrote: Hi Marc, On 03/04/2013 10:47 PM, Marc Zyngier wrote: Let userspace play

Re: [PATCH 04/29] arm64: KVM: system register definitions for 64bit guests

Hi Marc, Here are a few minor questions and suggestions. On 03/04/2013 10:47 PM, Marc Zyngier wrote: Define the saved/restored registers for 64bit guests. Signed-off-by: Marc Zyngier marc.zyng...@arm.com --- arch/arm64/include/asm/kvm_asm.h | 68

Re: [PATCH 06/29] arm64: KVM: fault injection into a guest

Hi Marc, I noticed you went through the trouble of defining several constants in an earlier patch. Perhaps you could put them to use here? On 03/04/2013 10:47 PM, Marc Zyngier wrote: Implement the injection of a fault (undefined, data abort or prefetch abort) into a 64bit guest.

Re: [PATCH 04/29] arm64: KVM: system register definitions for 64bit guests

I now realize I accidentally appended some of the contents of the kvm_arm.h patch (03/29) and corresponding comment to my reply to the kvm_asm.h patch (04/29). If it's not clear what I meant, please let me know. Christopher -- Employee of Qualcomm Innovation Center, Inc. Qualcomm Innovation

Re: [PATCH 12/29] arm64: KVM: kvm_arch and kvm_vcpu_arch definitions

Hi Marc, On 03/04/2013 10:47 PM, Marc Zyngier wrote: Provide the architecture dependent structures for VM and vcpu abstractions. Signed-off-by: Marc Zyngier marc.zyng...@arm.com --- arch/arm64/include/asm/kvm_host.h | 178 ++ 1 file changed, 178

Re: [PATCH 14/29] arm64: KVM: guest one-reg interface

Hi Marc, On 03/04/2013 10:47 PM, Marc Zyngier wrote: Let userspace play with the guest registers. Signed-off-by: Marc Zyngier marc.zyng...@arm.com --- arch/arm64/kvm/guest.c | 240 + 1 file changed, 240 insertions(+) create mode 100644

Re: [PATCH 14/29] arm64: KVM: guest one-reg interface

Hi Marc, On 03/12/2013 02:05 PM, Marc Zyngier wrote: On 12/03/13 17:31, Christopher Covington wrote: Hi Marc, On 03/04/2013 10:47 PM, Marc Zyngier wrote: Let userspace play with the guest registers. Signed-off-by: Marc Zyngier marc.zyng...@arm.com --- arch/arm64/kvm/guest.c | 240