[v2] kvm/fpu: Enable eager restore kvm FPU for MPX

[Liang Li]

The MPX feature requires eager KVM FPU restore support. We have verified
that MPX cannot work correctly with the current lazy KVM FPU restore
mechanism. Eager KVM FPU restore should be enabled if the MPX feature is
exposed to VM.

Signed-off-by: Liang Li liang.z...@intel.com
Signed-off-by: Yang Zhang yang.z.zh...@intel.com
---
 arch/x86/include/asm/kvm_host.h | 1 +
 arch/x86/kvm/cpuid.c| 4 
 arch/x86/kvm/cpuid.h| 8 
 arch/x86/kvm/vmx.c  | 4 
 arch/x86/kvm/x86.c  | 3 ++-
 5 files changed, 19 insertions(+), 1 deletion(-)

diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h
index e61c3a4..4cb39d4 100644
--- a/arch/x86/include/asm/kvm_host.h
+++ b/arch/x86/include/asm/kvm_host.h
@@ -401,6 +401,7 @@ struct kvm_vcpu_arch {
struct kvm_mmu_memory_cache mmu_page_header_cache;
 
struct fpu guest_fpu;
+   bool eager_fpu;
u64 xcr0;
u64 guest_supported_xcr0;
u32 guest_xstate_size;
diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c
index 59b69f6..5ac5e4d 100644
--- a/arch/x86/kvm/cpuid.c
+++ b/arch/x86/kvm/cpuid.c
@@ -95,6 +95,10 @@ int kvm_update_cpuid(struct kvm_vcpu *vcpu)
if (best  (best-eax  (F(XSAVES) | F(XSAVEC
best-ebx = xstate_required_size(vcpu-arch.xcr0, true);
 
+   if (guest_cpuid_has_mpx(vcpu))
+   vcpu-arch.eager_fpu = true;
+   else
+   vcpu-arch.eager_fpu = false;
/*
 * The existing code assumes virtual address is 48-bit in the canonical
 * address checks; exit if it is ever changed.
diff --git a/arch/x86/kvm/cpuid.h b/arch/x86/kvm/cpuid.h
index c3b1ad9..496b369 100644
--- a/arch/x86/kvm/cpuid.h
+++ b/arch/x86/kvm/cpuid.h
@@ -117,4 +117,12 @@ static inline bool guest_cpuid_has_rtm(struct kvm_vcpu 
*vcpu)
best = kvm_find_cpuid_entry(vcpu, 7, 0);
return best  (best-ebx  bit(X86_FEATURE_RTM));
 }
+
+static inline bool guest_cpuid_has_mpx(struct kvm_vcpu *vcpu)
+{
+   struct kvm_cpuid_entry2 *best;
+
+   best = kvm_find_cpuid_entry(vcpu, 7, 0);
+   return best  (best-ebx  bit(X86_FEATURE_MPX));
+}
 #endif
diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
index f7b6168..030c1475 100644
--- a/arch/x86/kvm/vmx.c
+++ b/arch/x86/kvm/vmx.c
@@ -8445,6 +8445,10 @@ static struct kvm_vcpu *vmx_create_vcpu(struct kvm *kvm, 
unsigned int id)
goto free_vmcs;
}
 
+   /* activate fpu here is okay, because it will be deactivated soon if the
+* lazy fpu restore mode is used.
+*/
+   vmx_fpu_activate(vmx-vcpu);
return vmx-vcpu;
 
 free_vmcs:
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index 5f38188..4d9f8e9 100644
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -7060,7 +7060,8 @@ void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
fpu_save_init(vcpu-arch.guest_fpu);
__kernel_fpu_end();
++vcpu-stat.fpu_reload;
-   kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);
+   if (!vcpu-arch.eager_fpu)
+   kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);
trace_kvm_fpu(0);
 }
 
-- 
1.9.1

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[v6] kvm/fpu: Enable fully eager restore kvm FPU

[Liang Li]

Romove lazy FPU logic and use eager FPU entirely. Eager FPU does
not have performance regression, and it can simplify the code.

When compiling kernel on westmere, the performance of eager FPU
is about 0.4% faster than lazy FPU.

Signed-off-by: Liang Li liang.z...@intel.com
Signed-off-by: Xudong Hao xudong@intel.com
---
 arch/x86/include/asm/kvm_host.h |  1 -
 arch/x86/kvm/svm.c  | 22 ++--
 arch/x86/kvm/vmx.c  | 74 +++--
 arch/x86/kvm/x86.c  |  8 +
 include/linux/kvm_host.h|  2 --
 5 files changed, 9 insertions(+), 98 deletions(-)

diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h
index dea2e7e..5d84cc9 100644
--- a/arch/x86/include/asm/kvm_host.h
+++ b/arch/x86/include/asm/kvm_host.h
@@ -743,7 +743,6 @@ struct kvm_x86_ops {
void (*cache_reg)(struct kvm_vcpu *vcpu, enum kvm_reg reg);
unsigned long (*get_rflags)(struct kvm_vcpu *vcpu);
void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags);
-   void (*fpu_deactivate)(struct kvm_vcpu *vcpu);
 
void (*tlb_flush)(struct kvm_vcpu *vcpu);
 
diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c
index ce741b8..1b3b29b 100644
--- a/arch/x86/kvm/svm.c
+++ b/arch/x86/kvm/svm.c
@@ -1087,7 +1087,6 @@ static void init_vmcb(struct vcpu_svm *svm)
struct vmcb_control_area *control = svm-vmcb-control;
struct vmcb_save_area *save = svm-vmcb-save;
 
-   svm-vcpu.fpu_active = 1;
svm-vcpu.arch.hflags = 0;
 
set_cr_intercept(svm, INTERCEPT_CR0_READ);
@@ -1529,15 +1528,12 @@ static void update_cr0_intercept(struct vcpu_svm *svm)
ulong gcr0 = svm-vcpu.arch.cr0;
u64 *hcr0 = svm-vmcb-save.cr0;
 
-   if (!svm-vcpu.fpu_active)
-   *hcr0 |= SVM_CR0_SELECTIVE_MASK;
-   else
-   *hcr0 = (*hcr0  ~SVM_CR0_SELECTIVE_MASK)
-   | (gcr0  SVM_CR0_SELECTIVE_MASK);
+   *hcr0 = (*hcr0  ~SVM_CR0_SELECTIVE_MASK)
+   | (gcr0  SVM_CR0_SELECTIVE_MASK);
 
mark_dirty(svm-vmcb, VMCB_CR);
 
-   if (gcr0 == *hcr0  svm-vcpu.fpu_active) {
+   if (gcr0 == *hcr0) {
clr_cr_intercept(svm, INTERCEPT_CR0_READ);
clr_cr_intercept(svm, INTERCEPT_CR0_WRITE);
} else {
@@ -1568,8 +1564,6 @@ static void svm_set_cr0(struct kvm_vcpu *vcpu, unsigned 
long cr0)
if (!npt_enabled)
cr0 |= X86_CR0_PG | X86_CR0_WP;
 
-   if (!vcpu-fpu_active)
-   cr0 |= X86_CR0_TS;
/*
 * re-enable caching here because the QEMU bios
 * does not do it - this results in some delay at
@@ -1795,7 +1789,6 @@ static void svm_fpu_activate(struct kvm_vcpu *vcpu)
 
clr_exception_intercept(svm, NM_VECTOR);
 
-   svm-vcpu.fpu_active = 1;
update_cr0_intercept(svm);
 }
 
@@ -4139,14 +4132,6 @@ static bool svm_has_wbinvd_exit(void)
return true;
 }
 
-static void svm_fpu_deactivate(struct kvm_vcpu *vcpu)
-{
-   struct vcpu_svm *svm = to_svm(vcpu);
-
-   set_exception_intercept(svm, NM_VECTOR);
-   update_cr0_intercept(svm);
-}
-
 #define PRE_EX(exit)  { .exit_code = (exit), \
.stage = X86_ICPT_PRE_EXCEPT, }
 #define POST_EX(exit) { .exit_code = (exit), \
@@ -4381,7 +4366,6 @@ static struct kvm_x86_ops svm_x86_ops = {
.cache_reg = svm_cache_reg,
.get_rflags = svm_get_rflags,
.set_rflags = svm_set_rflags,
-   .fpu_deactivate = svm_fpu_deactivate,
 
.tlb_flush = svm_flush_tlb,
 
diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
index f5e8dce..811a666 100644
--- a/arch/x86/kvm/vmx.c
+++ b/arch/x86/kvm/vmx.c
@@ -1567,7 +1567,7 @@ static void update_exception_bitmap(struct kvm_vcpu *vcpu)
u32 eb;
 
eb = (1u  PF_VECTOR) | (1u  UD_VECTOR) | (1u  MC_VECTOR) |
-(1u  NM_VECTOR) | (1u  DB_VECTOR);
+(1u  DB_VECTOR);
if ((vcpu-guest_debug 
 (KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_SW_BP)) ==
(KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_SW_BP))
@@ -1576,8 +1576,6 @@ static void update_exception_bitmap(struct kvm_vcpu *vcpu)
eb = ~0;
if (enable_ept)
eb = ~(1u  PF_VECTOR); /* bypass_guest_pf = 0 */
-   if (vcpu-fpu_active)
-   eb = ~(1u  NM_VECTOR);
 
/* When we are running a nested L2 guest and L1 specified for it a
 * certain exception bitmap, we must trap the same exceptions and pass
@@ -1961,9 +1959,6 @@ static void vmx_fpu_activate(struct kvm_vcpu *vcpu)
 {
ulong cr0;
 
-   if (vcpu-fpu_active)
-   return;
-   vcpu-fpu_active = 1;
cr0 = vmcs_readl(GUEST_CR0);
cr0 = ~(X86_CR0_TS | X86_CR0_MP);
cr0 |= kvm_read_cr0_bits(vcpu, X86_CR0_TS | X86_CR0_MP);
@@ -1994,33 +1989,6 @@ static inline unsigned long nested_read_cr4(struct 
vmcs12 *fields)
(fields-cr4_read_shadow  fields