RE: [PATCH] KVM: x86: Add lowest-priority support for vt-d posted-interrupts

kernel.org > Subject: Re: [PATCH] KVM: x86: Add lowest-priority support for vt-d posted- > interrupts > > 2015-12-10 01:52+, Wu, Feng: > >> From: Radim Krčmář [mailto:rkrc...@redhat.com] > >> (Physical xAPIC+x2APIC mode is still somewhat reasonable and xAPIC CPUs >

Re: [PATCH] KVM: x86: Add lowest-priority support for vt-d posted-interrupts

2015-12-10 01:52+, Wu, Feng: >> From: Radim Krčmář [mailto:rkrc...@redhat.com] >> (Physical xAPIC+x2APIC mode is still somewhat reasonable and xAPIC CPUs >> start with LDR=0, which means that operating system doesn't need to >> utilize mixed mode, as defined by KVM, when switching to

RE: [PATCH] KVM: x86: Add lowest-priority support for vt-d posted-interrupts

Hi Radim, > -Original Message- > From: Radim Krčmář [mailto:rkrc...@redhat.com] > Sent: Tuesday, November 17, 2015 3:03 AM > To: Wu, Feng <feng...@intel.com> > Cc: pbonz...@redhat.com; kvm@vger.kernel.org; linux-ker...@vger.kernel.org > Subject: Re: [PATCH] KVM:

Re: [PATCH] KVM: x86: Add lowest-priority support for vt-d posted-interrupts

rnel.org >> Subject: Re: [PATCH] KVM: x86: Add lowest-priority support for vt-d posted- >> interrupts >> >> 2015-11-09 10:46+0800, Feng Wu: >> > +struct kvm_vcpu *kvm_intr_vector_hashing_dest(struct kvm *kvm, >> > +st

RE: [PATCH] KVM: x86: Add lowest-priority support for vt-d posted-interrupts

tel.com> > >> Cc: pbonz...@redhat.com; kvm@vger.kernel.org; linux- > ker...@vger.kernel.org > >> Subject: Re: [PATCH] KVM: x86: Add lowest-priority support for vt-d posted- > >> interrupts > >> > >> 2015-11-09 10:46+0800, Feng Wu: > >

Re: [PATCH] KVM: x86: Add lowest-priority support for vt-d posted-interrupts

2015-11-26 06:24+, Wu, Feng: >> From: Radim Krčmář [mailto:rkrc...@redhat.com] >> 2015-11-25 15:38+0100, Paolo Bonzini: >>> On 25/11/2015 15:12, Radim Krcmár wrote: I think it's ok to pick any algorithm we like. It's unlikely that software would recognize and take advantage of the

Re: [PATCH] KVM: x86: Add lowest-priority support for vt-d posted-interrupts

2015-11-25 15:38+0100, Paolo Bonzini: > On 25/11/2015 15:12, Radim Krcmár wrote: >> I think it's ok to pick any algorithm we like. It's unlikely that >> software would recognize and take advantage of the hardware algorithm >> without adding a special treatment for KVM. >> (I'd vote for the simple

RE: [PATCH] KVM: x86: Add lowest-priority support for vt-d posted-interrupts

ubject: Re: [PATCH] KVM: x86: Add lowest-priority support for vt-d posted- > interrupts > > 2015-11-25 15:38+0100, Paolo Bonzini: > > On 25/11/2015 15:12, Radim Krcmár wrote: > >> I think it's ok to pick any algorithm we like. It's unlikely that > >> software would r

Re: [PATCH] KVM: x86: Add lowest-priority support for vt-d posted-interrupts

On 25/11/2015 02:58, Wu, Feng wrote: > Okay, let me try to understand this clearly: > - We will have a new KVM command line parameter to indicate whether > vector hashing is enabled. > - If it is not enabled, for PI, we can only support single destination lowest > priority interrupts, for

Re: [PATCH] KVM: x86: Add lowest-priority support for vt-d posted-interrupts

2015-11-25 03:21+, Wu, Feng: > From: Radim Krčmář [mailto:rkrc...@redhat.com] >> The hash function just interprets a subset of vector's bits as a number >> and uses that as a starting offset in a search for an enabled APIC >> within the destination set? >> >> For example: >> The x2APIC

Re: [PATCH] KVM: x86: Add lowest-priority support for vt-d posted-interrupts

On 25/11/2015 15:12, Radim Krcmár wrote: > I think it's ok to pick any algorithm we like. It's unlikely that > software would recognize and take advantage of the hardware algorithm > without adding a special treatment for KVM. > (I'd vote for the simple pick-first-APIC lowest priority algorithm

RE: [PATCH] KVM: x86: Add lowest-priority support for vt-d posted-interrupts

: [PATCH] KVM: x86: Add lowest-priority support for vt-d posted- > interrupts > > > > On 24/11/2015 15:35, Radim Krcmár wrote: > > > Thanks for your guys' review. Yes, we can introduce a module option > > > for it. According to Radim's comments above, we need use the

RE: [PATCH] KVM: x86: Add lowest-priority support for vt-d posted-interrupts

> -Original Message- > From: Radim Krčmář [mailto:rkrc...@redhat.com] > Sent: Tuesday, November 24, 2015 10:32 PM > To: Wu, Feng <feng...@intel.com> > Cc: pbonz...@redhat.com; kvm@vger.kernel.org; linux- > ker...@vger.kernel.org > Subject: Re: [PATCH] KV

Re: [PATCH] KVM: x86: Add lowest-priority support for vt-d posted-interrupts

2015-11-24 01:26+, Wu, Feng: > "I don't think we do any vector hashing on our client parts. This may be why > the customer is not able to detect this on Skylake client silicon. > The vector hashing is micro-architectural and something we had done on server > parts. > > If you look at the

Re: [PATCH] KVM: x86: Add lowest-priority support for vt-d posted-interrupts

On 24/11/2015 15:35, Radim Krcmár wrote: > > Thanks for your guys' review. Yes, we can introduce a module option > > for it. According to Radim's comments above, we need use the > > same policy for PI and non-PI lowest-priority interrupts, so here is the > > question: for vector hashing, it is

Re: [PATCH] KVM: x86: Add lowest-priority support for vt-d posted-interrupts

2015-11-24 15:31+0100, Radim Krčmář: > 000 means that bits 7:4 of vector are selected, thus the vector hash is > 0b1110 = 14, so the round-robin effectively does 14 % 4 (because we only > have 4 destinations) and delivers to the 3rd possible APIC (= ID 6)? Ah, 3rd APIC in the set has ID 4, of

Re: [PATCH] KVM: x86: Add lowest-priority support for vt-d posted-interrupts

2015-11-24 01:26+, Wu, Feng: >> From: Paolo Bonzini [mailto:pbonz...@redhat.com] >> On 16/11/2015 20:03, Radim Krčmář wrote: >> > 2015-11-09 10:46+0800, Feng Wu: >> >> Use vector-hashing to handle lowest-priority interrupts for >> >> posted-interrupts. As an example, modern Intel CPUs use this

RE: [PATCH] KVM: x86: Add lowest-priority support for vt-d posted-interrupts

: [PATCH] KVM: x86: Add lowest-priority support for vt-d posted- > interrupts > > > > On 16/11/2015 20:03, Radim Krčmář wrote: > > 2015-11-09 10:46+0800, Feng Wu: > >> Use vector-hashing to handle lowest-priority interrupts for > >> posted-interrupts. As an exam

RE: [PATCH] KVM: x86: Add lowest-priority support for vt-d posted-interrupts

> -Original Message- > From: Radim Krčmář [mailto:rkrc...@redhat.com] > Sent: Tuesday, November 17, 2015 3:03 AM > To: Wu, Feng <feng...@intel.com> > Cc: pbonz...@redhat.com; kvm@vger.kernel.org; linux- > ker...@vger.kernel.org > Subject: Re: [PATCH] KVM: x86:

Re: [PATCH] KVM: x86: Add lowest-priority support for vt-d posted-interrupts

On 16/11/2015 20:03, Radim Krčmář wrote: > 2015-11-09 10:46+0800, Feng Wu: >> Use vector-hashing to handle lowest-priority interrupts for >> posted-interrupts. As an example, modern Intel CPUs use this >> method to handle lowest-priority interrupts. > > (I don't think it's a good idea that the

Re: [PATCH] KVM: x86: Add lowest-priority support for vt-d posted-interrupts

2015-11-09 10:46+0800, Feng Wu: > Use vector-hashing to handle lowest-priority interrupts for > posted-interrupts. As an example, modern Intel CPUs use this > method to handle lowest-priority interrupts. (I don't think it's a good idea that the algorithm differs from non-PI lowest priority

RE: [PATCH] KVM: x86: Add lowest-priority support for vt-d posted-interrupts

om> > Subject: [PATCH] KVM: x86: Add lowest-priority support for vt-d posted- > interrupts > > Use vector-hashing to handle lowest-priority interrupts for > posted-interrupts. As an example, modern Intel CPUs use this > method to handle lowest-priority interrupts. >

[PATCH] KVM: x86: Add lowest-priority support for vt-d posted-interrupts

Use vector-hashing to handle lowest-priority interrupts for posted-interrupts. As an example, modern Intel CPUs use this method to handle lowest-priority interrupts. Signed-off-by: Feng Wu --- arch/x86/include/asm/kvm_host.h | 2 ++ arch/x86/kvm/irq_comm.c | 52