Re: [PATCH] X86: expose latest Intel cpu new features to guest

[Avi Kivity]

On 11/28/2011 07:10 AM, Liu, Jinsong wrote:
 From 8bb5d052825149c211afa92458912bc49a50ee2f Mon Sep 17 00:00:00 2001
 From: Liu, Jinsong jinsong@intel.com
 Date: Mon, 28 Nov 2011 03:55:19 -0800
 Subject: [PATCH] X86: expose latest Intel cpu new features to guest

 Intel latest cpu add 6 new features, refer 
 http://software.intel.com/file/36945
 The new feature cpuid listed as below:
 1. FMACPUID.EAX=01H:ECX.FMA[bit 12]
 2. MOVBE  CPUID.EAX=01H:ECX.MOVBE[bit 22]
 3. BMI1   CPUID.EAX=07H,ECX=0H:EBX.BMI1[bit 3]
 4. AVX2   CPUID.EAX=07H,ECX=0H:EBX.AVX2[bit 5]
 5. BMI2   CPUID.EAX=07H,ECX=0H:EBX.BMI2[bit 8]
 6. LZCNT  CPUID.EAX=8001H:ECX.LZCNT[bit 5]

 This patch expose these features to guest.
 Among them, FMA/MOVBE/LZCNT has already been defined, MOVBE/LZCNT has already 
 been exposed.
 This patch defines BMI1/AVX2/BMI2, and exposes FMA/BMI1/AVX2/BMI2 to guest.



Thanks, applied.

-- 
error compiling committee.c: too many arguments to function

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[PATCH] X86: expose latest Intel cpu new features to guest

[Liu, Jinsong]

From 8bb5d052825149c211afa92458912bc49a50ee2f Mon Sep 17 00:00:00 2001
From: Liu, Jinsong jinsong@intel.com
Date: Mon, 28 Nov 2011 03:55:19 -0800
Subject: [PATCH] X86: expose latest Intel cpu new features to guest

Intel latest cpu add 6 new features, refer http://software.intel.com/file/36945
The new feature cpuid listed as below:
1. FMA  CPUID.EAX=01H:ECX.FMA[bit 12]
2. MOVBECPUID.EAX=01H:ECX.MOVBE[bit 22]
3. BMI1 CPUID.EAX=07H,ECX=0H:EBX.BMI1[bit 3]
4. AVX2 CPUID.EAX=07H,ECX=0H:EBX.AVX2[bit 5]
5. BMI2 CPUID.EAX=07H,ECX=0H:EBX.BMI2[bit 8]
6. LZCNTCPUID.EAX=8001H:ECX.LZCNT[bit 5]

This patch expose these features to guest.
Among them, FMA/MOVBE/LZCNT has already been defined, MOVBE/LZCNT has already 
been exposed.
This patch defines BMI1/AVX2/BMI2, and exposes FMA/BMI1/AVX2/BMI2 to guest.

Signed-off-by: Liu, Jinsong jinsong@intel.com
---
 arch/x86/include/asm/cpufeature.h |3 +++
 arch/x86/kvm/x86.c|4 ++--
 2 files changed, 5 insertions(+), 2 deletions(-)

diff --git a/arch/x86/include/asm/cpufeature.h 
b/arch/x86/include/asm/cpufeature.h
index f3444f7..17c5d4b 100644
--- a/arch/x86/include/asm/cpufeature.h
+++ b/arch/x86/include/asm/cpufeature.h
@@ -197,7 +197,10 @@
 
 /* Intel-defined CPU features, CPUID level 0x0007:0 (ebx), word 9 */
 #define X86_FEATURE_FSGSBASE   (9*32+ 0) /* {RD/WR}{FS/GS}BASE instructions*/
+#define X86_FEATURE_BMI1   (9*32+ 3) /* 1st group bit manipulation 
extensions */
+#define X86_FEATURE_AVX2   (9*32+ 5) /* AVX2 instructions */
 #define X86_FEATURE_SMEP   (9*32+ 7) /* Supervisor Mode Execution 
Protection */
+#define X86_FEATURE_BMI2   (9*32+ 8) /* 2nd group bit manipulation 
extensions */
 #define X86_FEATURE_ERMS   (9*32+ 9) /* Enhanced REP MOVSB/STOSB */
 
 #if defined(__KERNEL__)  !defined(__ASSEMBLY__)
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index 1985ea1..22255bc 100644
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -2443,7 +2443,7 @@ static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, 
u32 function,
F(XMM3) | F(PCLMULQDQ) | 0 /* DTES64, MONITOR */ |
0 /* DS-CPL, VMX, SMX, EST */ |
0 /* TM2 */ | F(SSSE3) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
-   0 /* Reserved */ | F(CX16) | 0 /* xTPR Update, PDCM */ |
+   F(FMA) | F(CX16) | 0 /* xTPR Update, PDCM */ |
0 /* Reserved, DCA */ | F(XMM4_1) |
F(XMM4_2) | F(X2APIC) | F(MOVBE) | F(POPCNT) |
0 /* Reserved*/ | F(AES) | F(XSAVE) | 0 /* OSXSAVE */ | F(AVX) |
@@ -2463,7 +2463,7 @@ static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, 
u32 function,
 
/* cpuid 7.0.ebx */
const u32 kvm_supported_word9_x86_features =
-   F(SMEP) | F(FSGSBASE) | F(ERMS);
+   F(FSGSBASE) | F(BMI1) | F(AVX2) | F(SMEP) | F(BMI2) | F(ERMS);
 
/* all calls to cpuid_count() should be made on the same cpu */
get_cpu();
-- 
1.5.6


kvm-expose_intel_new_features.patch
Description: kvm-expose_intel_new_features.patch