This moves iommu_table creation to the beginning to make following changes
easier to review. This starts using table parameters from the iommu_table
struct.

This should cause no behavioural change.

Signed-off-by: Alexey Kardashevskiy <a...@ozlabs.ru>
Reviewed-by: David Gibson <da...@gibson.dropbear.id.au>
Reviewed-by: Gavin Shan <gws...@linux.vnet.ibm.com>
---
Changes:
v9:
* updated commit log and did minor cleanup
---
 arch/powerpc/platforms/powernv/pci-ioda.c | 24 ++++++++++++------------
 1 file changed, 12 insertions(+), 12 deletions(-)

diff --git a/arch/powerpc/platforms/powernv/pci-ioda.c 
b/arch/powerpc/platforms/powernv/pci-ioda.c
index d7ac2d4..0e88241 100644
--- a/arch/powerpc/platforms/powernv/pci-ioda.c
+++ b/arch/powerpc/platforms/powernv/pci-ioda.c
@@ -2070,13 +2070,23 @@ static void pnv_pci_ioda2_setup_dma_pe(struct pnv_phb 
*phb,
        addr = page_address(tce_mem);
        memset(addr, 0, tce_table_size);
 
+       /* Setup linux iommu table */
+       pnv_pci_setup_iommu_table(tbl, addr, tce_table_size, 0,
+                       IOMMU_PAGE_SHIFT_4K);
+
+       tbl->it_ops = &pnv_ioda2_iommu_ops;
+       iommu_init_table(tbl, phb->hose->node);
+#ifdef CONFIG_IOMMU_API
+       pe->table_group.ops = &pnv_pci_ioda2_ops;
+#endif
+
        /*
         * Map TCE table through TVT. The TVE index is the PE number
         * shifted by 1 bit for 32-bits DMA space.
         */
        rc = opal_pci_map_pe_dma_window(phb->opal_id, pe->pe_number,
-                                       pe->pe_number << 1, 1, __pa(addr),
-                                       tce_table_size, 0x1000);
+                       pe->pe_number << 1, 1, __pa(tbl->it_base),
+                       tbl->it_size << 3, 1ULL << tbl->it_page_shift);
        if (rc) {
                pe_err(pe, "Failed to configure 32-bit TCE table,"
                       " err %ld\n", rc);
@@ -2085,20 +2095,10 @@ static void pnv_pci_ioda2_setup_dma_pe(struct pnv_phb 
*phb,
 
        pnv_pci_ioda2_tce_invalidate_entire(pe);
 
-       /* Setup linux iommu table */
-       pnv_pci_setup_iommu_table(tbl, addr, tce_table_size, 0,
-                       IOMMU_PAGE_SHIFT_4K);
-
        /* OPAL variant of PHB3 invalidated TCEs */
        if (phb->ioda.tce_inval_reg)
                tbl->it_type |= (TCE_PCI_SWINV_CREATE | TCE_PCI_SWINV_FREE);
 
-       tbl->it_ops = &pnv_ioda2_iommu_ops;
-       iommu_init_table(tbl, phb->hose->node);
-#ifdef CONFIG_IOMMU_API
-       pe->table_group.ops = &pnv_pci_ioda2_ops;
-#endif
-
        if (pe->flags & PNV_IODA_PE_DEV) {
                /*
                 * Setting table base here only for carrying iommu_group
-- 
2.4.0.rc3.8.gfb3e7d5

--
To unsubscribe from this list: send the line "unsubscribe kvm" in
the body of a message to majord...@vger.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html

Reply via email to