From 953edae7758f8414cc8de7edfc21699e6edc39cf Mon Sep 17 00:00:00 2001
From: Sheng Yang <[EMAIL PROTECTED]>
Date: Sun, 27 Jan 2008 11:25:29 +0800
Subject: [PATCH] kvm: libkvm/qemu: Support in-kernel PIT model
Add QEMU parameter for in-kernel PIT. Also disable userspace PIT when we using
the in-ke
From af5d9ee2a189c2f0998c5c46d1fcd25c5cb72f8c Mon Sep 17 00:00:00 2001
From: Sheng Yang <[EMAIL PROTECTED]>
Date: Mon, 28 Jan 2008 05:10:22 +0800
Subject: [PATCH] KVM: In-kernel PIT model
The patch moved PIT from userspace to kernel, and increase the timer accuracy
greatly.
Signed-off-by: Sheng
Hi,
Here is the updated in-kernel PIT model. The main improvements are:
1. The support of SMP PAE host is OK now.
2. The strategy of inject timer interrupt changed. To prevent much more
interrupt injection in some SMP guest(for example, more than 50k trying for
1k interrupts per second), the s
Sure, Changed, Thanks:)
Xiantao
Akio Takebe wrote:
> Hi, Xiantao and Anthony
>
> Good news!
> Could you update lists page of wiki?
> http://kvm.qumranet.com/kvmwiki/Lists%2C_IRC
>
> Best Regards,
>
> Akio Takebe
>
>> Hi, guys
>> We have created kvm-ia64-devel mailing list for discussing
>> ia
Jerone Young wrote:
> This set of patches is to enable PowerPC embedded KVM capablities to be taken
> advantage of by qemu.
>
> The code currently boots a ungziped uImage of the Linux kernel complied for
> PowerPC 440 AMCC Bamboo evalution board. We have not fully tested userspace,
> but fixes
# HG changeset patch
# User Jerone Young <[EMAIL PROTECTED]>
# Date 1201488336 21600
# Node ID 391b6488213008a4502b1753c26e8bd5200bd3c6
# Parent 3aa131f9bc863af5d029740b1579e747d3703c7e
Add qemu powerpc build support
This patch adds build support required to build ppcemb with KVM support for
powe
Avi Kivity wrote:
> I find it non-descriptive, and it reminds me of another hypervisor.
> I suggest 'tlp' for two-level paging.
That has its own ambiguity; without other context it reads like
"two-level pagetable". Anyway, using the same term for the same thing
is not a bad idea.
J
---
This set of patches is to enable PowerPC embedded KVM capablities to be taken
advantage of by qemu.
The code currently boots a ungziped uImage of the Linux kernel complied for
PowerPC 440 AMCC Bamboo evalution board. We have not fully tested userspace,
but fixes will follow as we do. We are al
# HG changeset patch
# User Jerone Young <[EMAIL PROTECTED]>
# Date 1201488336 21600
# Node ID 4b35e985aaf2021d956b09bd690c72ea5cadb007
# Parent a2740102bf6564a194e55b605c69886c56a37ece
Enhnace kvm-userspace configure script for powerpc
Add qemu option to tell qemu to compile ppcemb-softmmu, if A
# HG changeset patch
# User Christian Ehrhardt <[EMAIL PROTECTED]>
# Date 1201488336 21600
# Node ID 7c535acfd618f41aa6f49efa25e3fd6e1f75b633
# Parent 57f4e5bd23e0da3c493e769e3e2b738e1495f7ef
Chnage so that Powerpc & IA64 do not have KVM_EXTRA_PAGES set
IA64 already had an exclusion and so does p
# HG changeset patch
# User Jerone Young <[EMAIL PROTECTED]>
# Date 1201490062 21600
# Node ID 39f4363836421bc1f78f83c69ad10d76c58a678a
# Parent bf22e220977099e60b57be9e16d7d96487defdc1
Add Powerpc 440 board model "bamboo" to take advantage of Powerpc KVM.
This patch adds the bamboo board model t
# HG changeset patch
# User Jerone Young <[EMAIL PROTECTED]>
# Date 1201490017 21600
# Node ID bf22e220977099e60b57be9e16d7d96487defdc1
# Parent 391b6488213008a4502b1753c26e8bd5200bd3c6
Add powerpc KVM support to qemu.
This patch adds needed files and other modifications for supporting of powerp
# HG changeset patch
# User Christian Ehrhardt <[EMAIL PROTECTED]>
# Date 1201488336 21600
# Node ID 57f4e5bd23e0da3c493e769e3e2b738e1495f7ef
# Parent 4b35e985aaf2021d956b09bd690c72ea5cadb007
Ensure 4kB page alignment for embedded powerpc when using kvm
Powerpc needs 4kB aligned pages when using
# HG changeset patch
# User Jerone Young <[EMAIL PROTECTED]>
# Date 1201488336 21600
# Node ID 3aa131f9bc863af5d029740b1579e747d3703c7e
# Parent 7c535acfd618f41aa6f49efa25e3fd6e1f75b633
Add vcpu to arguments of powerpc libkvm callbacks
This patch adds vcpu as an argmunent for powerpc specific cal
Hi, Xiantao and Anthony
Good news!
Could you update lists page of wiki?
http://kvm.qumranet.com/kvmwiki/Lists%2C_IRC
Best Regards,
Akio Takebe
>Hi, guys
> We have created kvm-ia64-devel mailing list for discussing
>ia64-specific topics. Cheers!! If you have topics which only belongs to
>ia64,
Hi, guys
We have created kvm-ia64-devel mailing list for discussing
ia64-specific topics. Cheers!! If you have topics which only belongs to
ia64, please use this list! But if you have any cross-arch questions or
topics, please cc kvm-devel for involving more persons in.
We will open the lates
>From f582caf612b446e42f1e80d5ef12c5b7322efd03 Mon Sep 17 00:00:00 2001
From: Dor Laor <[EMAIL PROTECTED]>
Date: Mon, 28 Jan 2008 02:09:48 +0200
Subject: [PATCH] virtio_net tx performance fix
There was a problem with the location of the notify call in
add_buff function:
When VRING_USED_F_NO_NOTIFY
Avi Kivity wrote:
> Anthony Liguori wrote:
>> This patch updates KVM's virtio implementation to the latest virtio
>> ABI. This
>> includes a change in the network header and support for reset.
>>
>> With this patch, the block and network driver from Rusty's latest
>> queue are
>> functioning. M
Darrick J. Wong wrote:
> On Tue, Jan 15, 2008 at 12:13:40PM -0800, Darrick J. Wong wrote:
>
>> On Tue, Jan 15, 2008 at 05:07:46PM +0200, Avi Kivity wrote:
>>
>>
>>> Are you using qcow? If so, this may be the recently-committed smp aio
>>> deadlock fix. See 6bcdef5c1157bd7b526491252d20f80
Rusty Russell wrote:
> +
> +static void vp_reset(struct virtio_device *vdev)
> +{
> + struct virtio_pci_device *vp_dev = to_vp_device(vdev);
> + /* 0 status means a reset. */
> + return iowrite8(0, vp_dev->ioaddr + VIRTIO_PCI_STATUS);
> }
>
pci has something called FLR for function
Chris Lalancette wrote:
> Uri Lublin wrote:
>
>> Patch looks good.
>> Why did you define MIG_STAT_DIRTY_TRACK_FAIL and not
>> MIG_STAT_KVM_SET_DIRTY_TRACKING_FAILED ?
>>
>
> Oops, I slightly misunderstood this bit in my last e-mail. You were saying
> that
> there is already a "MIG_STAT_K
Joerg Roedel wrote:
>> On the other hand, we want to trap cr0 so the guest can't control the
>> cache disable bits. Also cr4.pce and cr4.mce.
>>
>
> Is it a problem when the guest disables caching? It disables it only in
> its own context because it has its own copy of cr0.
Some Intel proc
On Sun, Jan 27, 2008 at 11:51:06AM +0200, Avi Kivity wrote:
> Joerg Roedel wrote:
> >
> >> What happens to lazy fpu if we don't trap cr0 changes?
> >>
> >> Perhaps it's worth disabling lazy fpu with npt.
> >>
> >
> > It should be implicitly disabled with npt because accesses to cr3 are
> > not
On Sun, Jan 27, 2008 at 10:57:07AM +0200, Avi Kivity wrote:
> Joerg Roedel wrote:
> > Hi,
> >
> >
> > here is the first release of patches for KVM to support the Nested Pag
Joerg Roedel wrote:
>
>> What happens to lazy fpu if we don't trap cr0 changes?
>>
>> Perhaps it's worth disabling lazy fpu with npt.
>>
>
> It should be implicitly disabled with npt because accesses to cr3 are
> not intercepted anymore. The svm_set_cr3 function is the only place
> which disab
On Sun, Jan 27, 2008 at 10:52:30AM +0200, Avi Kivity wrote:
> Joerg Roedel wrote:
> > This patch contains the SVM architecture dependent changes for KVM to enable
> > support for the Nested Paging feature of AMD Barcelona and Phenom
> > processors.
> >
> > +#ifdef CONFIG_X86_64
> > +static bool
Joerg Roedel wrote:
> Hi,
>
>
> here is the first release of patches for KVM to support the Nested Paging
> (NPT)
> feature of AMD QuadCore CPUs for comments and public te
Joerg Roedel wrote:
> This patch contains the SVM architecture dependent changes for KVM to enable
> support for the Nested Paging feature of AMD Barcelona and Phenom processors.
>
> +#ifdef CONFIG_X86_64
> +static bool npt_enabled = true;
> +#else
> static bool npt_enabled = false;
> +#endif
>
Joerg Roedel wrote:
> The generic x86 code has to know if the specific implementation uses Nested
> Paging. In the generic code Nested Paging is called Hardware Assisted Paging
> (HAP) to avoid confusion with (future) HAP implementations of other vendors.
> This patch exports the availability of HA
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