Stephane
> > >There may be some propagation delay yet you, supposedly, do not suffer
> > >from masked
> > >interrupt windows. Also something to watch out for is that when you restore
> > >you must make sure that msrs upper bits are set to 1. Otherwise you may
> > >trigger
> > >unvoluntary interrup
Casey,
On Tue, Apr 03, 2007 at 10:46:38PM -0400, Casey Jeffery wrote:
> Stephane,
>
> I'm glad you found this; I thought I was going to have to repost while
> actually remembering to change the subject line.
>
Someone else pointed me to your message. The title was indeed misleading.
> >On Wed,
Stephane,
I'm glad you found this; I thought I was going to have to repost while
actually remembering to change the subject line.
> On Wed, Mar 28, 2007 at 01:02:47PM -0400, Casey Jeffery wrote:
> > I was messing around with using the perf counters a couple weeks ago
> > as a way to get determini
Casey,
On Wed, Mar 28, 2007 at 01:02:47PM -0400, Casey Jeffery wrote:
> I was messing around with using the perf counters a couple weeks ago
> as a way to get deterministic exits in the instruction stream of the
> guest. I used the h/w msr save/restore area to disable the counters
> and save the v
I was messing around with using the perf counters a couple weeks ago
as a way to get deterministic exits in the instruction stream of the
guest. I used the h/w msr save/restore area to disable the counters
and save the values on guest exit and restore them on entry. I also
set up the LVT to deliver
