-Original Message-
From: Wood Scott-B07421
Sent: Friday, September 20, 2013 11:38 PM
To: Bhushan Bharat-R65777
Cc: Wood Scott-B07421; b...@kernel.crashing.org; ag...@suse.de;
pau...@samba.org; k...@vger.kernel.org; kvm-ppc@vger.kernel.org; linuxppc-
d...@lists.ozlabs.org
Subject:
-Original Message-
From: Wood Scott-B07421
Sent: Friday, September 20, 2013 9:48 PM
To: Bhushan Bharat-R65777
Cc: Wood Scott-B07421; b...@kernel.crashing.org; ag...@suse.de;
pau...@samba.org; k...@vger.kernel.org; kvm-ppc@vger.kernel.org; linuxppc-
d...@lists.ozlabs.org
Subject:
On Fri, 2013-09-20 at 13:04 -0500, Bhushan Bharat-R65777 wrote:
-Original Message-
From: Wood Scott-B07421
Sent: Friday, September 20, 2013 9:48 PM
To: Bhushan Bharat-R65777
Cc: Wood Scott-B07421; b...@kernel.crashing.org; ag...@suse.de;
pau...@samba.org;
On Fri, Sep 20, 2013 at 02:52:40PM +1000, Paul Mackerras wrote:
@@ -536,6 +536,9 @@ struct kvm_get_htab_header {
#define KVM_REG_PPC_LPCR (KVM_REG_PPC | KVM_REG_SIZE_U32 | 0xb5)
#define KVM_REG_PPC_PPR (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0xb6)
+/* Architecture
This enables us to use the Processor Compatibility Register (PCR) on
POWER7 to put the processor into architecture 2.05 compatibility mode
when running a guest. In this mode the new instructions and registers
that were introduced on POWER7 are disabled in user mode. This
includes all the VSX
