Hi Paul,
I've just seen a crash on POWER7 in HV KVM on a host where I run HV and
PR KVM VMs in parallel based on the latest code (linus/master merged
with for-3.16 merged with kvm-ppc-queue plus some PR patches):
Unable to handle kernel paging request for data at address 0x000c
Faulting
On Mon, 30 Jun 2014 20:51:08 +1000
Paul Mackerras pau...@samba.org wrote:
I would like to see this go into 3.17.
FWIW: I've given this a whirl on s390 (with a dataplane disk), and
everything seems to work as before.
The only thing which is I think worth mentioning is that embedding the
routing
In preparation to make the check_extension function available to VM scope
we add a struct kvm * argument to the function header and rename the function
accordingly. It will still be called from the /dev/kvm fd, but with a NULL
argument for struct kvm *.
Signed-off-by: Alexander Graf ag...@suse.de
On PowerPC we have a small problem :). We can run both HV and PR style VMs
on the same kvm fd. While this is great, it means that anything that's
different between the two needs to have a token in form of a VM fd to find
out which one we're asking for.
The one thing where this bites us are CAPs.
With Book3S KVM we can create both PR and HV VMs in parallel on the same
machine. That gives us new challenges on the CAPs we return - both have
different capabilities.
When we get asked about CAPs on the kvm fd, there's nothing we can do. We
can try to be smart and assume we're running HV if HV
On 14.07.14 13:24, Alexander Graf wrote:
Hi Paul,
I've just seen a crash on POWER7 in HV KVM on a host where I run HV
and PR KVM VMs in parallel based on the latest code (linus/master
merged with for-3.16 merged with kvm-ppc-queue plus some PR patches):
I guess I must have used an older
The KVM_CHECK_EXTENSION is only available on the kvm fd today. Unfortunately
on PPC some of the capabilities change depending on the way a VM was created.
So instead we need a way to expose capabilities as VM ioctl, so that we can
see which VM type we're using (HV or PR). To enable this, add the
The KVM_CHECK_EXTENSION is only available on the kvm fd today. Unfortunately
on PPC some of the capabilities change depending on the way a VM was created.
So instead we need a way to expose capabilities as VM ioctl, so that we can
see which VM type we're using (HV or PR). To enable this, add the
The magic page is defined as a 4k page of per-vCPU data that is shared
between the guest and the host to accelerate accesses to privileged
registers.
However, when the host is using 64k page size granularity we weren't quite
as strict about that rule anymore. Instead, we partially treated all of
Ping?
There have been no comments on this patch series in two weeks, except
for Alex's comment that was mostly positive. Could someone put it
into the kvm tree please?
Thanks,
Paul.
On Mon, Jun 30, 2014 at 08:51:08PM +1000, Paul Mackerras wrote:
This series of patches provides a way to
When userspace (QEMU) is using the debug resource to debug guest
then we want MSR_DE to be always set. This patch adds missing
MSR_DE setting in rfci instruction.
Signed-off-by: Bharat Bhushan bharat.bhus...@freescale.com
---
arch/powerpc/kvm/booke_emulate.c | 6 +-
1 file changed, 5
This patch emulates debug registers and debug exception
to support guest using debug resource. This enables running
gdb/kgdb etc in guest.
On BOOKE architecture we cannot share debug resources between QEMU and
guest because:
When QEMU is using debug resources then debug exception must
be
This is not used and even I do not remember why this was added
in first place.
Signed-off-by: Bharat Bhushan bharat.bhus...@freescale.com
---
arch/powerpc/kvm/booke.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/arch/powerpc/kvm/booke.c b/arch/powerpc/kvm/booke.c
index ab62109..a5ee42c
This patch adds rfdi instruction emulation which is required for
guest debug hander on BOOKE-HV
Signed-off-by: Bharat Bhushan bharat.bhus...@freescale.com
---
arch/powerpc/include/asm/kvm_host.h | 1 +
arch/powerpc/kvm/booke_emulate.c| 17 +
2 files changed, 18 insertions(+)
This patchset adds debug register and interrupt emulation support
for guest, which enables running gdb/kgdb etc in guest.
This also have couple of bux fixes
Bharat Bhushan (6):
KVM: PPC: BOOKE: No need to set DBCR0_EDM in guest visible register
KVM: PPC: BOOKE: Force MSR_DE in rfci if guest
When userspace is debugging guest then MSR_DE is always set and
MSRP_DEP is set so that guest cannot change MSR_DE.
Guest debug resources are not yet emulated, So there seems no reason
we should stop guest controlling MSR_DE.
Also a followup patch will enable debug emulation and that requires
Debug interrupt can be either critical level or debug level.
There are separate set of save/restore registers used for different level.
Example: DSRR0/DSRR1 are used for debug level and CSRR0/CSRR1
are used for critical level debug interrupt.
Using CPU_FTR_DEBUG_LVL_EXC to decide which interrupt
On 09.07.14 00:59, Stewart Smith wrote:
Hi!
Thanks for review, much appreciated!
Alexander Graf ag...@suse.de writes:
On 08.07.14 07:06, Stewart Smith wrote:
@@ -1528,6 +1535,7 @@ static void kvmppc_run_core(struct kvmppc_vcore *vc)
int i, need_vpa_update;
int srcu_idx;
On Thu, Jul 10, 2014 at 01:05:47PM +0200, Alexander Graf wrote:
On 09.07.14 00:59, Stewart Smith wrote:
Hi!
Thanks for review, much appreciated!
Alexander Graf ag...@suse.de writes:
On 08.07.14 07:06, Stewart Smith wrote:
@@ -1528,6 +1535,7 @@ static void kvmppc_run_core(struct
On 10.07.14 15:07, Mel Gorman wrote:
On Thu, Jul 10, 2014 at 01:05:47PM +0200, Alexander Graf wrote:
On 09.07.14 00:59, Stewart Smith wrote:
Hi!
Thanks for review, much appreciated!
Alexander Graf ag...@suse.de writes:
On 08.07.14 07:06, Stewart Smith wrote:
@@ -1528,6 +1535,7 @@ static
On Thu, Jul 10, 2014 at 03:17:16PM +0200, Alexander Graf wrote:
On 10.07.14 15:07, Mel Gorman wrote:
On Thu, Jul 10, 2014 at 01:05:47PM +0200, Alexander Graf wrote:
On 09.07.14 00:59, Stewart Smith wrote:
Hi!
Thanks for review, much appreciated!
Alexander Graf ag...@suse.de writes:
On
While trying to get Mac-on-Linux to work on a POWER7 box I stumbled over two
issues in our book3s_32 MMU emulation. With these issues fixed and a hack to
disable magic page mapping (very hard to get right with 64k pages in this case)
I can successfully run Mac OS X guests on a POWER7 host.
Alex
When we have a page that we're not allowed to write to, xlate() will already
tell us -EPERM on lookup of that page. With the code as is we change it into
a page missing error which a guest may get confused about. Instead, just
tell the caller about the -EPERM directly.
This fixes Mac OS X guests
When a page lookup failed because we're not allowed to write to the page, we
should not overwrite that value with another lookup on the second PTEG which
will return page not found. Instead, we should just tell the caller that we
had a permission problem.
This fixes Mac OS X guests looping
Today we handle split real mode by mapping both instruction and data faults
into a special virtual address space that only exists during the split mode
phase.
This is good enough to catch 32bit Linux guests that use split real mode for
copy_from/to_user. In this case we're always prefixed with
These two registers are already saved in the block above. Aside from
being unnecessary, by the time we get down to the second save location
r8 no longer contains MMCR2, so we are clobbering the saved value with
PMC5.
MMCR2 primarily consists of counter freeze bits. So restoring the value
of PMC5
Commit ac5a8ee8 started using _GLOBAL_TOC on ppc32 code. Unfortunately it's only
defined for 64bit targets though. Define it for ppc32 as well, fixing the build
breakage that commit introduced.
Signed-off-by: Alexander Graf ag...@suse.de
---
arch/powerpc/include/asm/ppc_asm.h | 2 ++
1 file
We switched to ABIv2 on Little Endian systems now which gets rid of the
dotted function names. Branch to the actual functions when we see such
a system.
Signed-off-by: Alexander Graf ag...@suse.de
---
arch/powerpc/kvm/book3s_interrupts.S | 4
arch/powerpc/kvm/book3s_rmhandlers.S | 4
2
From: Anton Blanchard an...@samba.org
Both kvmppc_hv_entry_trampoline and kvmppc_entry_trampoline are
assembly functions that are exported to modules and also require
a valid r2.
As such we need to use _GLOBAL_TOC so we provide a global entry
point that establishes the TOC (r2).
Signed-off-by:
From: Mihai Caraman mihai.cara...@freescale.com
The patch 08c9a188d0d0fc0f0c5e17d89a06bb59c493110f
kvm: powerpc: use caching attributes as per linux pte
do not handle properly the error case, letting mmu_lock locked. The lock
will further generate a RCU stall from kvmppc_e500_emul_tlbwe()
From: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
With guests supporting Multiple page size per segment (MPSS),
hpte_page_size returns the actual page size used. Add a new function to
return base page size and use that to compare against the the page size
calculated from SLB. Without this
In commit b59d9d26b we introduced implicit byte swaps for RTAS calls.
Unfortunately we messed up and didn't swizzle return values properly.
Also the old approach wasn't sparse compatible - we were randomly
reading __be32 values on an LE system.
Let's just do all of the swizzling explicitly with
Hi Paolo / Marcelo,
This is my current patch queue for 3.16. Please pull.
Alex
The following changes since commit 5c02c392cd2320e8d612376d6b72b6548a680923:
Merge tag 'virtio-next-for-linus' of
git://git.kernel.org/pub/scm/linux/kernel/git/rusty/linux (2014-06-11 21:10:33
-0700)
are
Il 08/07/2014 12:04, Alexander Graf ha scritto:
Hi Paolo / Marcelo,
This is my current patch queue for 3.16. Please pull.
Alex
The following changes since commit 5c02c392cd2320e8d612376d6b72b6548a680923:
Merge tag 'virtio-next-for-linus' of
On 08.07.14 12:13, Paolo Bonzini wrote:
Il 08/07/2014 12:04, Alexander Graf ha scritto:
Hi Paolo / Marcelo,
This is my current patch queue for 3.16. Please pull.
Alex
The following changes since commit
5c02c392cd2320e8d612376d6b72b6548a680923:
Merge tag 'virtio-next-for-linus' of
In commit b59d9d26b we introduced implicit byte swaps for RTAS calls.
Unfortunately we messed up and didn't swizzle return values properly.
Also the old approach wasn't sparse compatible - we were randomly
reading __be32 values on an LE system.
Let's just do all of the swizzling explicitly with
On Fri, 2014-07-04 at 10:15 +0200, Alexander Graf wrote:
On 03.07.14 16:45, Mihai Caraman wrote:
diff --git a/arch/powerpc/kvm/booke.c b/arch/powerpc/kvm/booke.c
index a192975..ab1077f 100644
--- a/arch/powerpc/kvm/booke.c
+++ b/arch/powerpc/kvm/booke.c
@@ -1286,6 +1286,46 @@ int
On Thu, 2014-07-03 at 17:45 +0300, Mihai Caraman wrote:
Handle indirect entries (IND) in TLB emulation code. Translation size of IND
entries differ from the size of referred Page Tables (Linux guests now use IND
of 2MB for 4KB PTs) and this require careful tweak of the existing logic.
TLB
The POWER8 processor has a Micro Partition Prefetch Engine, which is
a fancy way of saying has way to store and load contents of L2 or
L2+MRU way of L3 cache. We initiate the storing of the log (list of
addresses) using the logmpp instruction and start restore by writing
to a SPR.
The logmpp
On 04.07.14 06:34, Madhavan Srinivasan wrote:
On Thursday 03 July 2014 05:21 PM, Alexander Graf wrote:
On 01.07.14 10:41, Madhavan Srinivasan wrote:
This patch adds kernel side support for software breakpoint.
Design is that, by using an illegal instruction, we trap to hypervisor
via
On 17.06.14 18:17, Alexander Graf wrote:
So far we've been able to successfully run HV KVM on big endian hosts, but
once you dive into little endian land things start to fall apart.
This patch set enables HV KVM for little endian hosts. This should be the
final piece left missing to get little
On 03.07.14 17:46, mihai.cara...@freescale.com wrote:
-Original Message-
From: Alexander Graf [mailto:ag...@suse.de]
Sent: Thursday, July 03, 2014 3:29 PM
To: Caraman Mihai Claudiu-B02008; kvm-ppc@vger.kernel.org
Cc: k...@vger.kernel.org; linuxppc-...@lists.ozlabs.org
Subject: Re:
On 04.07.14 09:46, Alexander Graf wrote:
On 03.07.14 17:46, mihai.cara...@freescale.com wrote:
-Original Message-
From: Alexander Graf [mailto:ag...@suse.de]
Sent: Thursday, July 03, 2014 3:29 PM
To: Caraman Mihai Claudiu-B02008; kvm-ppc@vger.kernel.org
Cc: k...@vger.kernel.org;
On 03.07.14 18:11, mihai.cara...@freescale.com wrote:
-Original Message-
From: Alexander Graf [mailto:ag...@suse.de]
Sent: Thursday, July 03, 2014 3:34 PM
To: Caraman Mihai Claudiu-B02008; kvm-ppc@vger.kernel.org
Cc: k...@vger.kernel.org; linuxppc-...@lists.ozlabs.org
Subject: Re:
On 03.07.14 08:12, Joel Stanley wrote:
These two registers are already saved in the block above. Aside from
being unnecessary, by the time we get down to the second save location
r8 no longer contains MMCR2, so we are clobbering the saved value with
PMC5.
Signed-off-by: Joel Stanley
On 03.07.14 16:45, Mihai Caraman wrote:
Handle LRAT error exception with support for lrat mapping and invalidation.
Signed-off-by: Mihai Caraman mihai.cara...@freescale.com
---
arch/powerpc/include/asm/kvm_host.h | 1 +
arch/powerpc/include/asm/kvm_ppc.h| 2 +
For FSL e6500 core the kernel uses power management SPR register (PWRMGTCR0)
to enable idle power down for cores and devices by setting up the idle count
period at boot time. With the host already controlling the power management
configuration the guest could simply benefit from it, so emulate
On 03.07.14 16:45, Mihai Caraman wrote:
KVM Book3E support for Hardware Page Tablewalk enabled guests.
It looks reasonably straight forward to me, though I have to admit that
I find the sind conditions pretty confusing.
Scott, would you mind to have a look at this set too? :)
Thanks a
On 04.07.14 10:17, Mihai Caraman wrote:
For FSL e6500 core the kernel uses power management SPR register (PWRMGTCR0)
to enable idle power down for cores and devices by setting up the idle count
period at boot time. With the host already controlling the power management
configuration the guest
When building KVM with a lot of vcores (NR_CPUS is big), we can potentially
get out of the ld immediate range for dereferences inside that struct.
Move the array to the end of our kvm_arch struct. This fixes compilation
issues with NR_CPUS=2048 for me.
Signed-off-by: Alexander Graf ag...@suse.de
On Friday 04 July 2014 12:18 PM, Alexander Graf wrote:
On 04.07.14 06:34, Madhavan Srinivasan wrote:
On Thursday 03 July 2014 05:21 PM, Alexander Graf wrote:
On 01.07.14 10:41, Madhavan Srinivasan wrote:
This patch adds kernel side support for software breakpoint.
Design is that, by using
On Thursday 03 July 2014 05:21 PM, Alexander Graf wrote:
On 01.07.14 10:41, Madhavan Srinivasan wrote:
This patch adds kernel side support for software breakpoint.
Design is that, by using an illegal instruction, we trap to hypervisor
via Emulation Assistance interrupt, where we check for
On Fri, Jul 04, 2014 at 12:56:58PM +0200, Alexander Graf wrote:
When building KVM with a lot of vcores (NR_CPUS is big), we can potentially
get out of the ld immediate range for dereferences inside that struct.
Move the array to the end of our kvm_arch struct. This fixes compilation
issues
On 02.07.14 19:28, bharat.bhus...@freescale.com wrote:
-Original Message-
From: Bhushan Bharat-R65777
Sent: Wednesday, July 02, 2014 5:07 PM
To: Wood Scott-B07421; Alexander Graf
Cc: kvm-ppc@vger.kernel.org; k...@vger.kernel.org
Subject: RE: [PATCH 2/2] KVM : powerpc/booke: Allow
On 01.07.14 10:41, Madhavan Srinivasan wrote:
This patch adds kernel side support for software breakpoint.
Design is that, by using an illegal instruction, we trap to hypervisor
via Emulation Assistance interrupt, where we check for the illegal instruction
and accordingly we return to Host or
On 30.06.14 20:18, Scott Wood wrote:
On Mon, 2014-06-30 at 15:54 +0300, Mihai Caraman wrote:
Tlb search operation used for victim hint relies on the default tlb set by the
host. When hardware tablewalk support is enabled in the host, the default tlb is
TLB1 which leads KVM to evict the bolted
On 30.06.14 17:34, Mihai Caraman wrote:
SPE/FP/AltiVec interrupts share the same numbers. Refactor SPE/FP exit handling
to accommodate AltiVec later on the same flow. Add kvmppc_supports_spe() to
detect
suport for the unit at runtime since it can be configured in the kernel but not
featured on
On 30.06.14 17:34, Mihai Caraman wrote:
Increase FPU laziness by calling kvmppc_load_guest_fp() just before
returning to guest instead of each sched in. Without this improvement
an interrupt may also claim floting point corrupting guest state.
How do you handle context switching with this
On 30.06.14 17:34, Mihai Caraman wrote:
Add KVM Book3E AltiVec support. KVM Book3E FPU support gracefully reuse host
infrastructure so follow the same approach for AltiVec.
Signed-off-by: Mihai Caraman mihai.cara...@freescale.com
Same comment here - I fail to see how we refetch Altivec state
On 28.06.14 00:49, Mihai Caraman wrote:
In the context of replacing kvmppc_ld() function calls with a version of
kvmppc_get_last_inst() which allow to fail, Alex Graf suggested this:
If we get EMULATE_AGAIN, we just have to make sure we go back into the guest.
No need to inject an ISI into
On 28.06.14 00:49, Mihai Caraman wrote:
On book3e, guest last instruction is read on the exit path using load
external pid (lwepx) dedicated instruction. This load operation may fail
due to TLB eviction and execute-but-not-read entries.
This patch lay down the path for an alternative solution
On 28.06.14 00:49, Mihai Caraman wrote:
On book3e, KVM uses load external pid (lwepx) dedicated instruction to read
guest last instruction on the exit path. lwepx exceptions (DTLB_MISS, DSI
and LRAT), generated by loading a guest address, needs to be handled by KVM.
These exceptions are
KVM Book3E support for Hardware Page Tablewalk enabled guests.
Mihai Caraman (4):
powerpc/booke64: Add LRAT next and max entries to tlb_core_data
structure
KVM: PPC: Book3E: Handle LRAT error exception
KVM: PPC: e500: TLB emulation for IND entries
KVM: PPC: e500mc: Advertise E.PT to
LRAT (Logical to Real Address Translation) is shared between hw threads.
Add LRAT next and max entries to tlb_core_data structure and initialize them.
Signed-off-by: Mihai Caraman mihai.cara...@freescale.com
---
arch/powerpc/include/asm/mmu-book3e.h | 7 +++
Handle indirect entries (IND) in TLB emulation code. Translation size of IND
entries differ from the size of referred Page Tables (Linux guests now use IND
of 2MB for 4KB PTs) and this require careful tweak of the existing logic.
TLB search emulation requires additional search in HW TLB0 (since
Handle LRAT error exception with support for lrat mapping and invalidation.
Signed-off-by: Mihai Caraman mihai.cara...@freescale.com
---
arch/powerpc/include/asm/kvm_host.h | 1 +
arch/powerpc/include/asm/kvm_ppc.h| 2 +
arch/powerpc/include/asm/mmu-book3e.h | 3 +
Enable E.PT for vcpus with MMU MAV 2.0 to support Hardware Page Tablewalk (HTW)
in guests.
Signed-off-by: Mihai Caraman mihai.cara...@freescale.com
---
arch/powerpc/kvm/e500_mmu.c | 6 +-
1 file changed, 1 insertion(+), 5 deletions(-)
diff --git a/arch/powerpc/kvm/e500_mmu.c
-Original Message-
From: Alexander Graf [mailto:ag...@suse.de]
Sent: Thursday, July 03, 2014 3:21 PM
To: Caraman Mihai Claudiu-B02008; kvm-ppc@vger.kernel.org
Cc: k...@vger.kernel.org; linuxppc-...@lists.ozlabs.org
Subject: Re: [PATCH 1/6 v2] KVM: PPC: Book3E: Use common defines for
On 03.07.14 17:25, mihai.cara...@freescale.com wrote:
-Original Message-
From: Alexander Graf [mailto:ag...@suse.de]
Sent: Thursday, July 03, 2014 3:21 PM
To: Caraman Mihai Claudiu-B02008; kvm-ppc@vger.kernel.org
Cc: k...@vger.kernel.org; linuxppc-...@lists.ozlabs.org
Subject: Re:
-Original Message-
From: Alexander Graf [mailto:ag...@suse.de]
Sent: Thursday, July 03, 2014 3:29 PM
To: Caraman Mihai Claudiu-B02008; kvm-ppc@vger.kernel.org
Cc: k...@vger.kernel.org; linuxppc-...@lists.ozlabs.org
Subject: Re: [PATCH 3/6 v2] KVM: PPC: Book3E: Increase FPU laziness
-Original Message-
From: Alexander Graf [mailto:ag...@suse.de]
Sent: Thursday, July 03, 2014 6:31 PM
To: Caraman Mihai Claudiu-B02008; Wood Scott-B07421; kvm-
p...@vger.kernel.org
Cc: k...@vger.kernel.org; linuxppc-...@lists.ozlabs.org
Subject: Re: [PATCH 1/6 v2] KVM: PPC: Book3E:
-Original Message-
From: Alexander Graf [mailto:ag...@suse.de]
Sent: Thursday, July 03, 2014 3:32 PM
To: Caraman Mihai Claudiu-B02008; kvm-ppc@vger.kernel.org
Cc: k...@vger.kernel.org; linuxppc-...@lists.ozlabs.org
Subject: Re: [PATCH 4/6 v2] KVM: PPC: Book3E: Add AltiVec support
-Original Message-
From: Alexander Graf [mailto:ag...@suse.de]
Sent: Thursday, July 03, 2014 3:34 PM
To: Caraman Mihai Claudiu-B02008; kvm-ppc@vger.kernel.org
Cc: k...@vger.kernel.org; linuxppc-...@lists.ozlabs.org
Subject: Re: [PATCH 5/6 v2] KVM: PPC: Book3E: Add ONE_REG AltiVec
-Original Message-
From: Alexander Graf [mailto:ag...@suse.de]
Sent: Thursday, July 03, 2014 4:37 PM
To: Caraman Mihai Claudiu-B02008; kvm-ppc@vger.kernel.org
Cc: k...@vger.kernel.org; linuxppc-...@lists.ozlabs.org
Subject: Re: [PATCH 3/5 v4] KVM: PPC: Book3s: Remove
Am 03.07.2014 um 18:18 schrieb mihai.cara...@freescale.com
mihai.cara...@freescale.com:
-Original Message-
From: Alexander Graf [mailto:ag...@suse.de]
Sent: Thursday, July 03, 2014 4:37 PM
To: Caraman Mihai Claudiu-B02008; kvm-ppc@vger.kernel.org
Cc: k...@vger.kernel.org;
On Thu, 2014-07-03 at 10:25 -0500, Caraman Mihai Claudiu-B02008 wrote:
-Original Message-
From: Alexander Graf [mailto:ag...@suse.de]
Sent: Thursday, July 03, 2014 3:21 PM
To: Caraman Mihai Claudiu-B02008; kvm-ppc@vger.kernel.org
Cc: k...@vger.kernel.org;
On 04.07.14 00:15, Scott Wood wrote:
On Thu, 2014-07-03 at 10:25 -0500, Caraman Mihai Claudiu-B02008 wrote:
-Original Message-
From: Alexander Graf [mailto:ag...@suse.de]
Sent: Thursday, July 03, 2014 3:21 PM
To: Caraman Mihai Claudiu-B02008; kvm-ppc@vger.kernel.org
Cc:
On Thu, 2014-07-03 at 17:15 -0500, Scott Wood wrote:
On Thu, 2014-07-03 at 10:25 -0500, Caraman Mihai Claudiu-B02008 wrote:
-Original Message-
From: Alexander Graf [mailto:ag...@suse.de]
Sent: Thursday, July 03, 2014 3:21 PM
To: Caraman Mihai Claudiu-B02008;
On 04.07.14 00:31, Scott Wood wrote:
On Thu, 2014-07-03 at 17:15 -0500, Scott Wood wrote:
On Thu, 2014-07-03 at 10:25 -0500, Caraman Mihai Claudiu-B02008 wrote:
-Original Message-
From: Alexander Graf [mailto:ag...@suse.de]
Sent: Thursday, July 03, 2014 3:21 PM
To: Caraman Mihai
On Fri, 2014-07-04 at 00:35 +0200, Alexander Graf wrote:
On 04.07.14 00:31, Scott Wood wrote:
On Thu, 2014-07-03 at 17:15 -0500, Scott Wood wrote:
On Thu, 2014-07-03 at 10:25 -0500, Caraman Mihai Claudiu-B02008 wrote:
-Original Message-
From: Alexander Graf [mailto:ag...@suse.de]
On 04.07.14 01:00, Scott Wood wrote:
On Fri, 2014-07-04 at 00:35 +0200, Alexander Graf wrote:
On 04.07.14 00:31, Scott Wood wrote:
On Thu, 2014-07-03 at 17:15 -0500, Scott Wood wrote:
On Thu, 2014-07-03 at 10:25 -0500, Caraman Mihai Claudiu-B02008 wrote:
-Original Message-
From:
On Mon, 2014-06-30 at 18:34 +0300, Mihai Caraman wrote:
Add KVM Book3E AltiVec support. KVM Book3E FPU support gracefully reuse host
infrastructure so follow the same approach for AltiVec.
Signed-off-by: Mihai Caraman mihai.cara...@freescale.com
---
v2:
- integrate Paul's FP/VMX/VSX
-Original Message-
From: Wood Scott-B07421
Sent: Tuesday, July 01, 2014 10:11 PM
To: Alexander Graf
Cc: Bhushan Bharat-R65777; kvm-ppc@vger.kernel.org; k...@vger.kernel.org
Subject: Re: [PATCH 2/2] KVM : powerpc/booke: Allow debug interrupt injection
to
guest
On Tue,
Paul Mackerras pau...@samba.org writes:
On Sun, Jun 29, 2014 at 04:47:33PM +0530, Aneesh Kumar K.V wrote:
We want to use virtual page class key protection mechanism for
indicating a MMIO mapped hpte entry or a guest hpte entry that is swapped out
in the host. Those hptes will be marked valid,
Paul Mackerras pau...@samba.org writes:
On Sun, Jun 29, 2014 at 04:47:34PM +0530, Aneesh Kumar K.V wrote:
As per ISA, we first need to mark hpte invalid (V=0) before we update
the hpte lower half bits. With virtual page class key protection mechanism
we want
to send any fault other than key
Paul Mackerras pau...@samba.org writes:
On Sun, Jun 29, 2014 at 04:47:31PM +0530, Aneesh Kumar K.V wrote:
This makes it consistent with h_enter where we clear the key
bits. We also want to use virtual page class key protection mechanism
for indicating host page fault. For that we will be
-Original Message-
From: Bhushan Bharat-R65777
Sent: Wednesday, July 02, 2014 5:07 PM
To: Wood Scott-B07421; Alexander Graf
Cc: kvm-ppc@vger.kernel.org; k...@vger.kernel.org
Subject: RE: [PATCH 2/2] KVM : powerpc/booke: Allow debug interrupt injection
to
guest
Am 30.06.2014 um 22:25 schrieb Scott Wood scottw...@freescale.com:
On Sun, 2014-06-29 at 23:38 -0500, Bhushan Bharat-R65777 wrote:
-Original Message-
From: Wood Scott-B07421
Sent: Friday, June 27, 2014 11:53 PM
To: Bhushan Bharat-R65777
Cc: ag...@suse.de;
This patch adds kernel side support for software breakpoint.
Design is that, by using an illegal instruction, we trap to hypervisor
via Emulation Assistance interrupt, where we check for the illegal instruction
and accordingly we return to Host or Guest. Patch also adds support for
software
-Original Message-
From: Alexander Graf [mailto:ag...@suse.de]
Sent: Tuesday, July 01, 2014 11:53 AM
To: Wood Scott-B07421
Cc: Bhushan Bharat-R65777; kvm-ppc@vger.kernel.org; k...@vger.kernel.org
Subject: Re: [PATCH 2/2] KVM : powerpc/booke: Allow debug interrupt injection
to
On 01.07.14 12:06, bharat.bhus...@freescale.com wrote:
-Original Message-
From: Alexander Graf [mailto:ag...@suse.de]
Sent: Tuesday, July 01, 2014 11:53 AM
To: Wood Scott-B07421
Cc: Bhushan Bharat-R65777; kvm-ppc@vger.kernel.org; k...@vger.kernel.org
Subject: Re: [PATCH 2/2] KVM :
-Original Message-
From: Alexander Graf [mailto:ag...@suse.de]
Sent: Tuesday, July 01, 2014 3:42 PM
To: Bhushan Bharat-R65777; Wood Scott-B07421
Cc: kvm-ppc@vger.kernel.org; k...@vger.kernel.org
Subject: Re: [PATCH 2/2] KVM : powerpc/booke: Allow debug interrupt injection
to
On 01.07.14 12:30, bharat.bhus...@freescale.com wrote:
-Original Message-
From: Alexander Graf [mailto:ag...@suse.de]
Sent: Tuesday, July 01, 2014 3:42 PM
To: Bhushan Bharat-R65777; Wood Scott-B07421
Cc: kvm-ppc@vger.kernel.org; k...@vger.kernel.org
Subject: Re: [PATCH 2/2] KVM :
On Tue, 2014-07-01 at 08:23 +0200, Alexander Graf wrote:
Am 30.06.2014 um 22:25 schrieb Scott Wood scottw...@freescale.com:
On Sun, 2014-06-29 at 23:38 -0500, Bhushan Bharat-R65777 wrote:
-Original Message-
From: Wood Scott-B07421
Sent: Friday, June 27, 2014 11:53 PM
On 01.07.14 16:58, Scott Wood wrote:
On Tue, 2014-07-01 at 08:23 +0200, Alexander Graf wrote:
Am 30.06.2014 um 22:25 schrieb Scott Wood scottw...@freescale.com:
On Sun, 2014-06-29 at 23:38 -0500, Bhushan Bharat-R65777 wrote:
-Original Message-
From: Wood Scott-B07421
Sent: Friday,
On Tue, 2014-07-01 at 17:04 +0200, Alexander Graf wrote:
On 01.07.14 16:58, Scott Wood wrote:
On Tue, 2014-07-01 at 08:23 +0200, Alexander Graf wrote:
I don't think QEMU should be aware of these limitations.
OK, but we should at least have some idea of how the whole thing is
supposed to
On 01.07.14 17:35, Scott Wood wrote:
On Tue, 2014-07-01 at 17:04 +0200, Alexander Graf wrote:
On 01.07.14 16:58, Scott Wood wrote:
On Tue, 2014-07-01 at 08:23 +0200, Alexander Graf wrote:
I don't think QEMU should be aware of these limitations.
OK, but we should at least have some idea of
On Tue, 2014-07-01 at 18:22 +0200, Alexander Graf wrote:
On 01.07.14 17:35, Scott Wood wrote:
On Tue, 2014-07-01 at 17:04 +0200, Alexander Graf wrote:
On 01.07.14 16:58, Scott Wood wrote:
On Tue, 2014-07-01 at 08:23 +0200, Alexander Graf wrote:
I don't think QEMU should be aware of these
On Sun, Jun 29, 2014 at 04:47:30PM +0530, Aneesh Kumar K.V wrote:
When calculating the lower bits of AVA field, use the shift
count based on the base page size. Also add the missing segment
size and remove stale comment.
Signed-off-by: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
On Sun, Jun 29, 2014 at 04:47:33PM +0530, Aneesh Kumar K.V wrote:
We want to use virtual page class key protection mechanism for
indicating a MMIO mapped hpte entry or a guest hpte entry that is swapped out
in the host. Those hptes will be marked valid, but have virtual page
class key set to
1201 - 1300 of 8127 matches
Mail list logo
