On Fri, 2015-09-25 at 17:30 +0300, Laurentiu Tudor wrote:
> On 09/24/2015 11:23 PM, Scott Wood wrote:
> > On Thu, 2015-09-24 at 15:57 +0300, Laurentiu Tudor wrote:
> > > Book-E MMUv2 present in e6500 cores supports
> > > powers of 2K page sizes while older MMUv1 cores
> > > support only powers of 4
On 09/24/2015 11:23 PM, Scott Wood wrote:
> On Thu, 2015-09-24 at 15:57 +0300, Laurentiu Tudor wrote:
>> Book-E MMUv2 present in e6500 cores supports
>> powers of 2K page sizes while older MMUv1 cores
>> support only powers of 4K page sizes, or in other
>> words the LSB of TSIZE on MMUv1 is always
On Thu, 2015-09-24 at 15:57 +0300, Laurentiu Tudor wrote:
> Book-E MMUv2 present in e6500 cores supports
> powers of 2K page sizes while older MMUv1 cores
> support only powers of 4K page sizes, or in other
> words the LSB of TSIZE on MMUv1 is always 0.
> Thus, on MMUv2 we must not strip the LSB.
Book-E MMUv2 present in e6500 cores supports
powers of 2K page sizes while older MMUv1 cores
support only powers of 4K page sizes, or in other
words the LSB of TSIZE on MMUv1 is always 0.
Thus, on MMUv2 we must not strip the LSB.
Signed-off-by: Mihai Caraman
[laurentiu.tu...@freescale.com: ad
