Re: [PATCH] KVM: PPC: e500: fix couple of shift operations on 64 bits

On Thu, Oct 01, 2015 at 03:58:03PM +0300, Laurentiu Tudor wrote: > Fix couple of cases where we shift left a 32-bit > value thus might get truncated results on 64-bit > targets. > > Signed-off-by: Laurentiu Tudor > Suggested-by: Scott Wood

Re: [PATCH][v2] KVM: PPC: e500: Emulate TMCFG0 TMRN register

On Fri, Sep 25, 2015 at 06:02:23PM +0300, Laurentiu Tudor wrote: > Emulate TMCFG0 TMRN register exposing one HW thread per vcpu. > > Signed-off-by: Mihai Caraman > [laurentiu.tu...@freescale.com: rebased on latest kernel, use > define instead of hardcoded value,

Re: [PATCH] powerpc/e6500: add TMCFG0 register definition

On Wed, Sep 23, 2015 at 06:06:22PM +0300, Laurentiu Tudor wrote: > The register is not currently used in the base kernel > but will be in a forthcoming kvm patch. > > Signed-off-by: Laurentiu Tudor Thanks, applied to my kvm-ppc-next branch. Paul. -- To

[PATCH] KVM: PPC: Book3S HV: Make H_REMOVE return correct HPTE value for absent HPTEs

This fixes a bug where the old HPTE value returned by H_REMOVE has the valid bit clear if the HPTE was an absent HPTE, as happens for HPTEs for emulated MMIO pages and for RAM pages that have been paged out by the host. If the absent bit is set, we clear it and set the valid bit, because from the

[PATCH] KVM: PPC: Book3S HV: Don't fall back to smaller HPT size in allocation ioctl

Currently the KVM_PPC_ALLOCATE_HTAB will try to allocate the requested size of HPT, and if that is not possible, then try to allocate smaller sizes (by factors of 2) until either a minimum is reached or the allocation succeeds. This is not ideal for userspace, particularly in migration scenarios,