[PATCH] KVM: PPC: fix suspicious use of conditional operator

This was signaled by a static code analysis tool. Signed-off-by: Laurentiu Tudor laurentiu.tu...@freescale.com Reviewed-by: Scott Wood scottw...@freescale.com --- arch/powerpc/kvm/e500_mmu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/powerpc/kvm/e500_mmu.c b/arch

[PATCH] KVM: PPC: check for lookup_linux_ptep() returning NULL

If passed a larger page size lookup_linux_ptep() may fail, so add a check for that and bail out if that's the case. This was found with the help of a static code analysis tool. Signed-off-by: Mihai Caraman mihai.cara...@freescale.com Signed-off-by: Laurentiu Tudor laurentiu.tu...@freescale.com Cc

[PATCH][RFC] KVM: PPC: fix suspicious use of conditional operator

This was signaled by a static code analysis tool. Signed-off-by: Laurentiu Tudor laurentiu.tu...@freescale.com --- arch/powerpc/kvm/e500_mmu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/powerpc/kvm/e500_mmu.c b/arch/powerpc/kvm/e500_mmu.c index 50860e9..29911a0

[PATCH] powerpc/e500: move qemu machine spec together with the rest

This way we get rid of an entire file with mostly duplicated code plus a Kconfig option that you always had to take care to check it in order for kvm to work. Signed-off-by: Laurentiu Tudor <laurentiu.tu...@freescale.com> --- arch/powerpc/platforms/85xx/Kconfig | 15 - arch/p

Re: [PATCH] powerpc/e500: move qemu machine spec together with the rest

On 09/10/2015 02:01 AM, Scott Wood wrote: > On Fri, 2015-09-04 at 15:46 +0300, Laurentiu Tudor wrote: >> This way we get rid of an entire file with mostly >> duplicated code plus a Kconfig option that you always >> had to take care to check it in order for kvm to w

[PATCH][v2] KVM: PPC: e6500: allow odd powers of 2K TLB1 sizes

for odd powers of 2K pages by not using two powers of 4K HW TLB1 entries to back them up. Signed-off-by: Mihai Caraman <mihai.cara...@freescale.com> [laurentiu.tu...@freescale.com: addressed review feedback, split in distinct patch] Signed-off-by: Laurentiu Tudor <lau

Re: [PATCH 1/2] KVM: PPC: e6500: Handle LRAT error exception

On 09/30/2015 01:32 PM, Laurentiu Tudor wrote: > On 09/25/2015 03:10 AM, Scott Wood wrote: >> On Thu, 2015-09-24 at 16:11 +0300, Laurentiu Tudor wrote: [snip] >>> b/arch/powerpc/kvm/e500_mmu_host.c >>> index 12d5c67..99ad88a 100644 >>> --- a/arch/powerp

Re: [PATCH 1/2] KVM: PPC: e6500: Handle LRAT error exception

On 09/25/2015 03:10 AM, Scott Wood wrote: > On Thu, 2015-09-24 at 16:11 +0300, Laurentiu Tudor wrote: >> diff --git a/arch/powerpc/kvm/bookehv_interrupts.S >> b/arch/powerpc/kvm/bookehv_interrupts.S >> index 81bd8a07..1e9fa2a 100644 >> --- a/arch/powerpc/kvm/bookehv

[PATCH] KVM: PPC: e500: fix couple of shift operations on 64 bits

Fix couple of cases where we shift left a 32-bit value thus might get truncated results on 64-bit targets. Signed-off-by: Laurentiu Tudor <laurentiu.tu...@freescale.com> Suggested-by: Scott Wood <scotttw...@freescale.com> --- arch/powerpc/kvm/e500_mmu_host.c | 4 ++-- 1 fil

Re: [PATCH 1/2] KVM: PPC: e6500: Handle LRAT error exception

On 09/30/2015 01:32 PM, Laurentiu Tudor wrote: > On 09/25/2015 03:10 AM, Scott Wood wrote: >> On Thu, 2015-09-24 at 16:11 +0300, Laurentiu Tudor wrote: [snip] >>> diff --git a/arch/powerpc/kvm/e500_mmu_host.c >>> b/arch/powerpc/kvm/e500_mmu_host.c >&g

[PATCH] powerpc/e6500: add TMCFG0 register definition

The register is not currently used in the base kernel but will be in a forthcoming kvm patch. Signed-off-by: Laurentiu Tudor <laurentiu.tu...@freescale.com> --- arch/powerpc/include/asm/reg_booke.h | 6 ++ 1 file changed, 6 insertions(+) diff --git a/arch/powerpc/include/asm/reg_book

[PATCH] KVM: PPC: e500: Emulate TMCFG0 TMRN register

Emulate TMCFG0 TMRN register exposing one HW thread per vcpu. Signed-off-by: Mihai Caraman <mihai.cara...@freescale.com> [laurentiu.tu...@freescale.com: rebased on latest kernel, use define instead of hardcoded value] Signed-off-by: Laurentiu Tudor <laurentiu.tu...@freescale.com&g

[PATCH] KVM: PPC: e6500: support powers of 2K TLB1 sizes

com> [laurentiu.tu...@freescale.com: addressed review feedback, split in distinct patch] Signed-off-by: Laurentiu Tudor <laurentiu.tu...@freescale.com> --- arch/powerpc/kvm/e500_mmu_host.c | 28 +--- 1 file changed, 21 insertions(+), 7 deletions(-) diff --git a/

[PATCH 2/2] KVM: PPC: e6500: TLB emulation for IND entries

leanup & other fixes] Signed-off-by: Laurentiu Tudor <laurentiu.tu...@freescale.com> --- arch/powerpc/include/asm/mmu-book3e.h | 2 + arch/powerpc/kvm/e500.h | 93 +-- arch/powerpc/kvm/e500_mmu.c | 92 ++--

[PATCH 0/2] KVM Book3E support for Hardware Page Tablewalk enabled guests

This is a revival of LRAT & HWPTW support that Mike submitted some time ago [1]. Patches are rebased and (most [2]) feedback addressed. Also, fixed some issues i noticed plus some cleanup. [1] https://patchwork.ozlabs.org/patch/366892/ https://patchwork.ozlabs.org/patch/366895/

[PATCH 1/2] KVM: PPC: e6500: Handle LRAT error exception

Handle LRAT error exception with support for lrat mapping and invalidation. Signed-off-by: Mihai Caraman <mihai.cara...@freescale.com> [laurentiu.tu...@freescale.com: addressed review feedback, refactoring, cleanup & other fixes] Signed-off-by: Laurentiu Tudor <laurentiu.tu...@