Re: [PATCH] kvm: x86: fix comment about {mmu,nested_mmu}.gva_to_gpa

On 30/12/2015 17:26, David Matlack wrote: > The comment had the meaning of mmu.gva_to_gpa and nested_mmu.gva_to_gpa > swapped. Fix that, and also add some details describing how each translation > works. > > Signed-off-by: David Matlack > --- > arch/x86/kvm/mmu.c | 10

Re: [PATCH v8 09/20] KVM: ARM64: Add access handler for event counter register

On 22/12/15 08:08, Shannon Zhao wrote: > From: Shannon Zhao > > These kind of registers include PMEVCNTRn, PMCCNTR and PMXEVCNTR which > is mapped to PMEVCNTRn. > > The access handler translates all aarch32 register offsets to aarch64 > ones and uses vcpu_sys_reg() to

[PATCH] arm64: KVM: Fix AArch64 guest userspace exception injection

At the moment, our fault injection is pretty limited. We always generate a SYNC exception into EL1, as if the fault was actually from EL1h, no matter how it was generated. This is obviously wrong, as EL0 can generate faults of its own (not to mention the pretty-much unused EL1t mode). This patch

Re: [PULL] KVM/ARM updates for 4.5

On 24/12/2015 12:12, Marc Zyngier wrote: > Hi Paolo, > > THis is the first pull request for the 4.5 merge window. Not much in > terms of features, but a rewrite of our 64bit world switch, making it > a lot nicer, maintainable, and much more likely to cope with things > like VHE. Also support

KVM pci-assign - iommu width is not sufficient for mapped address

Hi All, We are using Linux Kernel 3.18.19 for running KVM VM's with pci-assign'ed SRIOV VF interfaces. We understand that VFIO is the new recommended way, but unfortunately it reduces performance significantly on our IO workloads (upto the order of 40-50%) when compared to pci-passthrough. We

Re: [PATCH] kvm/s390: drop unpaired smp_mb

On 01/05/2016 05:20 PM, Michael S. Tsirkin wrote: > smp_mb on vcpu destroy isn't paired with anything, violating pairing > rules, and seems to be useless. > > Drop it. > > Signed-off-by: Michael S. Tsirkin Applied. (I had to fix this up a little to match kvm/next) Thanks >

Re: [PATCH RESEND] kvm:x86:Make sure kvm_write_guest successes for first call in kvm_write_wall_clock

On 30/12/2015 19:08, Nicholas Krause wrote: > This makes sure that kvm_write_guest successes for the first call > in order to make sure that the wall clock is successfully written > to the host system before being calucated as required by the > guest system. > > Signed-off-by: Nicholas Krause

Re: [Qemu-devel] How to reserve guest physical region for ACPI

On Tue, 5 Jan 2016 18:43:02 +0200 "Michael S. Tsirkin" wrote: > On Tue, Jan 05, 2016 at 05:30:25PM +0100, Igor Mammedov wrote: > > > > bios-linker-loader is a great interface for initializing some > > > > guest owned data and linking it together but I think it adds > > > >

Re: [PATCH v8 04/20] KVM: ARM64: Add access handler for PMCR register

On 22/12/15 08:07, Shannon Zhao wrote: > From: Shannon Zhao > > Add reset handler which gets host value of PMCR_EL0 and make writable > bits architecturally UNKNOWN except PMCR.E which is zero. Add an access > handler for PMCR. > > Signed-off-by: Shannon Zhao

Re: [PATCH v8 11/20] KVM: ARM64: Add access handler for PMINTENSET and PMINTENCLR register

On 22/12/15 08:08, Shannon Zhao wrote: > From: Shannon Zhao > > Since the reset value of PMINTENSET and PMINTENCLR is UNKNOWN, use > reset_unknown for its reset handler. Add a handler to emulate writing > PMINTENSET or PMINTENCLR register. > > Signed-off-by: Shannon

[PATCH 2/2] KVM: Remove KVM_REQ_MCLOCK_INPROGRESS to save a bit in vcpu->requests

Now that we are running out of the bits in vcpu->requests, using one of them just to call kvm_make_all_cpus_request() with a valid request number should be avoided. This patch achieves this by making kvm_make_all_cpus_request() handle an empty request. Signed-off-by: Takuya Yoshikawa

Re: [PATCH v8 16/20] KVM: ARM64: Add access handler for PMUSERENR register

On 2016/1/7 18:14, Marc Zyngier wrote: > On 22/12/15 08:08, Shannon Zhao wrote: >> > From: Shannon Zhao >> > >> > This register resets as unknown in 64bit mode while it resets as zero >> > in 32bit mode. Here we choose to reset it as zero for consistency. >> > >> >

Re: [PATCH v8 08/20] KVM: ARM64: Add access handler for event typer register

On 2015/12/22 16:08, Shannon Zhao wrote: > From: Shannon Zhao > > These kind of registers include PMEVTYPERn, PMCCFILTR and PMXEVTYPER > which is mapped to PMEVTYPERn or PMCCFILTR. > > The access handler translates all aarch32 register offsets to aarch64 > ones and

Re: [PATCH v8 01/20] ARM64: Move PMU register related defines to asm/pmu.h

On 22/12/15 08:07, Shannon Zhao wrote: > From: Shannon Zhao > > To use the ARMv8 PMU related register defines from the KVM code, > we move the relevant definitions to asm/pmu.h header file. > > Signed-off-by: Anup Patel > Signed-off-by: Shannon

Re: [PATCH v8 06/20] KVM: ARM64: Add access handler for PMCEID0 and PMCEID1 register

On 22/12/15 08:08, Shannon Zhao wrote: > From: Shannon Zhao > > Add access handler which gets host value of PMCEID0 or PMCEID1 when > guest access these registers. Writing action to PMCEID0 or PMCEID1 is > UNDEFINED. > > Signed-off-by: Shannon Zhao

Re: [PATCH v8 05/20] KVM: ARM64: Add access handler for PMSELR register

On 22/12/15 08:08, Shannon Zhao wrote: > From: Shannon Zhao > > Since the reset value of PMSELR_EL0 is UNKNOWN, use reset_unknown for > its reset handler. When reading PMSELR, return the PMSELR.SEL field to > guest. > > Signed-off-by: Shannon Zhao

Re: [PATCH v8 08/20] KVM: ARM64: Add access handler for event typer register

On 2016/1/7 19:03, Marc Zyngier wrote: > On 22/12/15 08:08, Shannon Zhao wrote: >> > From: Shannon Zhao >> > >> > These kind of registers include PMEVTYPERn, PMCCFILTR and PMXEVTYPER >> > which is mapped to PMEVTYPERn or PMCCFILTR. >> > >> > The access handler

Re: [PATCH v8 13/20] KVM: ARM64: Add access handler for PMSWINC register

On 22/12/15 08:08, Shannon Zhao wrote: > From: Shannon Zhao > > Add access handler which emulates writing and reading PMSWINC > register and add support for creating software increment event. > > Signed-off-by: Shannon Zhao > --- >

Re: [PATCH v8 16/20] KVM: ARM64: Add access handler for PMUSERENR register

On 22/12/15 08:08, Shannon Zhao wrote: > From: Shannon Zhao > > This register resets as unknown in 64bit mode while it resets as zero > in 32bit mode. Here we choose to reset it as zero for consistency. > > PMUSERENR_EL0 holds some bits which decide whether PMU

Re: [PATCH v8 03/20] KVM: ARM64: Add offset defines for PMU registers

On 22/12/15 08:07, Shannon Zhao wrote: > From: Shannon Zhao > > We are about to trap and emulate accesses to each PMU register > individually. This adds the context offsets for the AArch64 PMU > registers. > > Signed-off-by: Shannon Zhao

Re: [Qemu-devel] How to reserve guest physical region for ACPI

On Thu, Jan 07, 2016 at 11:30:25AM +0100, Igor Mammedov wrote: > On Tue, 5 Jan 2016 18:43:02 +0200 > "Michael S. Tsirkin" wrote: > > > On Tue, Jan 05, 2016 at 05:30:25PM +0100, Igor Mammedov wrote: > > > > > bios-linker-loader is a great interface for initializing some > > > > >

Re: [PATCH v8 04/20] KVM: ARM64: Add access handler for PMCR register

On 2016/1/7 18:43, Marc Zyngier wrote: > On 22/12/15 08:07, Shannon Zhao wrote: >> > From: Shannon Zhao >> > >> > Add reset handler which gets host value of PMCR_EL0 and make writable >> > bits architecturally UNKNOWN except PMCR.E which is zero. Add an access >> >

Re: [PATCH v8 08/20] KVM: ARM64: Add access handler for event typer register

On 07/01/16 12:09, Shannon Zhao wrote: > > > On 2015/12/22 16:08, Shannon Zhao wrote: >> From: Shannon Zhao >> >> These kind of registers include PMEVTYPERn, PMCCFILTR and PMXEVTYPER >> which is mapped to PMEVTYPERn or PMCCFILTR. >> >> The access handler translates all

Re: [PATCH 5/6] nvdimm acpi: let qemu handle _DSM method

On Tue, 5 Jan 2016 02:52:07 +0800 Xiao Guangrong wrote: > If dsm memory is successfully patched, we let qemu fully emulate > the dsm method > > This patch saves _DSM input parameters into dsm memory, tell dsm > memory address to QEMU, then fetch the result from

Re: [PATCH v8 20/20] KVM: ARM64: Add a new kvm ARM PMU device

On 22 December 2015 at 08:08, Shannon Zhao wrote: > From: Shannon Zhao > > Add a new kvm device type KVM_DEV_TYPE_ARM_PMU_V3 for ARM PMU. Implement > the kvm_device_ops for it. > > Signed-off-by: Shannon Zhao > --- >

Re: [PATCH 3/4] KVM: renumber architecture-dependent requests

On 01/07/2016 03:17 PM, Paolo Bonzini wrote: > Leave room for 4 more arch-independent requests. > The patch subject is wrong. "renumber architecture-dependent requests" --> "renumber kvm requests" as we also renumber the architecture independent ones. -- To unsubscribe from this list: send

Re: [PATCH] kvm: use PIT channel index in hpet_legacy_start mode

+-- On Thu, 7 Jan 2016, Paolo Bonzini wrote --+ | > Will this trigger the same issue like CVE-2015-7513 ? | > https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/commit/?id=0185604c2d82c560dab2f2933a18f797e74ab5a8 | | I am not sure (--verbose please :)) IIUC, it shouldn't, because

Re: [PATCH v8 19/20] KVM: ARM64: Free perf event of PMU when destroying vcpu

On Tue, 22 Dec 2015 16:08:14 +0800 Shannon Zhao wrote: > From: Shannon Zhao > > When KVM frees VCPU, it needs to free the perf_event of PMU. > > Signed-off-by: Shannon Zhao Reviewed-by: Marc Zyngier

Re: How to reserve guest physical region for ACPI

On Mon, 4 Jan 2016 21:17:31 +0100 Laszlo Ersek wrote: > Michael CC'd me on the grandparent of the email below. I'll try to add > my thoughts in a single go, with regard to OVMF. > > On 12/30/15 20:52, Michael S. Tsirkin wrote: > > On Wed, Dec 30, 2015 at 04:55:54PM +0100,

Re: [Qemu-devel] [PATCH 0/6] NVDIMM ACPI: introduce the framework of QEMU emulated DSM

On Tue, 5 Jan 2016 02:52:02 +0800 Xiao Guangrong wrote: > This patchset is against commit 5530427f0ca (acpi: extend aml_and() to > accept target argument) on pci branch of Michael's git tree > and can be found at: > https://github.com/xiaogr/qemu.git

Re: [PATCH 1/2] KVM: Remove unused KVM_REQ_KICK to save a bit in vcpu->requests

On 07/01/2016 12:43, Takuya Yoshikawa wrote: > Signed-off-by: Takuya Yoshikawa > --- > include/linux/kvm_host.h | 45 ++--- > 1 file changed, 22 insertions(+), 23 deletions(-) > > diff --git a/include/linux/kvm_host.h

Re: [PATCH] kvm: use PIT channel index in hpet_legacy_start mode

On 2016/1/7 20:32, P J P wrote: From: P J P While setting the KVM PIT counters in 'kvm_pit_load_count', if 'hpet_legacy_start' is set, the function disables the timer on channel[0], instead of the respective index 'channel'. Update it to use 'channel' index parameter.

Re: [PATCH v8 08/20] KVM: ARM64: Add access handler for event typer register

On 2016/1/7 19:03, Marc Zyngier wrote: > On 22/12/15 08:08, Shannon Zhao wrote: >> > From: Shannon Zhao >> > >> > These kind of registers include PMEVTYPERn, PMCCFILTR and PMXEVTYPER >> > which is mapped to PMEVTYPERn or PMCCFILTR. >> > >> > The access handler

Re: [PATCH v8 07/20] KVM: ARM64: PMU: Add perf event map and introduce perf event creating function

On Tue, 22 Dec 2015 16:08:02 +0800 Shannon Zhao wrote: > From: Shannon Zhao > > When we use tools like perf on host, perf passes the event type and the > id of this event type category to kernel, then kernel will map them to > hardware event

Re: [PATCH v8 00/20] KVM: ARM64: Add guest PMU support

On 07/01/16 14:12, Will Deacon wrote: > On Thu, Jan 07, 2016 at 02:10:38PM +, Marc Zyngier wrote: >> On 22/12/15 08:07, Shannon Zhao wrote: >>> From: Shannon Zhao >>> >>> This patchset adds guest PMU support for KVM on ARM64. It takes >>> trap-and-emulate approach.

Re: [PATCH v8 20/20] KVM: ARM64: Add a new kvm ARM PMU device

On 7 January 2016 at 14:49, Shannon Zhao wrote: > > > On 2016/1/7 22:36, Peter Maydell wrote: >> On 22 December 2015 at 08:08, Shannon Zhao wrote: >>> From: Shannon Zhao >>> >>> Add a new kvm device type

Re: [PATCH] virtio/s390: use dev_to_virtio

On Wed, 30 Dec 2015 22:05:25 +0800 Geliang Tang wrote: > Use dev_to_virtio() instead of open-coding it. > > Signed-off-by: Geliang Tang > --- > drivers/s390/virtio/virtio_ccw.c | 3 +-- > 1 file changed, 1 insertion(+), 2 deletions(-) Thanks, added

Re: [PATCH 3/4] KVM: renumber architecture-dependent requests

On 07/01/2016 16:27, Christian Borntraeger wrote: > On 01/07/2016 03:17 PM, Paolo Bonzini wrote: >> Leave room for 4 more arch-independent requests. > > The patch subject is wrong. > > "renumber architecture-dependent requests" > > --> "renumber kvm requests" > > as we also renumber the

Re: [PATCH 4/4] KVM: move architecture-dependent requests to arch/

On 07/01/2016 16:54, Christian Borntraeger wrote: > On 01/07/2016 03:17 PM, Paolo Bonzini wrote: > > Can you add at least a one line patch description? Yes, and it will be more than one line. :) "Since the numbers now overlap, it makes sense to enumerate them in asm/kvm_host.h rather than

Re: [PATCH v1 0/6] KVM: Hyper-V SynIC timers migration fixes

On 23/12/2015 12:28, Andrey Smetanin wrote: > During testing of Windows 2012R2 guest migration with > Hyper-V SynIC timers enabled we found several bugs > which lead to restoring guest in a hung state. > > This patch series provides several fixes to make the > migration of guest with Hyper-V

Re: [PATCH 4/4] KVM: move architecture-dependent requests to arch/

On 01/07/2016 03:17 PM, Paolo Bonzini wrote: Can you add at least a one line patch description? > Signed-off-by: Paolo Bonzini Reviewed-by: Christian Borntraeger > --- > arch/powerpc/include/asm/kvm_host.h | 4 >

Re: [PATCH v2 3/7] kvm/x86: Hyper-V unify stimer_start() and stimer_restart()

On 28/12/2015 16:27, Andrey Smetanin wrote: > This will be used in future to start Hyper-V SynIC timer > in several places by one logic in one function. > > Changes v2: > * drop stimer->count == 0 check inside stimer_start() > * comment stimer_start() assumptions Can you replace comments with

lovely meet dear

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