introduced a l1_events_blocked field in nested_vmx
which indicates there is still-pending event which blocked by
nested_run_pending,
and smart request a KVM_REQ_EVENT if there is a still-pending event which
blocked
by nested_run_pending.
Signed-off-by: Wanpeng Li
---
arch/x86/kvm/
Hi Jan,
On Wed, Jul 02, 2014 at 11:01:30AM +0200, Jan Kiszka wrote:
>On 2014-07-02 08:54, Wanpeng Li wrote:
>> This patch fix bug https://bugzilla.kernel.org/show_bug.cgi?id=72381
>>
>> If we didn't inject a still-pending event to L1 since nested_run_pending,
>> K
Hi Bandan,
On Wed, Jul 02, 2014 at 12:27:59PM -0400, Bandan Das wrote:
>Wanpeng Li writes:
>
>> This patch fix bug https://bugzilla.kernel.org/show_bug.cgi?id=72381
>I can also reproduce this easily with Linux as L1 by "slowing it down"
>eg. running with ept = 0
>
On Thu, Jul 03, 2014 at 01:15:26AM -0400, Bandan Das wrote:
>Jan Kiszka writes:
>
>> On 2014-07-02 08:54, Wanpeng Li wrote:
>>> This patch fix bug https://bugzilla.kernel.org/show_bug.cgi?id=72381
>>>
>>> If we didn't inject a still-
You should also Cc mm ML
On Thu, Jul 03, 2014 at 12:57:04AM -0700, jipan yang wrote:
>Hi,
>
>I've seen the problem quite a few times. Before spending more time on
>it, I'd like to have a quick check here to see if anyone ever saw the
>same problem? Hope it is a relevant question with this mail li
eventinj.flat and w/o my patch applied
SUMMARY: 13 tests, 0 failures
w/ eventinj.flat and w/ my patch applied
SUMMARY: 13 tests, 0 failures
I'm not sure if the bug you mentioned has any relationship with "Fail:
intercepted interrupt + hlt" which has already present before my patc
On Fri, Jul 04, 2014 at 07:43:14AM +0200, Jan Kiszka wrote:
>On 2014-07-04 04:52, Wanpeng Li wrote:
>> On Thu, Jul 03, 2014 at 01:27:05PM -0400, Bandan Das wrote:
>> [...]
>>> # modprobe kvm_intel ept=0 nested=1 enable_shadow_vmcs=0
>>>
>>> The Host CPU
On Thu, Jul 03, 2014 at 01:15:26AM -0400, Bandan Das wrote:
>Jan Kiszka writes:
>
>> On 2014-07-02 08:54, Wanpeng Li wrote:
>>> This patch fix bug https://bugzilla.kernel.org/show_bug.cgi?id=72381
>>>
>>> If we didn't inject a still-
mcs in
nested_free_all_saved_vmcss() and kfree it after free_loaded_vmcs(). This can
also avoid use after free bug.
Signed-off-by: Wanpeng Li
---
arch/x86/kvm/vmx.c | 15 +++
1 file changed, 11 insertions(+), 4 deletions(-)
diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
index 0
On Fri, Jul 04, 2014 at 09:19:54AM +0200, Jan Kiszka wrote:
>On 2014-07-04 08:08, Wanpeng Li wrote:
>> On Fri, Jul 04, 2014 at 07:43:14AM +0200, Jan Kiszka wrote:
>>> On 2014-07-04 04:52, Wanpeng Li wrote:
>>>> On Thu, Jul 03, 2014 at 01:27:05PM -0400, Bandan Das wrot
On Fri, Jul 04, 2014 at 09:46:38AM +0200, Paolo Bonzini wrote:
>Il 04/07/2014 09:39, Wanpeng Li ha scritto:
>>PASS: test vmxon with FEATURE_CONTROL cleared
>>PASS: test vmxon without FEATURE_CONTROL lock
>>PASS: test enable VMX in FEATURE_CONTROL
>>PASS: test FEATURE_CO
On Fri, Jul 04, 2014 at 10:14:34AM +0200, Paolo Bonzini wrote:
>Il 04/07/2014 09:59, Wanpeng Li ha scritto:
>>>>You are not running the latest versions of the tests.
>>>>
>>The last commit in my tree is
>>
>>commit daeec9795d3e6d4e9636588b6cb5fcd6e00d6
>I do think this patch is doing the right thing, but it's just exposing another
>bug somewhere else :)
Agreed.
Hi Paolo,
Is it ok for you to apply this patch and then more effort should be taken
to figure out the other bug which don't have any relationship with the race
that this patch fixed?
Regards,
Wanpeng Li
>
>Bandan
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On Wed, Jul 02, 2014 at 05:00:37PM +0800, Tang Chen wrote:
>apic access page is pinned in memory, and as a result it cannot be
>migrated/hot-removed.
>
>Actually it doesn't need to be pinned in memory.
>
>This patch introduces a new vcpu request: KVM_REQ_MIGRATE_EPT. This requet
s/KVM_REQ_MIGRATE_
ged."
Your
trick still keep the unconditionally setting KVM_REQ_EVENT which is the root
cause
of the race there, anyway, I focus on fix the hang currently and a patch will
be
submitted soon.
Regards,
Wanpeng Li
>
>> Paolo
>>
>>> I think that will take care of
>
On Mon, Jul 07, 2014 at 03:03:13PM +0200, Paolo Bonzini wrote:
>Il 07/07/2014 10:46, Wanpeng Li ha scritto:
>>Hi Paolo,
>>
>>Is it ok for you to apply this patch and then more effort should be taken
>>to figure out the other bug which don't have any relationship
;
>Thinking more about it, I think this is the right fix. Not setting
>KVM_REQ_EVENT in some cases can be an optimization, but it's not
>necessary. Definitely there are other cases in which KVM_REQ_EVENT
>is set even though no event is pending---most notably during
>emulation of in
Ping,
On Fri, Jul 04, 2014 at 02:52:38PM +0800, Wanpeng Li wrote:
>This bug can be trigger by L1 goes down directly w/ enable_shadow_vmcs.
>
>[ 6413.158950] kvm: vmptrld (null)/7800 failed
>[ 6413.158954] vmwrite error: reg 401e value 4 (err 1)
>[ 6413.158957] C
mcs in
nested_free_all_saved_vmcss() and kfree it after free_loaded_vmcs(). This can
also avoid use after free bug.
Signed-off-by: Wanpeng Li
---
arch/x86/kvm/vmx.c | 15 +++
1 file changed, 11 insertions(+), 4 deletions(-)
diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
index 0
Hi Marcelo,
On Fri, Jul 11, 2014 at 05:03:34PM -0300, Marcelo Tosatti wrote:
>On Fri, Jul 11, 2014 at 12:22:17PM +0800, Wanpeng Li wrote:
>> This bug can be trigger by L1 goes down directly w/ enable_shadow_vmcs.
>>
>> [ 6413.158950] kvm: vmptrld (null
after sync pir to irr.
Signed-off-by: Wanpeng Li
---
arch/x86/kvm/lapic.c | 1 +
arch/x86/kvm/vmx.c | 3 +++
2 files changed, 4 insertions(+)
diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c
index 0069118..b7d45dc 100644
--- a/arch/x86/kvm/lapic.c
+++ b/arch/x86/kvm/lapic.c
@@ -1637,6
for L1
destroy since they will be reinitialized after L1 recreate.
Signed-off-by: Wanpeng Li
---
arch/x86/kvm/vmx.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
index fbce89e..2b28da7 100644
--- a/arch/x86/kvm/vmx.c
+++ b/arch/x86/kvm
ntr to L1 if current is L1 or L2 through old
injection
way if L1 doen't have VM_EXIT_ACK_INTR_ON_EXIT set.
Signed-off-by: Wanpeng Li
Signed-off-by: "Zhang, Yang Z"
---
arch/x86/kvm/vmx.c | 18 --
1 file changed, 16 insertions(+), 2 deletions(-)
diff --git a/arch
On Thu, Jul 17, 2014 at 09:03:01AM +, Zhang, Yang Z wrote:
>Paolo Bonzini wrote on 2014-07-17:
>> Il 17/07/2014 06:56, Wanpeng Li ha scritto:
>>> This patch fix bug reported in
>>> https://bugzilla.kernel.org/show_bug.cgi?id=73331, after the patch
>>> http:/
On Thu, Jul 17, 2014 at 09:13:56AM +, Zhang, Yang Z wrote:
>Paolo Bonzini wrote on 2014-07-17:
>> Il 17/07/2014 06:56, Wanpeng Li ha scritto:
>>> && nested_exit_intr_ack_set(vcpu)) {
>>> int irq = kvm_cpu_get_interrupt(vcpu)
On Thu, Jul 17, 2014 at 09:13:56AM +, Zhang, Yang Z wrote:
>Paolo Bonzini wrote on 2014-07-17:
>> Il 17/07/2014 06:56, Wanpeng Li ha scritto:
>>> && nested_exit_intr_ack_set(vcpu)) {
>>> int irq = kvm_cpu_get_interrupt(vcpu)
sync pir to irr.
Reviewed-by: Yang Zhang
Signed-off-by: Wanpeng Li
---
v1 -> v2:
* replace kvm_get_apic_interrupt() by kvm_lapic_find_highest_irr()
arch/x86/kvm/lapic.c | 1 +
arch/x86/kvm/vmx.c | 3 +++
2 files changed, 4 insertions(+)
diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lap
From: Wanpeng Li
This patch fix bug reported in
https://bugzilla.kernel.org/show_bug.cgi?id=73331,
after the patch http://www.spinics.net/lists/kvm/msg105230.html applied, there
is
some progress and the L2 can boot up, however, slowly. The original idea of
this
fix vid injection patch is
On Thu, Jul 17, 2014 at 12:43:58PM +0200, Paolo Bonzini wrote:
>Il 17/07/2014 11:11, Wanpeng Li ha scritto:
>>>>>> What hypervisor did you test with? nested_exit_on_intr(vcpu) will
>>>>
>>>>Jailhouse will clear External-interrupt exiting bit. Am I rig
On Thu, Jul 17, 2014 at 01:31:06PM +0200, Paolo Bonzini wrote:
>Il 17/07/2014 13:03, Wanpeng Li ha scritto:
>>+ /*
>>+ * Fall back to old way to inject the interrupt since there
>>+ * is no vAPIC-v for L2.
>>+
On Thu, Jul 17, 2014 at 02:04:11PM +0200, Paolo Bonzini wrote:
>Il 17/07/2014 13:28, Paolo Bonzini ha scritto:
>> Il 17/07/2014 13:03, Wanpeng Li ha scritto:
>>> diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
>>> index 4ae5ad8..a704f71 100644
>>> --- a/a
triggered by L2 guest and L1 interested
in, we inject it into L1 VMM for handling.
Signed-off-by: Wanpeng Li
---
arch/x86/kvm/vmx.c | 22 ++
1 file changed, 18 insertions(+), 4 deletions(-)
diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
index a3845b8..f60846c 100644
--- a
Hi Paolo,
On Wed, Jul 30, 2014 at 05:20:58PM +0200, Paolo Bonzini wrote:
>Il 30/07/2014 14:04, Wanpeng Li ha scritto:
>> @@ -7962,14 +7965,14 @@ static void prepare_vmcs02(struct kvm_vcpu *vcpu,
>> struct vmcs12 *vmcs12)
>> if
triggered by L2 guest and L1 interested
in, we inject it into L1 VMM for handling.
Signed-off-by: Wanpeng Li
---
v1 -> v2:
* don't take L0's "virtualize APIC accesses" setting into account
* virtual_apic_page do exactly the same thing that is done for apic_access_page
* add the
vmcs01 which is
wrong,
especially this lead to the obvious L1 ack APICv behavior weired since APICv
is for L1 instead of L2. This patch fix it by ack intr after load vmcs01.
Signed-off-by: Wanpeng Li
---
arch/x86/kvm/vmx.c | 16
1 file changed, 8 insertions(+), 8 deletions
Also, since interrupt is delivered through vmcs12, so APIC-v hardware will
not cleare vIRR and hypervisor need to clear it before L1 running.
Suggested-by: Paolo Bonzini
Suggested-by: "Zhang, Yang Z"
Signed-off-by: Wanpeng Li
---
arch/x86/kvm/lapic.c | 18 ++
Also, since interrupt is delivered through vmcs12, so APIC-v hardware will
not cleare vIRR and hypervisor need to clear it before L1 running.
Suggested-by: Paolo Bonzini
Suggested-by: "Zhang, Yang Z"
Signed-off-by: Wanpeng Li
---
arch/x86/kvm/lapic.c | 18 ++
Please ignore this duplicate one.
于 14-8-1 下午4:13, Wanpeng Li 写道:
> After commit 77b0f5d (KVM: nVMX: Ack and write vector info to intr_info
> if L1 asks us to), "Acknowledge interrupt on exit" behavior can be
> emulated. To do so, KVM will ask the APIC for the interrupt vector i
Hi Paolo,
On Fri, Aug 01, 2014 at 11:05:13AM +0200, Paolo Bonzini wrote:
>Il 01/08/2014 10:09, Wanpeng Li ha scritto:
>> This patch fix bug https://bugzilla.kernel.org/show_bug.cgi?id=61411
>>
>> TPR shadow/threshold feature is important to speed up the Windows guest.
>
triggered by L2 guest and L1 interested
in, we inject it into L1 VMM for handling.
Signed-off-by: Wanpeng Li
---
v2 -> v3:
* nested vm entry failure if both tpr shadow and cr8 exiting bits are not set
v1 -> v2:
* don't take L0's "virtualize APIC accesses" setting into accou
On Mon, Aug 04, 2014 at 12:13:13PM +0200, Paolo Bonzini wrote:
>Il 04/08/2014 12:11, Wanpeng Li ha scritto:
>> Hi Paolo,
>> On Fri, Aug 01, 2014 at 11:05:13AM +0200, Paolo Bonzini wrote:
>>> Il 01/08/2014 10:09, Wanpeng Li ha scritto:
>>>> This patch
will be created
just after first mmio #PF?
Regards,
Wanpeng Li
>(3) Guest attempts to read or write to gpa X again. On Intel, this
>generates an EPT_MISCONFIG. The memory slot generation number that
>was incremented in (2) would normally take care of this but we fast
>path mmio fault
Also, since interrupt is delivered through vmcs12, so APIC-v hardware will
not cleare vIRR and hypervisor need to clear it before L1 running.
Suggested-by: Paolo Bonzini
Suggested-by: "Zhang, Yang Z"
Tested-by: Liu, RongrongX
Signed-off-by: Wanpeng Li
---
v1 -> v2:
* reusing
vmcs01 which is
wrong,
especially this lead to the obvious L1 ack APICv behavior weired since APICv
is for L1 instead of L2. This patch fix it by ack intr after load vmcs01.
Reviewed-by: Paolo Bonzini
Tested-by: Liu, RongrongX
Signed-off-by: Wanpeng Li
---
arch/x86/kvm/vmx.c | 16
Hi Davidlohr,
On Mon, Aug 04, 2014 at 12:56:36PM -0700, Davidlohr Bueso wrote:
>On Fri, 2014-08-01 at 16:12 +0800, Wanpeng Li wrote:
>> External interrupt will cause L1 vmexit w/ reason external interrupt when L2
>> is
>> running. Then L1 will pick up the interrupt through
On Tue, Aug 05, 2014 at 02:39:05PM +0200, Felipe Reyes wrote:
>Hi,
>
>On 08/05/2014 01:04 PM, Paolo Bonzini wrote:
>>Il 05/08/2014 06:42, Wanpeng Li ha scritto:
>>>After commit 77b0f5d (KVM: nVMX: Ack and write vector info to intr_info
>>>if L1 asks us to), "A
n and pinned.
>>
>>>> +
>>>> + vmcs_write32(TPR_THRESHOLD, vmcs12->tpr_threshold);
>>>> + }
>>>
>>> Miss else here:
>>> If L2 owns the APIC and doesn't use TPR_SHADOW, we need to setup the
>>> vmcs02
cks the EPT A bit through mmu notifier.
Regards,
Wanpeng Li
>Thanks,
>Umesh
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--
T
is to check ISR + TMR to construct the EOI exit bitmap.
>
>This patch is a better fixing for the issue that commit "0f6c0a740b"
>tries to solve.
>
I think you miss the changlog.
Regards,
Wanpeng Li
>Tested-by: Alex Williamson
>Signed-off-by: Yang Zhang
>Signed-
IXED_MTRR_REGION 88
>-#define KVM_NR_VAR_MTRR 8
>+#define KVM_NR_VAR_MTRR 10
>
We observed that there is obvious regression caused by this commit, 32bit
win7 guest show blue screen during boot.
Regards,
Wanpeng Li
> #define ASYNC_PF_PER_VCPU 64
>
>--
>1.9.1
>
>
mp;vcpu->mutex))
> return -EINTR;
One question:
>- if (unlikely(vcpu->pid != current->pids[PIDTYPE_PID].pid)) {
When vcpu->pid and current->pids[PIDTYPE_PID].pid will be different?
Regards,
Wanpeng Li
>- /* The thread running this VCPU changed. */
On Mon, Aug 18, 2014 at 09:39:39AM +0300, Nadav Amit wrote:
>This should have been a benign patch. I'll try to get windows 7 installation
>disk and check ASAP.
>
In addition, it just can be reproduced on 32bit win7 w/ MP enabled, in
case UP can't be reproduced.
Regards,
vmx_segment_cache_clear() will be called by vmx_set_segment()
which lead to vmx_segment_cache_clear() is called twice in
enter_pmode(). This patch remove the duplicate call site.
Reviewed-by: Yang Zhang
Signed-off-by: Wanpeng Li
---
arch/x86/kvm/vmx.c | 2 --
1 file changed, 2 deletions
,
IA32_MTRR_PHYSMASKn don't have type field. This patch avoid check if
the type field is legal for IA32_MTRR_PHYSMASKn.
Signed-off-by: Wanpeng Li
---
arch/x86/kvm/x86.c | 10 +-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index 204422d..30
fpu_activate hook is introduced by commit 6b52d186 (KVM: Activate fpu on
clts), however, there is no user currently, this patch drop it.
Reviewed-by: Yang Zhang
Signed-off-by: Wanpeng Li
---
arch/x86/include/asm/kvm_host.h | 1 -
arch/x86/kvm/svm.c | 1 -
arch/x86/kvm/vmx.c
bits for 1-GByte page are
configured, since PDPTE which point to 1-GByte page will reserve
bits 29:12 instead of bits 7:3 which are reserved for PDPTE that
references an EPT Page Directory. This patch fix it by reserve
bits 29:12 for 1-GByte page.
Signed-off-by: Wanpeng Li
---
arch/x86/kvm/
Section 11.11.2.3 of the SDM mentions "All other bits in the
IA32_MTRR_PHYSBASEn
and IA32_MTRR_PHYSMASKn registers are reserved; the processor generates a
general-protection exception(#GP) if software attempts to write to them". This
patch do it in kvm.
Signed-off-by: Wanpeng Li
Hi Paolo,
On Mon, Aug 18, 2014 at 05:50:31PM +0800, Wanpeng Li wrote:
>Section 11.11.2.3 of the SDM mentions "All other bits in the
>IA32_MTRR_PHYSBASEn
>and IA32_MTRR_PHYSMASKn registers are reserved; the processor generates a
>general-protection exception(#GP) if software att
Hi Paolo,
On Mon, Aug 18, 2014 at 12:18:59PM +0200, Paolo Bonzini wrote:
>Il 18/08/2014 11:50, Wanpeng Li ha scritto:
>> EPT misconfig handler in kvm will check which reason lead to EPT
>> misconfiguration after vmexit. One of the reasons is that an EPT
>> paging-structur
triggered by L2 guest and L1 interested
in, we inject it into L1 VMM for handling.
Reviewed-by: Paolo Bonzini
Signed-off-by: Wanpeng Li
---
v3 -> v4:
* add Paolo's Reviewed-by
* unconditionally fail the vmentry, with a comment
* setup the TPR_SHADOW/virtual_apic_page of vmcs02 based on vmcs
bits for 1-GByte page are
configured, since PDPTE which point to 1-GByte page will reserve
bits 29:12 instead of bits 7:3 which are reserved for PDPTE that
references an EPT Page Directory. This patch fix it by reserve
bits 29:12 for 1-GByte page.
Signed-off-by: Wanpeng Li
---
v1 -> v2:
Section 11.11.2.3 of the SDM mentions "All other bits in the
IA32_MTRR_PHYSBASEn
and IA32_MTRR_PHYSMASKn registers are reserved; the processor generates a
general-protection exception(#GP) if software attempts to write to them". This
patch do it in kvm.
Signed-off-by: Wanpeng Li
,
IA32_MTRR_PHYSMASKn don't have type field. This patch avoid check if
the type field is legal for IA32_MTRR_PHYSMASKn.
Signed-off-by: Wanpeng Li
---
v1 -> v2:
* WARN_ON if not fall in variable Range MTRRs
* the base/mask can be separated just with an "&"
arch/x86/kvm/x86.c | 8 ++
On Tue, Aug 19, 2014 at 11:09:49AM +0200, Paolo Bonzini wrote:
>Il 19/08/2014 11:04, Wanpeng Li ha scritto:
>> EPT misconfig handler in kvm will check which reason lead to EPT
>> misconfiguration after vmexit. One of the reasons is that an EPT
>> paging-structure ent
On Tue, Aug 19, 2014 at 04:04:03PM +0200, Christian Borntraeger wrote:
>On 18/08/14 07:02, Wanpeng Li wrote:
>> Hi Christian,
>> On Tue, Aug 05, 2014 at 04:44:14PM +0200, Christian Borntraeger wrote:
>>> We currently track the pid of the task that runs the VCPU in
>
s for 1-GByte page are
configured, since PDPTE which point to 1-GByte page will reserve
bits 29:12 instead of bits 7:3 which are reserved for PDPTE that
references an EPT Page Directory. This patch fix it by reserve
bits 29:12 for 1-GByte page.
Signed-off-by: Wanpeng Li
---
v2 -> v3:
* return
Hi Paolo,
On Tue, Aug 19, 2014 at 11:09:49AM +0200, Paolo Bonzini wrote:
[...]
>I suggest that you write a testcase for kvm-unit-tests.
>
Just send out v3. The testcase will be written later since I'm not familiar
with kvm-unit-tests before and time is still needed.
Regards,
Wanpeng
Hi Paolo,
On Tue, Aug 19, 2014 at 10:34:20AM +0200, Paolo Bonzini wrote:
>Il 19/08/2014 10:30, Wanpeng Li ha scritto:
>> +if (vmx->nested.virtual_apic_page)
>> +nested_release_page(vmx->nested.virtual_apic_page);
>> +vm
s for 1-GByte page are
configured, since PDPTE which point to 1-GByte page will reserve
bits 29:12 instead of bits 7:3 which are reserved for PDPTE that
references an EPT Page Directory. This patch fix it by reserve
bits 29:12 for 1-GByte page.
Signed-off-by: Wanpeng Li
---
v3 -> v4:
* don
On Wed, Aug 20, 2014 at 08:51:38AM +0200, Paolo Bonzini wrote:
>Il 20/08/2014 05:17, Wanpeng Li ha scritto:
>> +else if (spte & (1ULL << 7))
>
>You have to check level == 1 specifically here, or add...
>
>> +/*
>> + * 1G
On Wed, Aug 20, 2014 at 10:13:07AM +0200, Paolo Bonzini wrote:
>Il 20/08/2014 09:31, Wanpeng Li ha scritto:
>> EPT misconfig handler in kvm will check which reason lead to EPT
>> misconfiguration after vmexit. One of the reasons is that an EPT
>> paging-structure entry is con
Introduce apic_access_and_virtual_page_valid() to check the valid
of nested apic access page and virtual apic page earlier.
Signed-off-by: Wanpeng Li
---
arch/x86/kvm/vmx.c | 82 ++
1 file changed, 46 insertions(+), 36 deletions(-)
diff
triggered by L2 guest and L1 interested
in, we inject it into L1 VMM for handling.
Reviewed-by: Paolo Bonzini
Signed-off-by: Wanpeng Li
---
v4 -> v5:
* moving the nested_vmx_failValid call inside the "if
(!vmx->nested.virtual_apic_page)"
v3 -> v4:
* add Paolo's Reviewed-by
*
ied" instead of "keeps the
masked bits unmodified"?
Regards,
Wanpeng Li
>Signed-off-by: Nadav Amit
>---
> arch/x86/kvm/x86.c | 1 +
> 1 file changed, 1 insertion(+)
>
>diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
>index 5f5edb6..ee42410 100644
>---
Hi Paolo,
On Wed, Aug 20, 2014 at 12:50:38PM +0200, Paolo Bonzini wrote:
>Il 20/08/2014 11:45, Wanpeng Li ha scritto:
>> Introduce apic_access_and_virtual_page_valid() to check the valid
>> of nested apic access page and virtual apic page earlier.
>>
>> Signed-off-by:
triggered by L2 guest and L1 interested
in, we inject it into L1 VMM for handling.
Reviewed-by: Paolo Bonzini
Signed-off-by: Wanpeng Li
---
v5 -> v6:
* fix bisect issue
v4 -> v5:
* moving the nested_vmx_failValid call inside the "if
(!vmx->nested.virtual_apic_page)"
v3 -> v4:
Introduce function nested_get_vmcs12_pages() to check the valid
of nested apic access page and virtual apic page earlier.
Signed-off-by: Wanpeng Li
---
v5 -> v6:
* replace the name apic_access_and_virtual_page_valid by
nested_get_vmcs12_pages
arch/x86/kvm/vmx.c |
d your comments "On real hardware you could point
the virtual-APIC page to an invalid address."
http://lists.openwall.net/linux-kernel/2014/08/07/344
>Thanks for your persistence!
>
Thanks for your great help. ;-)
Regards,
Wanpeng Li
>Paolo
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Hi Paolo,
On Thu, Aug 21, 2014 at 01:56:46PM +0200, Paolo Bonzini wrote:
>Il 21/08/2014 10:05, Wanpeng Li ha scritto:
>> Hi Nadav,
>> On Wed, Aug 20, 2014 at 03:11:51PM +0300, Nadav Amit wrote:
>>> Currently, when an msr is updated using kvm_set_shared_msr the masked
unkyard branch in case it's going to be useful
>> in some scenario I didn't think of.
>
>I've been using it to benchmark different values, because it is more
Is there any benchmark data for this patchset?
Regards,
Wanpeng Li
>convenient than reloading the module after
On Fri, Aug 22, 2014 at 10:36:07AM +0200, Paolo Bonzini wrote:
>Il 22/08/2014 01:30, Wanpeng Li ha scritto:
>> Maybe I misunderstand your comments "On real hardware you could point
>> the virtual-APIC page to an invalid address."
>> http://lists.openwall.net/linux-ke
Please Cc kvm ml.
On Sun, Aug 24, 2014 at 11:54:32AM +0800, Dennis Chen wrote:
>This patch is used to construct the eptp in vmx mode with values
>readed from MSR according to the intel x86 software developer's
>manual.
>
>Signed-off-by: Dennis Chen
>---
> arch/x86/include/asm/vmx.h |1 +
> arch
fix it by set a KVM_REQ_EVENT
if both the first and the second instructions are not sti.
Signed-off-by: Wanpeng Li
---
arch/x86/kvm/x86.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index c10408e..b7c0073 100644
--- a/arch/x86/kvm/x86.c
+++ b/arc
Hi Paolo,
On Mon, Aug 25, 2014 at 11:01:07AM +0200, Paolo Bonzini wrote:
>Il 25/08/2014 09:58, Wanpeng Li ha scritto:
>> diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
>> index c10408e..b7c0073 100644
>> --- a/arch/x86/kvm/x86.c
>> +++ b/arch/x86/kvm/x86.c
>
Hi Paolo,
On Mon, Aug 25, 2014 at 11:16:16AM +0200, Paolo Bonzini wrote:
>Il 25/08/2014 11:08, Wanpeng Li ha scritto:
>> Hi Paolo,
>> On Mon, Aug 25, 2014 at 11:01:07AM +0200, Paolo Bonzini wrote:
>>> Il 25/08/2014 09:58, Wanpeng Li ha scritto:
>>>> diff --git
On Mon, Aug 25, 2014 at 11:16:16AM +0200, Paolo Bonzini wrote:
>Il 25/08/2014 11:08, Wanpeng Li ha scritto:
>> Hi Paolo,
>> On Mon, Aug 25, 2014 at 11:01:07AM +0200, Paolo Bonzini wrote:
>>> Il 25/08/2014 09:58, Wanpeng Li ha scritto:
>>>> diff --git a/arc
On Fri, Aug 29, 2014 at 06:47:54PM +0200, Paolo Bonzini wrote:
>Il 19/08/2014 11:04, Wanpeng Li ha scritto:
>> Section 11.11.2.3 of the SDM mentions "All other bits in the
>> IA32_MTRR_PHYSBASEn
>> and IA32_MTRR_PHYSMASKn registers are reserved; the processor generate
000
>
>x86: kvm: Make kvm_get_time_and_clockread() nanoseconds based
>
>Convert the relevant base data right away to nanoseconds instead of
>doing the conversion on every readout. Reduces text size by 160
>bytes.
>
>Signed-off-by: Thomas Gleixner
>Cc: G
--- 8< ---
>KVM: x86: count actual tlb flushes
>
>- we count KVM_REQ_TLB_FLUSH requests, not actual flushes
So there maybe multiple requests accumulated at the point of kvm_check_request,
if your patch account these accumulations correctly?
Regards,
Wanpeng Li
> (KVM can have multiple requ
n_to_pfn async = false
__gfn_to_pfn_memslot
hva_to_pfn
hva_to_pfn_fast
hva_to_pfn_slow
kvm_get_user_page_io
page will always be ready after kvm_get_user_page_io which leads to APF
don't need to work any more.
Regards,
Wanpeng Li
&
On Thu, Sep 18, 2014 at 09:13:26AM +0300, Gleb Natapov wrote:
>On Thu, Sep 18, 2014 at 08:29:17AM +0800, Wanpeng Li wrote:
>> Hi Andres,
>> On Wed, Sep 17, 2014 at 10:51:48AM -0700, Andres Lagar-Cavilla wrote:
>> [...]
>> > static inline int check_user_pa
clear_bit((ffs(shadow_accessed_mask) - 1),
>(unsigned long *)sptep);
> }
>+ trace_kvm_age_page(gfn, slot, young);
IIUC, all the rmapps in this for loop are against the same gfn which
results in the above trace point dump
Hi Paolo,
于 9/24/14, 3:04 PM, Paolo Bonzini 写道:
Il 24/09/2014 04:27, Wanpeng Li ha scritto:
Hi Andres,
On Mon, Sep 22, 2014 at 02:54:42PM -0700, Andres Lagar-Cavilla wrote:
1. We were calling clear_flush_young_notify in unmap_one, but we are
within an mmu notifier invalidate range scope. The
>
>Is cgroups the only option?. Any pointers to this would help.
How about CFS bandwidth control?
Regards,
Wanpeng Li
>
>Thanks,
>Mohan
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>the body of a message to majord...@vger.kernel.org
>
ot rely on it.
>Since it is a rare case, it is unoptimized and done on the slow-path.
>
>---
>
>Changes v1->v2:
>- Follow Radim's review: setting constants, preferring simplicity to marginal
> performance gain, etc.
>- Combine the cluster mode and x2apic mod
;= ~CPU_BASED_TPR_SHADOW;
exec_control |= vmcs12->cpu_based_vm_exec_control;
Could you point out where the other places L0 sets
CPU_BASED_VIRTUAL_INTR_PENDING before entering L2?
Regards,
Wanpeng Li
>entering L2, and then we transfer it from the hardware state to vmc12 on
>exit
mporarily
>load a vmcs without updating loaded_vmcs->vmcs. Now, if some other VCPU
>is scheduling in right in the middle of this, the wrong vmcs will be
>flushed and then reloaded - e.g. a non-shadow vmcs with that interrupt
>window flag set...
If non-shadow vmcs and shadow vmcs can
On Thu, Oct 09, 2014 at 07:34:47AM +0800, Wanpeng Li wrote:
>On Wed, Oct 08, 2014 at 05:07:48PM +0200, Jan Kiszka wrote:
>>On 2014-10-08 12:34, Paolo Bonzini wrote:
>>> Il 08/10/2014 12:29, Jan Kiszka ha scritto:
>>>>>> But it would write to the vmcs02
y disabled before vmentry.
>
>Signed-off-by: Jan Kiszka
>---
Reviewed-by: Wanpeng Li
Regards,
Wanpeng Li
>
>This fixes specifically Jailhouse in KVM on CPUs with shadow VMCS
>support.
>
> arch/x86/kvm/vmx.c | 4
> 1 file changed, 4 insertions(+)
>
>diff --
unregister kvm_device_ops of vfio dynamically during
rmmod
kvm-intel module.
Reported-by: Liu Rongrong
Signed-off-by: Wanpeng Li
---
include/linux/kvm_host.h |1 +
virt/kvm/kvm_main.c |7 +++
virt/kvm/vfio.c |5 +
virt/kvm/vfio.h |4
4 files
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