On Thu, Apr 30, 2015 at 01:43:31PM +0200, Christian Borntraeger wrote:
Use __kvm_guest_{enter|exit} instead of kvm_guest_{enter|exit}
where interrupts are disabled.
Signed-off-by: Christian Borntraeger borntrae...@de.ibm.com
For the ARM part:
Acked-by: Christoffer Dall
On Mon, May 04, 2015 at 11:24:22AM +0200, Paolo Bonzini wrote:
On 04/05/2015 04:48, Tiejun Chen wrote:
We already check KVM_CAP_IRQFD in generic once enable CONFIG_HAVE_KVM_IRQFD,
kvm_vm_ioctl_check_extension_generic()
|
+ switch (arg) {
+ ...
+ #ifdef
To maintain cache coherency on ARM, we may need a mechanism to flush
the data cache.
This patch implements KVM_FLUSH_DCACHE_GPA vm ioctl which flushes the
data cache at a specified address range. The input argument is a
struct kvm_mem_addr containing the guest physical address and the
length.
This RFC series shows how we can solve cache incohenrency issues on
ARM/ARM64. This implementation uses an ioctl that flushes the data
cache for a given range of the guest physical memory, this possible
solution was already broached in the previous discussion [1][2].
Each access (read or write)
Add KVM_FLUSH_DCACHE_GPA ioctl.
Signed-off-by: Jérémy Fanguède j.fangu...@virtualopensystems.com
---
linux-headers/linux/kvm.h | 6 ++
1 file changed, 6 insertions(+)
diff --git a/linux-headers/linux/kvm.h b/linux-headers/linux/kvm.h
index b96d978..81d2f64 100644
---
Implement data cache maintenance coherency functions, by using
FLUSH_DCACHE_GPA ioctl. Introduce kvm_arm_maintain_cache_coherency()
for flushing the data cache if necessary, a very simple logic is
implemented to reduce number of flushes due to reads. Two wrapping
functions are exposed, for easier
