On 14 May 2015 at 16:41, Michael S. Tsirkin m...@redhat.com wrote:
On Thu, May 14, 2015 at 04:19:23PM +0200, Laszlo Ersek wrote:
On 05/14/15 15:48, Michael S. Tsirkin wrote:
On Thu, May 14, 2015 at 03:32:10PM +0200, Laszlo Ersek wrote:
On 05/14/15 15:00, Andrew Jones wrote:
On Thu, May 14,
On 05/14/2015 05:14 PM, Alex Williamson wrote:
On Thu, 2015-05-14 at 11:06 +0200, Eric Auger wrote:
Alex,
On 05/13/2015 08:33 PM, Alex Williamson wrote:
On Thu, 2015-05-07 at 16:27 +0200, Eric Auger wrote:
This patch introduces a module that registers and implements a basic
reset function
On 15 May 2015 at 16:14, Alex Bennée alex.ben...@linaro.org wrote:
Mark Rutland mark.rutl...@arm.com writes:
On Fri, May 15, 2015 at 03:27:06PM +0100, Alex Bennée wrote:
+/*
+ * See v8 ARM ARM D7.3: Debug Registers
+ *
+ * The control registers are architecturally defined as 32 bits but
Peter Maydell peter.mayd...@linaro.org writes:
On 15 May 2015 at 16:14, Alex Bennée alex.ben...@linaro.org wrote:
Mark Rutland mark.rutl...@arm.com writes:
On Fri, May 15, 2015 at 03:27:06PM +0100, Alex Bennée wrote:
+/*
+ * See v8 ARM ARM D7.3: Debug Registers
+ *
+ * The control
On Thu, May 14, 2015 at 03:36:37PM +0200, Andrew Jones wrote:
On Thu, May 14, 2015 at 02:11:59PM +0100, Peter Maydell wrote:
On 14 May 2015 at 14:03, Andrew Jones drjo...@redhat.com wrote:
On Thu, May 14, 2015 at 11:37:46AM +0100, Peter Maydell wrote:
On 14 May 2015 at 11:31, Andrew Jones
Mark Rutland mark.rutl...@arm.com writes:
Hi Alex,
On Fri, May 15, 2015 at 03:27:13PM +0100, Alex Bennée wrote:
This adds support for userspace to control the HW debug registers for
guest debug. In the debug ioctl we copy the IMPDEF defined number of
registers into a new register set
Am 15.05.2015 um 16:27 schrieb Alex Bennée:
index ef1a5fc..aca4f86 100644
--- a/arch/s390/include/uapi/asm/kvm.h
+++ b/arch/s390/include/uapi/asm/kvm.h
@@ -114,8 +114,6 @@ struct kvm_fpu {
__u64 fprs[16];
};
-#define KVM_GUESTDBG_USE_HW_BP 0x0001
-
diff --git
On Fri, May 15, 2015 at 03:27:06PM +0100, Alex Bennée wrote:
This commit defines the API headers for guest debugging. There are two
architecture specific debug structures:
- kvm_guest_debug_arch, allows us to pass in HW debug registers
- kvm_debug_exit_arch, signals exception and
This includes trace points for:
kvm_arch_setup_guest_debug
kvm_arch_clear_guest_debug
I've also added some generic register setting trace events and also a
trace point to dump the array of hardware registers.
Signed-off-by: Alex Bennée alex.ben...@linaro.org
---
v3
- add trace event for
Finally advertise the KVM capability for SET_GUEST_DEBUG. Once arm
support is added this check can be moved to the common
kvm_vm_ioctl_check_extension() code.
Signed-off-by: Alex Bennée alex.ben...@linaro.org
Acked-by: Christoffer Dall christoffer.d...@linaro.org
---
v3:
- separated capability
On Thu, May 14, 2015 at 03:46:44PM +0200, Andrew Jones wrote:
On Thu, May 14, 2015 at 01:05:09PM +0200, Christoffer Dall wrote:
On Wed, May 13, 2015 at 01:31:52PM +0200, Andrew Jones wrote:
Provide a method to change normal, cacheable memory to non-cacheable.
KVM will make use of this to
On Thu, May 14, 2015 at 03:32:13PM +0200, Andrew Jones wrote:
On Thu, May 14, 2015 at 12:55:49PM +0200, Christoffer Dall wrote:
On Wed, May 13, 2015 at 01:31:54PM +0200, Andrew Jones wrote:
When S1 and S2 memory attributes combine wrt to caching policy,
non-cacheable types take
This is a pre-cursor to sharing the code with the guest debug support.
This replaces the big macro that fishes data out of a fixed location
with a more general helper macro to restore a set of debug registers. It
uses macro substitution so it can be re-used for debug control and value
registers.
Currently x86, powerpc and soon arm64 use the same two architecture
specific bits for guest debug support for software and hardware
breakpoints. This makes the shared values explicit.
Signed-off-by: Alex Bennée alex.ben...@linaro.org
Reviewed-by: Andrew Jones drjo...@redhat.com
-
v4
- claim
This introduces a level of indirection for the debug registers. Instead
of using the sys_regs[] directly we store registers in a structure in
the vcpu. As we are no longer tied to the layout of the sys_regs[] we
can make the copies size appropriate for control and value registers.
This also
This adds support for SW breakpoints inserted by userspace.
We do this by trapping all guest software debug exceptions to the
hypervisor (MDCR_EL2.TDE). The exit handler sets an exit reason of
KVM_EXIT_DEBUG with the kvm_debug_exit_arch structure holding the
exception syndrome information.
It
This adds support for single-stepping the guest. To do this we need to
manipulate the guests PSTATE.SS and MDSCR_EL1.SS bits which we do in the
kvm_arm_setup/clear_debug() so we don't affect the apparent state of the
guest. Additionally while the host is debugging the guest we suppress
the ability
This is a precursor for later patches which will need to do more to
setup debug state before entering the hyp.S switch code. The existing
functionality for setting mdcr_el2 has been moved out of hyp.S and now
uses the value kept in vcpu-arch.mdcr_el2.
As the assembler used to previously mask and
This commit defines the API headers for guest debugging. There are two
architecture specific debug structures:
- kvm_guest_debug_arch, allows us to pass in HW debug registers
- kvm_debug_exit_arch, signals exception and possible faulting address
The type of debugging being used is controlled
Bring into line with the comments for the other structures and their
KVM_EXIT_* cases. Also update api.txt to reflect use in kvm_run
documentation.
Signed-off-by: Alex Bennée alex.ben...@linaro.org
Reviewed-by: David Hildenbrand d...@linux.vnet.ibm.com
Reviewed-by: Andrew Jones drjo...@redhat.com
Add handlers for all the 32-bit debug registers.
Signed-off-by: Zhichao Huang zhichao.hu...@linaro.org
---
arch/arm/include/asm/kvm_asm.h | 12
arch/arm/include/asm/kvm_host.h | 3 +
arch/arm/kernel/asm-offsets.c | 1 +
arch/arm/kvm/coproc.c | 122
Add handlers for all the 64-bit debug registers.
There is an overlap between 32 and 64bit registers. Make sure that
64-bit registers preceding 32-bit ones.
Signed-off-by: Zhichao Huang zhichao.hu...@linaro.org
---
arch/arm/kvm/coproc.c | 12
1 file changed, 12 insertions(+)
diff
We now have multiple tables for the various system registers
we trap. Make sure we check the order of all of them, as it is
critical that we get the order right (been there, done that...).
Signed-off-by: Zhichao Huang zhichao.hu...@linaro.org
---
arch/arm/kvm/coproc.c | 26
As we're about to trap a bunch of CP14 registers, let's rework
the CP15 handling so it can be generalized and work with multiple
tables.
Signed-off-by: Zhichao Huang zhichao.hu...@linaro.org
---
arch/arm/kvm/coproc.c | 176 ++---
pm_fake doesn't quite describe what the handler does (ignoring writes
and returning 0 for reads).
As we're about to use it (a lot) in a different context, rename it
with a (admitedly cryptic) name that make sense for all users.
Signed-off-by: Zhichao Huang zhichao.hu...@linaro.org
---
Hardware debugging in guests is not intercepted currently, it means
that a malicious guest can bring down the entire machine by writing
to the debug registers.
This patch enable trapping of all debug registers, preventing the guests
to mess with the host state.
However, it is a precursor for
This patch series adds debug support, a key feature missing from the
KVM/armv7 port.
The main idea is borrowed from armv8, which is to keep track of whether
the debug registers are dirty (changed by the guest) or not. In this
case, perform the usual save/restore dance, for one run only. It
On 15 May 2015 at 17:16, Alex Bennée alex.ben...@linaro.org wrote:
Mark Rutland mark.rutl...@arm.com writes:
This gets more fun when you consider the context-aware breakpoints are
the highest numbered. So the set of (context-aware) breakpoints might
not intersect across all CPUs.
I didn't
Am 15.05.2015 um 16:27 schrieb Alex Bennée:
+++ b/arch/s390/include/uapi/asm/kvm.h
@@ -114,8 +114,6 @@ struct kvm_fpu {
__u64 fprs[16];
};
-#define KVM_GUESTDBG_USE_HW_BP 0x0001
[...]
+++ b/include/uapi/linux/kvm.h
[...]
+#define KVM_GUESTDBG_USE_SW_BP
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