Re: [PATCH V1 0/7] Enable ACPI support for ARM KVM GIC

Hi, On 08/02/16 09:59, Marc Zyngier wrote: On 05/02/16 17:07, Wei Huang wrote: Wei Huang (7): KVM: GIC: Move GIC DT probing code to GICv2 and GICv3 files KVM: GIC: Add extra fields to store GICH and GICV resource info KVM: GIC: Create a common probe function for GIC KVM: GICv2:

Re: [PATCH v3 22/23] arm64: VHE: Add support for running Linux in EL2 mode

On Wed, Feb 03, 2016 at 06:00:15PM +, Marc Zyngier wrote: > With ARMv8.1 VHE, the architecture is able to (almost) transparently > run the kernel at EL2, despite being written for EL1. > > This patch takes care of the "almost" part, mostly preventing the kernel > from dropping from EL2 to

[PATCH 4/5] irqchip/gic-v3: Parse and export virtual GIC information

Fill up the recently introduced gic_kvm_info with the virtual GIC information. Signed-off-by: Julien Grall --- Cc: Thomas Gleixner Cc: Jason Cooper Cc: Marc Zyngier drivers/irqchip/irq-gic-v3.c |

[PATCH 1/5] KVM: arm/arm64: arch_timer: Gather KVM specific information in a structure

Introduce a structure which are filled up by the arch timer driver and used by the virtual timer in KVM. The first member of this structure will be the timecounter. More members will be added later. This is also dropping arch_timer_get_timecounter as it was only used by the KVM code.

Re: [PATCH V1 0/7] Enable ACPI support for ARM KVM GIC

On 2/8/16 10:39, Julien Grall wrote: > Hi, > > On 08/02/16 09:59, Marc Zyngier wrote: >> On 05/02/16 17:07, Wei Huang wrote: >>> Wei Huang (7): >>>KVM: GIC: Move GIC DT probing code to GICv2 and GICv3 files >>>KVM: GIC: Add extra fields to store GICH and GICV resource info >>>KVM:

Re: [PATCH V1 0/7] Enable ACPI support for ARM KVM GIC

On 2/8/16 03:59, Marc Zyngier wrote: > Wei, > > On 05/02/16 17:07, Wei Huang wrote: >> This patch set enables ACPI support for KVM GIC. Note that the patches >> are in fact the V3 of previously submitted patches (search "Enable ACPI >> support for KVM ARM"). But because Fu Wei includes the

Re: [PATCH v3 21/23] arm64: hw_breakpoint: Allow EL2 breakpoints if running in HYP

On 08/02/16 15:56, Catalin Marinas wrote: > On Wed, Feb 03, 2016 at 06:00:14PM +, Marc Zyngier wrote: >> @@ -76,6 +59,36 @@ static inline void decode_ctrl_reg(u32 reg, >> #define ARM_KERNEL_STEP_ACTIVE 1 >> #define ARM_KERNEL_STEP_SUSPEND 2 >> >> +#define DBG_HMC_HYP (1 <<

[PATCH 0/5] arm64: Add support of KVM with ACPI

Hello, This small series allows an ARM64 ACPI based platform to use KVM. Currently the KVM code has to parse the firmware table to get the necessary information to setup the virtual timer and virtual GIC. However the parsing of those tables are already done in the GIC and arch timer drivers.

[PATCH 1/8] arm64: KVM: Switch the sys_reg search to be a binary search

Our 64bit sys_reg table is about 90 entries long (so far, and the PMU support is likely to increase this). This means that on average, it takes 45 comparaisons to find the right entry (and actually the full 90 if we have to search the invariant table). Not the most efficient thing. Specially when

[PATCH 2/8] ARM: KVM: Properly sort the invariant table

Not having the invariant table properly sorted is an oddity, and may get in the way of future optimisations. Let's fix it. Signed-off-by: Marc Zyngier --- arch/arm/kvm/coproc.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm/kvm/coproc.c

[PATCH 7/8] KVM: arm/arm64: Avoid accessing GICH registers

GICv2 registers are *slow*. As in "terrifyingly slow". Which is bad. But we're equaly bad, as we make a point in accessing them even if we don't have any interrupt in flight. A good solution is to first find out if we have anything useful to write into the GIC, and if we don't, to simply not do

[PATCH 4/8] ARM: KVM: Rename struct coproc_reg::is_64 to is_64bit

As we're going to play some tricks on the struct coproc_reg, make sure its 64bit indicator field matches that of coproc_params. Signed-off-by: Marc Zyngier --- arch/arm/kvm/coproc.c | 4 ++-- arch/arm/kvm/coproc.h | 8 2 files changed, 6 insertions(+), 6

[PATCH 6/8] KVM: arm/arm64: timer: Add active state caching

Programming the active state in the (re)distributor can be an expensive operation so it makes some sense to try and reduce the number of accesses as much as possible. So far, we program the active state on each VM entry, but there is some opportunity to do less. An obvious solution is to cache

[PATCH 3/8] ARM: KVM: Enforce sorting of all CP tables

Since we're obviously terrible at sorting the CP tables, make sure we're going to do it properly (or fail to boot). arm64 has had the same mechanism for a while, and nobody ever broke it... Signed-off-by: Marc Zyngier --- arch/arm/kvm/coproc.c | 25

Re: PCIe passthrough support on ARM

Hi Edward, On 02/08/2016 12:13 PM, Edward Cragg wrote: > Hi Eric, > > On Thu, Feb 04, 2016 at 06:30:34PM +0100, Eric Auger wrote: >> Hi Edward, >> On 02/04/2016 05:53 PM, Edward Cragg wrote: >>> Hi, >>> >>> I'm involved in planning a project for which there is a requirement for PCIe >>>

Re: PCIe passthrough support on ARM

Hi Eric, On Thu, Feb 04, 2016 at 06:30:34PM +0100, Eric Auger wrote: > Hi Edward, > On 02/04/2016 05:53 PM, Edward Cragg wrote: > > Hi, > > > > I'm involved in planning a project for which there is a requirement for PCIe > > passthrough in KVM on ARMv8. We have no hardware to test on at the

[PATCH 8/8] KVM: arm64: Avoid accessing ICH registers

Just like on GICv2, we're a bit hammer-happy with GICv3, and access them more often than we should. Adopt a policy similar to what we do for GICv2, only save/restoring the minimal set of registers. As we don't access the registers linearly anymore (we may skip some), the convoluted accessors

Re: [PATCH v11 20/21] KVM: ARM: Introduce per-vcpu kvm device controls

On Fri, Feb 05, 2016 at 03:14:15PM +0800, Shannon Zhao wrote: > From: Shannon Zhao > > In some cases it needs to get/set attributes specific to a vcpu and so > needs something else than ONE_REG. > > Let's copy the KVM_DEVICE approach, and define the respective ioctls >

Re: [PATCH v11 21/21] KVM: ARM64: Add a new vcpu device control group for PMUv3

On Fri, Feb 05, 2016 at 03:14:16PM +0800, Shannon Zhao wrote: > From: Shannon Zhao > > To configure the virtual PMUv3 overflow interrupt number, we use the > vcpu kvm_device ioctl, encapsulating the KVM_ARM_VCPU_PMU_V3_IRQ > attribute within the KVM_ARM_VCPU_PMU_V3_CTRL

Re: ARM PCI/MSI KVM passthrough with GICv2M

On Fri, Feb 05, 2016 at 11:17:00AM -0700, Alex Williamson wrote: > On Fri, 5 Feb 2016 18:32:07 +0100 > Eric Auger wrote: > > > Hi Alex, > > > > I tried to sketch a proposal for guaranteeing the IRQ integrity when > > doing ARM PCI/MSI passthrough with ARM GICv2M

Re: [PATCH V1 0/7] Enable ACPI support for ARM KVM GIC

Wei, On 05/02/16 17:07, Wei Huang wrote: > This patch set enables ACPI support for KVM GIC. Note that the patches > are in fact the V3 of previously submitted patches (search "Enable ACPI > support for KVM ARM"). But because Fu Wei includes the arch_timer part > in his series [1] and I have

Re: [PATCH v3 05/23] arm64: Add ARM64_HAS_VIRT_HOST_EXTN feature

On Wed, Feb 03, 2016 at 05:59:58PM +, Marc Zyngier wrote: > Add a new ARM64_HAS_VIRT_HOST_EXTN features to indicate that the > CPU has the ARMv8.1 VHE capability. > > This will be used to trigger kernel patching in KVM. > > Acked-by: Christoffer Dall >

Re: [GIT PULL] KVM/ARM updates for 4.5-rc2

On 28/01/2016 11:30, Marc Zyngier wrote: > Hi Paolo, > > Please find below the KVM/ARM updates for 4.5-rc2. Mostly fixes as a > result of Shannon's work on PMU emulation, which has outlined a few > nits here and there, plus a correctness fix from Dave. > > Please pull! > > Thanks, > >

Re: [GIT PULL] KVM/ARM updates for 4.5-rc2

On 08/02/16 15:23, Paolo Bonzini wrote: > > > On 28/01/2016 11:30, Marc Zyngier wrote: >> Hi Paolo, >> >> Please find below the KVM/ARM updates for 4.5-rc2. Mostly fixes as a >> result of Shannon's work on PMU emulation, which has outlined a few >> nits here and there, plus a correctness fix

Re: [PATCH v3 03/23] arm/arm64: Add new is_kernel_in_hyp_mode predicate

On Wed, Feb 03, 2016 at 05:59:56PM +, Marc Zyngier wrote: > With ARMv8.1 VHE extension, it will be possible to run the kernel > at EL2 (aka HYP mode). In order for the kernel to easily find out > where it is running, add a new predicate that returns whether or > not the kernel is in HYP mode.

Re: [PATCH v3 20/23] arm64: perf: Count EL2 events if the kernel is running in HYP

On Wed, Feb 03, 2016 at 06:00:13PM +, Marc Zyngier wrote: > When the kernel is running in HYP (with VHE), it is necessary to > include EL2 events if the user requests counting kernel or > hypervisor events. > > Signed-off-by: Marc Zyngier Acked-by: Catalin Marinas

Re: [PATCH 3/5] irqchip/gic-v2: Parse and export virtual GIC information

Julien, On 08/02/16 16:47, Julien Grall wrote: > For now, the firmware tables are parsed 2 times: once in the GIC > drivers, the other timer when initializing the vGIC. It means code > duplication and make more tedious to add the support for another > firmware table (like ACPI). > > Introduce a

Re: [PATCH V1 0/7] Enable ACPI support for ARM KVM GIC

On 08/02/16 16:47, Wei Huang wrote: > > > On 2/8/16 10:39, Julien Grall wrote: >> Hi, >> >> On 08/02/16 09:59, Marc Zyngier wrote: >>> On 05/02/16 17:07, Wei Huang wrote: Wei Huang (7): KVM: GIC: Move GIC DT probing code to GICv2 and GICv3 files KVM: GIC: Add extra fields to

Re: [PATCH v3 6/6] kvm: arm64: Add ACPI support for virt arch timer

On 01/02/16 20:26, fu@linaro.org wrote: > From: Fu Wei > > This patch adds ACPI/GTDT support for virt arch timer > using the API in GTDT driver. > > Signed-off-by: Fu Wei > --- > virt/kvm/arm/arch_timer.c | 8 > 1 file changed, 8

Re: PCIe passthrough support on ARM

On Mon, Feb 08, 2016 at 01:56:34PM +0100, Eric Auger wrote: > > Do you mean the GIC itself? From registers, it appears to be a standard ARM > > GIC, though i'm not sure exactly which one yet. However, it's stated in the > > processor's datasheet that legacy interrupts aren't supported. It's one of