On Fri, Mar 25, 2016 at 02:04:33AM +, Andre Przywara wrote:
> From: Marc Zyngier
>
> As the GICv3 virtual interface registers differ from their GICv2
> siblings, we need different handlers for processing maintenance
> interrupts and reading/writing to the LRs.
> Also as
When the kernel is running at EL2, it doesn't need init_hyp_mode() to
configure page tables for HYP. This function also registers the CPU
hotplug and lower power notifiers that cause HYP to be re-initialised
after the CPU has been reset.
To avoid losing the register state that controls stage2
On 30/03/16 17:30, Marc Zyngier wrote:
>> diff --git a/arch/arm/kvm/arm.c b/arch/arm/kvm/arm.c
>> index 6accd66d26f0..cf0184edf4f5 100644
>> --- a/arch/arm/kvm/arm.c
>> +++ b/arch/arm/kvm/arm.c
>> @@ -1084,9 +1092,13 @@ static int hyp_init_cpu_pm_notifier(struct
>> notifier_block *self,
>>
When the kernel is running at EL2, it doesn't need init_hyp_mode() to
configure page tables for HYP. This function also registers the CPU
hotplug and lower power notifiers that cause HYP to be re-initialised
after the CPU has been reset.
To avoid losing the register state that controls stage2
On Fri, Mar 25, 2016 at 02:04:32AM +, Andre Przywara wrote:
> From: Marc Zyngier
>
> Implement the functionality for syncing IRQs between our emulation
> and the list registers, which represent the guest's view of IRQs.
> This is done in kvm_vgic_flush_hwstate and
Hi Vladimir,
On Wed, Mar 30, 2016 at 12:52:27PM +0100, Vladimir Murzin wrote:
> On 30/03/16 12:42, Vladimir Murzin wrote:
> > On 29/03/16 14:12, Vladimir Murzin wrote:
> >> Hi Andre,
> >>
> >> On 25/03/16 02:04, Andre Przywara wrote:
> >>> Please have a look at the series, review it and give the
When we detect support for 16bit VMID in ID_AA64MMFR1, we set the
VTCR_EL2_VS field to 1 to make use of 16bit vmids. But, with
commit 3a3604bc5eb4 ("arm64: KVM: Switch to C-based stage2 init")
this is broken and we corrupt VTCR_EL2:T0SZ instead of updating the VS
field. VTCR_EL2_VS was actually
On 30/03/16 12:42, Vladimir Murzin wrote:
> On 29/03/16 14:12, Vladimir Murzin wrote:
>> Hi Andre,
>>
>> On 25/03/16 02:04, Andre Przywara wrote:
>>> Please have a look at the series, review it and give the code some
>>> serious testing (and possibly debugging). All feedback is appreciated.
>>
>>
On 29/03/16 14:12, Vladimir Murzin wrote:
> Hi Andre,
>
> On 25/03/16 02:04, Andre Przywara wrote:
>> Please have a look at the series, review it and give the code some
>> serious testing (and possibly debugging). All feedback is appreciated.
>
> I see that with the new vgic implementation
On 03/30/2016 11:12 AM, Marc Zyngier wrote:
On 30/03/16 10:06, Christoffer Dall wrote:
On Tue, Mar 29, 2016 at 06:32:15PM +0100, Marc Zyngier wrote:
Daniel,
On 29/03/16 18:13, Daniel Lezcano wrote:
On 03/24/2016 06:53 PM, Julien Grall wrote:
Introduce a structure which are filled up by the
On Fri, Mar 25, 2016 at 02:04:30AM +, Andre Przywara wrote:
> From: Christoffer Dall
>
> Introduce vgic-v2.c to contain GICv2 specific functions.
> Add vgic_v2_irq_change_affinity() to change the target VCPU of a
> particular interrupt.
>
> Signed-off-by:
On 30/03/16 10:06, Christoffer Dall wrote:
> On Tue, Mar 29, 2016 at 06:32:15PM +0100, Marc Zyngier wrote:
>> Daniel,
>>
>> On 29/03/16 18:13, Daniel Lezcano wrote:
>>> On 03/24/2016 06:53 PM, Julien Grall wrote:
Introduce a structure which are filled up by the arch timer driver and
used
On Tue, Mar 29, 2016 at 06:32:15PM +0100, Marc Zyngier wrote:
> Daniel,
>
> On 29/03/16 18:13, Daniel Lezcano wrote:
> > On 03/24/2016 06:53 PM, Julien Grall wrote:
> >> Introduce a structure which are filled up by the arch timer driver and
> >> used by the virtual timer in KVM.
> >>
> >> The
13 matches
Mail list logo