On 19 April 2016 at 13:57, André Przywara wrote:
> Hi Peter,
>
> thanks for going through the pain of looking into this!
No problem -- I figured I might as well while I have my head full
of the GICv3 spec for the QEMU emulated version.
> On 19/04/16 13:34, Peter Maydell wrote:
>> We claim to be
Hi Peter,
thanks for going through the pain of looking into this!
On 19/04/16 13:34, Peter Maydell wrote:
> On 15 April 2016 at 18:11, Andre Przywara wrote:
>> Signed-off-by: Andre Przywara
>> ---
>> virt/kvm/arm/vgic/vgic_mmio.c | 21 +++--
>> 1 file changed, 19 insertions(+),
On 15 April 2016 at 18:11, Andre Przywara wrote:
> In contrast to GICv2 SGIs in a GICv3 implementation are not triggered
> by a MMIO write, but with a system register write. KVM knows about
> that register already, we just need to implement the handler and wire
> it up to the core KVM/ARM code.
>
On 15 April 2016 at 18:11, Andre Przywara wrote:
> Signed-off-by: Andre Przywara
> ---
> virt/kvm/arm/vgic/vgic_mmio.c | 21 +++--
> 1 file changed, 19 insertions(+), 2 deletions(-)
>
> diff --git a/virt/kvm/arm/vgic/vgic_mmio.c b/virt/kvm/arm/vgic/vgic_mmio.c
> index 7d275a7..da
On 15 April 2016 at 18:11, Andre Przywara wrote:
> As in the GICv2 emulation we handle those three registers in one
> function.
>
> Signed-off-by: Andre Przywara
>
> Changelog RFC..v1:
> - kick VCPUs if distributor gets enabled
> ---
> virt/kvm/arm/vgic/vgic.h | 2 ++
> virt/kvm/arm/vgic/v
On 19/04/16 11:26, Andre Przywara wrote:
> Hi Vladimir,
>
> can you try the attached patch on top of the series to see if this
> fixes the GICv3 emulation issues you see?
>
With attached patch I don't see issue any more - all 255 vcpus are able
to boot and send/receive self SGI.
Thanks
Vladimir
Hi Vladimir,
can you try the attached patch on top of the series to see if this
fixes the GICv3 emulation issues you see?
I think these lines got lost during the MMIO framework rebasing.
Cheers,
Andre.
---
virt/kvm/arm/vgic/vgic_mmio.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/virt
