Re: [PATCH v3 25/28] arm64/sve: Detect SVE and activate runtime support

On Tue, Oct 10, 2017 at 07:38:42PM +0100, Dave P Martin wrote: > This patch enables detection of hardware SVE support via the > cpufeatures framework, and reports its presence to the kernel and > userspace via the new ARM64_SVE cpucap and HWCAP_SVE hwcap > respectively. > > Userspace can also

Re: [PATCH v3 24/28] arm64/sve: KVM: Hide SVE from CPU features exposed to guests

On Tue, Oct 10, 2017 at 07:38:41PM +0100, Dave P Martin wrote: > KVM guests cannot currently use SVE, because SVE is always > configured to trap to EL2. > > However, a guest that sees SVE reported as present in > ID_AA64PFR0_EL1 may legitimately expect that SVE works and try to > use it. Instead

Re: [PATCH v3 23/28] arm64/sve: KVM: Treat guest SVE use as undefined instruction execution

On Tue, Oct 10, 2017 at 07:38:40PM +0100, Dave P Martin wrote: > When trapping forbidden attempts by a guest to use SVE, we want the > guest to see a trap consistent with SVE not being implemented. > > This patch injects an undefined instruction exception into the > guest in response to such an

Re: [PATCH v3 21/28] arm64/sve: Add sysctl to set the default vector length for new processes

On Tue, Oct 10, 2017 at 07:38:38PM +0100, Dave P Martin wrote: > Because of the effect of SVE on the size of the signal frame, the > default vector length used for new processes involves a tradeoff > between performance of SVE-enabled software on the one hand, and > reliability of non-SVE-aware

Re: [PATCH v3 20/28] arm64/sve: Add prctl controls for userspace vector length management

On Tue, Oct 10, 2017 at 07:38:37PM +0100, Dave P Martin wrote: > This patch adds two arm64-specific prctls, to permit userspace to > control its vector length: > > * PR_SVE_SET_VL: set the thread's SVE vector length and vector >length inheritance mode. > > * PR_SVE_GET_VL: get the same

Re: [PATCH v3 19/28] arm64/sve: ptrace and ELF coredump support

On Tue, Oct 10, 2017 at 07:38:36PM +0100, Dave P Martin wrote: > @@ -702,6 +737,211 @@ static int system_call_set(struct task_struct *target, > return ret; > } > > +#ifdef CONFIG_ARM64_SVE > + > +static void sve_init_header_from_task(struct user_sve_header *header, > +

Re: [PATCH 02/37] KVM: arm64: Rework hyp_panic for VHE and non-VHE

On Thu, Oct 12, 2017 at 04:55:16PM +0100, Marc Zyngier wrote: > On 12/10/17 11:41, Christoffer Dall wrote: > > VHE actually doesn't rely on clearing the VTTBR when returning to the > > hsot kernel, and that is the current key mechanism of hyp_panic to > > host > > > figure out how to attempt to

Re: [PATCH 01/37] KVM: arm64: Avoid storing the vcpu pointer on the stack

On Thu, Oct 12, 2017 at 04:49:44PM +0100, Marc Zyngier wrote: > On 12/10/17 11:41, Christoffer Dall wrote: > > We already have the percpu area for the host cpu state, which points to > > the VCPU, so there's no need to store the VCPU pointer on the stack on > > every context switch. We can be a

[PATCH] arm64: KVM: set right LR register value for 32 bit guest when inject abort

When a exception is trapped to EL2, hardware uses ELR_ELx to hold the current fault instruction address. If KVM wants to inject a abort to 32 bit guest, it needs to set the LR register for the guest to emulate this abort happened in the guest. Because ARM32 architecture is Multi-pipeline, so the

Re: [PATCH 04/37] KVM: arm/arm64: Get rid of vcpu->arch.irq_lines

On 12/10/17 11:41, Christoffer Dall wrote: > We currently have a separate read-modify-write of the HCR_EL2 on entry > to the guest for the sole purpose of setting the VF and VI bits, if set. > Since this is most rarely the case (only when using userspace IRQ chip > and interrupts are in flight),

Re: [PATCH 03/37] KVM: arm64: Move HCR_INT_OVERRIDE to default HCR_EL2 guest flag

On 12/10/17 11:41, Christoffer Dall wrote: > From: Shih-Wei Li > > We always set the IMO and FMO bits in the HCR_EL2 when running the > guest, regardless if we use the vgic or not. By moving these flags to > HCR_GUEST_FLAGS we can avoid one of the extra save/restore

Re: [PATCH v3 13/28] arm64/sve: Signal handling support

On Wed, Oct 11, 2017 at 05:40:52PM +0100, Catalin Marinas wrote: > On Tue, Oct 10, 2017 at 07:38:30PM +0100, Dave P Martin wrote: > > diff --git a/arch/arm64/kernel/fpsimd.c b/arch/arm64/kernel/fpsimd.c > > index aabeaee..fa4ed34 100644 > > --- a/arch/arm64/kernel/fpsimd.c > > +++

Re: [PATCH v3 11/28] arm64/sve: Core task context handling

On Wed, Oct 11, 2017 at 05:15:58PM +0100, Catalin Marinas wrote: > On Tue, Oct 10, 2017 at 07:38:28PM +0100, Dave P Martin wrote: > > diff --git a/arch/arm64/include/asm/fpsimd.h > > b/arch/arm64/include/asm/fpsimd.h > > index 026a7c7..b1409de 100644 > > --- a/arch/arm64/include/asm/fpsimd.h > >

Re: [PATCH 02/37] KVM: arm64: Rework hyp_panic for VHE and non-VHE

On 12/10/17 11:41, Christoffer Dall wrote: > VHE actually doesn't rely on clearing the VTTBR when returning to the > hsot kernel, and that is the current key mechanism of hyp_panic to host > figure out how to attempt to return to a state good enough to print a > panic statement. > > Therefore,

Re: [PATCH 01/37] KVM: arm64: Avoid storing the vcpu pointer on the stack

On 12/10/17 11:41, Christoffer Dall wrote: > We already have the percpu area for the host cpu state, which points to > the VCPU, so there's no need to store the VCPU pointer on the stack on > every context switch. We can be a little more clever and just use > tpidr_el2 for the percpu offset and

Re: [PATCH v3 16/28] arm64/sve: Probe SVE capabilities and usable vector lengths

On 10/10/17 19:38, Dave Martin wrote: This patch uses the cpufeatures framework to determine common SVE capabilities and vector lengths, and configures the runtime SVE support code appropriately. ZCR_ELx is not really a feature register, but it is convenient to use it as a template for

Re: [PATCH v3 19/20] KVM: arm64: Handle RAS SErrors from EL2 on guest exit

Hi Marc, On 11/10/17 11:37, Marc Zyngier wrote: > On Thu, Oct 05 2017 at 8:18:11 pm BST, James Morse > wrote: >> We expect to have firmware-first handling of RAS SErrors, with errors >> notified via an APEI method. For systems without firmware-first, add >> some minimal

Re: [PATCH v3 08/20] arm64: entry.S: convert elX_irq

Hi Julien, On 11/10/17 18:13, Julien Thierry wrote: > On 05/10/17 20:18, James Morse wrote: >> Following our 'dai' order, irqs should be processed with debug and >> serror exceptions unmasked. >> > Add a helper to unmask these two, (and fiq for good measure). >> >> Signed-off-by: James Morse

Re: [PATCH v3 01/20] arm64: explicitly mask all exceptions

Hi Julien, On 11/10/17 17:30, Julien Thierry wrote: > On 05/10/17 20:17, James Morse wrote: >> There are a few places where we want to mask all exceptions. Today we >> do this in a piecemeal fashion, typically we expect the caller to >> have masked irqs and the arch code masks debug exceptions,

Re: [PATCH v3 22/28] arm64/sve: KVM: Prevent guests from using SVE

On 12/10/17 12:04, Dave Martin wrote: > On Wed, Oct 11, 2017 at 05:28:06PM +0100, Marc Zyngier wrote: >> [+ Christoffer] >> >> On 10/10/17 19:38, Dave Martin wrote: >>> Until KVM has full SVE support, guests must not be allowed to >>> execute SVE instructions. >>> >>> This patch enables the

Re: [PATCH v3 22/28] arm64/sve: KVM: Prevent guests from using SVE

On Wed, Oct 11, 2017 at 05:28:06PM +0100, Marc Zyngier wrote: > [+ Christoffer] > > On 10/10/17 19:38, Dave Martin wrote: > > Until KVM has full SVE support, guests must not be allowed to > > execute SVE instructions. > > > > This patch enables the necessary traps, and also ensures that the > >

Re: [PATCH v3 18/28] arm64/sve: Preserve SVE registers around EFI runtime service calls

On Tue, Oct 10, 2017 at 07:38:35PM +0100, Dave P Martin wrote: > The EFI runtime services ABI allows EFI to make free use of the > FPSIMD registers during EFI runtime service calls, subject to the > callee-save requirements of the AArch64 procedure call standard. > > However, the SVE architecture

[PATCH 35/37] KVM: arm/arm64: Get rid of vgic_elrsr

There is really no need to store the vgic_elrsr on the VGIC data structures as the only need we have for the elrsr is to figure out if an LR is inavtive when we save the VGIC state upon returning from the guest. We can might as well store this in a temporary local variable. This also gets rid of

[PATCH 25/37] KVM: arm64: Prepare to handle traps on remaining deferred EL1 sysregs

Handle accesses during traps to any remaining EL1 registers which can be deferred to vcpu_load and vcpu_put, by either accessing them directly on the physical CPU when the latest version is stored there, or by synchronizing the memory representation with the CPU state. Signed-off-by: Christoffer

[PATCH 17/37] KVM: arm64: Move userspace system registers into separate function

There's a semantic difference between the EL1 registers that control operation of a kernel running in EL1 and EL1 registers that only control userspace execution in EL0. Since we can defer saving/restoring the latter, move them into their own function. We also take this chance to rename the

[PATCH 18/37] KVM: arm64: Rewrite sysreg alternatives to static keys

As we are about to move calls around in the sysreg save/restore logic, let's first rewrite the alternative function callers, because it is going to make the next patches much easier to read. Signed-off-by: Christoffer Dall --- arch/arm64/kvm/hyp/sysreg-sr.c | 17

[PATCH 34/37] KVM: arm/arm64: Handle VGICv3 save/restore from the main VGIC code on VHE

Just like we can program the GICv2 hypervisor control interface directly from the core vgic code, we can do the same for the GICv3 hypervisor control interface on VHE systems. We do this by simply calling the save/restore functions when we have VHE and we can then get rid of the save/restore

[PATCH 33/37] KVM: arm/arm64: Move arm64-only vgic-v2-sr.c file to arm64

The vgic-v2-sr.c file now only contains the logic to replay unaligned accesses to the virtual CPU interface on 16K and 64K page systems, which is only relevant on 64-bit platforms. Therefore move this file to the arm64 KVM tree, remove the compile directive from the 32-bit side makefile, and

[PATCH 27/37] KVM: arm64: Defer saving/restoring system registers to vcpu load/put on VHE

Some system registers do not affect the host kernel's execution and can therefore be loaded when we are about to run a VCPU and we don't have to restore the host state to the hardware before the time when we are actually about to return to userspace or schedule out the VCPU thread. The EL1 system

[PATCH 28/37] KVM: arm64: Move common VHE/non-VHE trap config in separate functions

As we are about to be more lazy with some of the trap configuration register read/writes for VHE systems, move the logic that is currently shared between VHE and non-VHE into a separate function which can be called from either the world-switch path or from vcpu_load/vcpu_put. Signed-off-by:

[PATCH 30/37] KVM: arm64: Configure c15, PMU, and debug register traps on cpu load/put for VHE

We do not have to change the c15 trap setting on each switch to/from the guest on VHE systems, because this setting only affects EL0. The PMU and debug trap configuration can also be done on vcpu load/put instead, because they don't affect how the host kernel can access the debug registers while

[PATCH 31/37] KVM: arm64: Separate activate_traps and deactive_traps for VHE and non-VHE

To make the code more readable and to avoid the overhead of a function call, let's get rid of a pair of the alternative function selectors and explicitly call the VHE and non-VHE functions instead, telling the compiler to try to inline the static function if it can. Signed-off-by: Christoffer

[PATCH 37/37] KVM: arm/arm64: Avoid VGICv3 save/restore on VHE with no IRQs

We can finally get completely rid of any calls to the VGICv3 save/restore functions when the AP lists are empty on VHE systems. This requires carefully factoring out trap configuration from saving and restoring state, and carefully choosing what to do on the VHE and non-VHE path. One of the

[PATCH 32/37] KVM: arm/arm64: Handle VGICv2 save/restore from the main VGIC code

We can program the GICv2 hypervisor control interface logic directly from the core vgic code and can instead do the save/restore directly from the flush/sync functions, which can lead to a number of future optimizations. Signed-off-by: Christoffer Dall ---

[PATCH 26/37] KVM: arm64: Prepare to handle traps on deferred AArch32 sysregs

Handle accesses to any AArch32 EL1 system registers where we can defer saving and restoring them to vcpu_load and vcpu_put, and which are stored in special EL2 registers only used support 32-bit guests. Signed-off-by: Christoffer Dall ---

[PATCH 20/37] KVM: arm64: Unify non-VHE host/guest sysreg save and restore functions

There is no need to have multiple identical functions with different names for saving host and guest state. When saving and restoring state for the host and guest, the state is the same for both contexts, and that's why we have the kvm_cpu_context structure. Delete one version and rename the

[PATCH 22/37] KVM: arm64: Change 32-bit handling of VM system registers

We currently handle 32-bit accesses to trapped VM system registers using the 32-bit index into the coproc array on the vcpu structure, which is a union of the coprog array and the sysreg array. Since all the 32-bit coproc indicies are created to correspond to the architectural mapping between

[PATCH 36/37] KVM: arm/arm64: Move VGIC APR save/restore to vgic put/load

The APRs can only have bits set when the guest acknowledges an interrupt in the LR and can only have a bit cleared when the guest EOIs an interrupt in the LR. Therefore, if we have no LRs with any pending/active interrupts, the APR cannot change value and there is no need to clear it on every

[PATCH 29/37] KVM: arm64: Configure FPSIMD traps on vcpu load/put for VHE

There is no need to enable/disable traps to FP registers on every switch to/from the VM, because the host kernel does not use this resource without calling vcpu_put. We can therefore move things around enough that we still always write FPEXC32_EL2 before programming CPTR_EL2 but only program

[PATCH 24/37] KVM: arm64: Prepare to handle traps on deferred EL0 sysregs

We can trap access to ACTLR_EL1 which we can later defer to only save/restore during vcpu_load and vcpu_put, so let's read the value directly from the CPU when necessary. Signed-off-by: Christoffer Dall --- arch/arm64/kvm/sys_regs_generic_v8.c | 5 - 1 file

[PATCH 23/37] KVM: arm64: Prepare to handle traps on deferred VM sysregs

When we defer the save/restore of system registers to vcpu_load and vcpu_put, we need to take care of the emulation code that handles traps to these registers, since simply reading the memory array will return stale data. Therefore, introduce two functions to directly read/write the registers

[PATCH 12/37] KVM: arm64: Factor out fault info population and gic workarounds

The current world-switch function has functionality to detect a number of cases where we need to fixup some part of the exit condition and possibly run the guest again, before having restored the host state. This includes populating missing fault info, emulating GICv2 CPU interface accesses when

[PATCH 13/37] KVM: arm64: Introduce VHE-specific kvm_vcpu_run

So far this is just a copy of the legacy non-VHE switch function, where we only change the existing calls to has_vhe() in both the original and new functions. Signed-off-by: Christoffer Dall --- arch/arm/include/asm/kvm_asm.h | 4 +++

[PATCH 15/37] KVM: arm64: Don't deactivate VM on VHE systems

There is no need to reset the VTTBR to zero when exiting the guest on VHE systems. VHE systems don't use stage 2 translations for the EL2&0 translation regime used by the host. Signed-off-by: Christoffer Dall --- arch/arm64/kvm/hyp/switch.c | 5 ++--- 1 file

[PATCH 19/37] KVM: arm64: Introduce separate VHE/non-VHE sysreg save/restore functions

As we are about to handle system registers quite differently between VHE and non-VHE systems. In preparation for that, we need to split some of the handling functions between VHE and non-VHE functionality. For now, we simply copy the non-VHE functions, but we do change the use of static keys for

[PATCH 21/37] KVM: arm64: Don't save the host ELR_EL2 and SPSR_EL2 on VHE systems

On non-VHE systems we need to save the ELR_EL2 and SPSR_EL2 so that we can return to the host in EL1 in the same state and location where we issued a hypercall to EL2, but these registers don't contain anything important on VHE, because all of the host runs in EL2. Therefore, exclude them when

[PATCH 10/37] KVM: arm64: Slightly improve debug save/restore functions

The debug save/restore functions can be improved by using the has_vhe() static key instead of the instruction alternative. Using the static key uses the same paradigm as we're going to use elsewhere, it makes the code more readable, and it generates slightly better code (no stack setups and

[PATCH 16/37] KVM: arm64: Remove noop calls to timer save/restore from VHE switch

The VHE switch function calls __timer_enable_traps and __timer_disable_traps which don't do anything on VHE systems. Therefore, simply remove these calls from the VHE switch function and make the functions non-conditional as they are now only called from the non-VHE switch path. Signed-off-by:

[PATCH 14/37] KVM: arm64: Remove kern_hyp_va() use in VHE switch function

VHE kernels run completely in EL2 and therefore don't have a notion of kernel and hyp addresses, they are all just kernel addresses. Therefore don't call kern_hyp_va() in the VHE switch function. Signed-off-by: Christoffer Dall --- arch/arm64/kvm/hyp/switch.c | 4

[PATCH 09/37] KVM: arm64: Move debug dirty flag calculation out of world switch

There is no need to figure out inside the world-switch if we should save/restore the debug registers or not, we can might as well do that in the higher level debug setup code, making it easier to optimize down the line. Signed-off-by: Christoffer Dall ---

[PATCH 06/37] KVM: arm/arm64: Only load/put VCPU state for KVM_RUN

We only want to do things like invalidating TLBs or load timer state onto the physical CPU if we really intend to run the VCPU, not if we are simply retrieving some in-kernel value from userspace, for example. Signed-off-by: Christoffer Dall --- virt/kvm/arm/arm.c |

[PATCH 05/37] KVM: Record the executing ioctl number on the vcpu struct

Some architectures may decide to do different things during kvm_arch_vcpu_load depending on the ioctl being executed. For example, arm64 is about to do significant work in vcpu load/put when running a vcpu, but not when doing things like KVM_SET_ONE_REG or KVM_SET_MP_STATE. Therefore, store the

[PATCH 07/37] KVM: arm/arm64: Add kvm_vcpu_load_sysregs and kvm_vcpu_put_sysregs

As we are about to move a buch of save/restore logic for VHE kernels to the load and put functions, we need some infrastructure to do this. Signed-off-by: Christoffer Dall --- arch/arm/include/asm/kvm_host.h | 3 +++ arch/arm64/include/asm/kvm_host.h | 3 +++

[PATCH 04/37] KVM: arm/arm64: Get rid of vcpu->arch.irq_lines

We currently have a separate read-modify-write of the HCR_EL2 on entry to the guest for the sole purpose of setting the VF and VI bits, if set. Since this is most rarely the case (only when using userspace IRQ chip and interrupts are in flight), let's get rid of this operation and instead modify

[PATCH 01/37] KVM: arm64: Avoid storing the vcpu pointer on the stack

We already have the percpu area for the host cpu state, which points to the VCPU, so there's no need to store the VCPU pointer on the stack on every context switch. We can be a little more clever and just use tpidr_el2 for the percpu offset and load the VCPU pointer from the host context. This

[PATCH 03/37] KVM: arm64: Move HCR_INT_OVERRIDE to default HCR_EL2 guest flag

From: Shih-Wei Li We always set the IMO and FMO bits in the HCR_EL2 when running the guest, regardless if we use the vgic or not. By moving these flags to HCR_GUEST_FLAGS we can avoid one of the extra save/restore operations of HCR_EL2 in the world switch code, and we

[PATCH 02/37] KVM: arm64: Rework hyp_panic for VHE and non-VHE

VHE actually doesn't rely on clearing the VTTBR when returning to the hsot kernel, and that is the current key mechanism of hyp_panic to figure out how to attempt to return to a state good enough to print a panic statement. Therefore, we split the hyp_panic function into two functions, a VHE and

[PATCH 08/37] KVM: arm64: Defer restoring host VFP state to vcpu_put

Avoid saving the guest VFP registers and restoring the host VFP registers on every exit from the VM. Only when we're about to run userspace or other threads in the kernel do we really have to switch the state back to the host state. We still initially configure the VFP registers to trap when

[PATCH 00/37] Optimize KVM/ARM for VHE systems

This series redesigns parts of KVM/ARM to optimize the performance on VHE systems. The general approach is to try to do as little work as possible when transitioning betwen the VM and the hypervisor. This has the benefit of lower latency when waiting for interrupts and delivering virtual