On Fri, 22 Feb 2019 17:27:44 +
Dave Martin wrote:
> On Fri, Feb 22, 2019 at 12:18:18PM +, Andre Przywara wrote:
> > Add documentation for the newly defined firmware registers to save and
> > restore any vulnerability migitation status.
> >
> > Signed-off-by: Andre Przywara
> > ---
> >
On Fri, 22 Feb 2019 17:22:37 +
Dave Martin wrote:
Hi Dave,
thanks for having a look!
> On Fri, Feb 22, 2019 at 12:18:17PM +, Andre Przywara wrote:
> > KVM implements the firmware interface for mitigating cache speculation
> > vulnerabilities. Guests may use this interface to ensure
On 22/02/19 16:06, lantianyu1...@gmail.com wrote:
> From: Lan Tianyu
>
> This patchset is to introduce hv ept tlb range list flush function
> support in the KVM MMU component. Flushing ept tlbs of several address
> range can be done via single hypercall and new list flush function is
> used in
On Fri, 22 Feb 2019 17:16:12 +
Steven Price wrote:
> On 22/02/2019 12:18, Andre Przywara wrote:
> > KVM implements the firmware interface for mitigating cache speculation
> > vulnerabilities. Guests may use this interface to ensure mitigation is
> > active.
> > If we want to migrate such a
On Fri, Feb 22, 2019 at 12:18:18PM +, Andre Przywara wrote:
> Add documentation for the newly defined firmware registers to save and
> restore any vulnerability migitation status.
>
> Signed-off-by: Andre Przywara
> ---
> Documentation/virtual/kvm/arm/psci.txt | 24
On Fri, Feb 22, 2019 at 12:18:17PM +, Andre Przywara wrote:
> KVM implements the firmware interface for mitigating cache speculation
> vulnerabilities. Guests may use this interface to ensure mitigation is
> active.
> If we want to migrate such a guest to a host with a different support
>
On 22/02/2019 12:18, Andre Przywara wrote:
> Add documentation for the newly defined firmware registers to save and
> restore any vulnerability migitation status.
>
> Signed-off-by: Andre Przywara
> ---
> Documentation/virtual/kvm/arm/psci.txt | 24
> 1 file changed, 24
On 22/02/2019 12:18, Andre Przywara wrote:
> KVM implements the firmware interface for mitigating cache speculation
> vulnerabilities. Guests may use this interface to ensure mitigation is
> active.
> If we want to migrate such a guest to a host with a different support
> level for those
On 22/02/19 17:25, Marc Zyngier wrote:
> git://git.kernel.org/pub/scm/linux/kernel/git/kvmarm/kvmarm.git
> tags/kvmarm-for-v5.1
Pulled, thanks.
Paolo
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From: Shaokun Zhang
The 'gpa_end' local variable is never used and let's remove it.
Cc: Christoffer Dall
Signed-off-by: Shaokun Zhang
Signed-off-by: Marc Zyngier
---
virt/kvm/arm/mmu.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/virt/kvm/arm/mmu.c
From: Christoffer Dall
In preparation for nested virtualization where we are going to have more
than a single VMID per VM, let's factor out the VMID data into a
separate VMID data structure and change the VMID allocator to operate on
this new structure instead of using a struct kvm.
This also
Until now, we haven't differentiated between HYP calls that
have a return value and those who don't. As we're about to
change this, introduce kvm_call_hyp_ret(), and change all
call sites that actually make use of a return value.
Signed-off-by: Marc Zyngier
Acked-by: Christoffer Dall
We now call VHE code directly, without going through any central
dispatching function. Let's drop that code.
Signed-off-by: Marc Zyngier
Acked-by: Christoffer Dall
Signed-off-by: Christoffer Dall
---
arch/arm64/kvm/hyp.S | 3 ---
arch/arm64/kvm/hyp/hyp-entry.S | 12
2
From: Ard Biesheuvel
On SMP ARM systems, cache maintenance by set/way should only ever be
done in the context of onlining or offlining CPUs, which is typically
done by bare metal firmware and never in a virtual machine. For this
reason, we trap set/way cache maintenance operations and replace
From: Masahiro Yamada
As the comment block in include/trace/define_trace.h says,
TRACE_INCLUDE_PATH should be a relative path to the define_trace.h
../../virt/kvm/arm is the correct relative path.
../../../virt/kvm/arm is working by coincidence because the top
Makefile adds
Paolo, Radim,
This is the KVM/arm updates for Linux v5.1, much smaller than expected, as
most of the stuff we were hoping to queue missed the merge window. Oh well,
5.2 will be "interesting".
This time, we have a bunch of changes that prepare the landing of the some
of the nested virt code, some
Instead of having an open-coded macro, reuse the sys_reg() macro
that does the exact same thing (the encoding is slightly different,
but the ordering property is the same).
Signed-off-by: Marc Zyngier
Acked-by: Christoffer Dall
Signed-off-by: Christoffer Dall
---
arch/arm64/kvm/sys_regs.c |
We currently eagerly save/restore MPIDR. It turns out to be
slightly pointless:
- On the host, this value is known as soon as we're scheduled on a
physical CPU
- In the guest, this value cannot change, as it is set by KVM
(and this is a read-only register)
The result of the above is that we
From: Andre Przywara
A host running in VHE mode gets the EL2 physical timer as its time
source (accessed using the EL1 sysreg accessors, which get re-directed
to the EL2 sysregs by VHE).
The EL1 physical timer remains unused by the host kernel, allowing us to
pass that on directly to a KVM
When a guest gets scheduled, KVM performs a "load" operation,
which for the timer includes evaluating the virtual "active" state
of the interrupt, and replicating it on the physical side. This
ensures that the deactivation in the guest will also take place
in the physical GIC distributor.
If the
When running VHE, there is no need to jump via some stub to perform
a "HYP" function call, as there is a single address space.
Let's thus change kvm_call_hyp() and co to perform a direct call
in this case. Although this results in a bit of code expansion,
it allows the compiler to check for type
For historical reasons, KVM/arm and KVM/arm64 have had different
entries in the MAINTAINER file. This makes little sense, as they are
maintained together.
On top of that, we have a bunch of talented people helping with
the reviewing, and they deserve to be mentioned in the consolidated
entry.
From: Masahiro Yamada
The header search path -I. in kernel Makefiles is very suspicious;
it allows the compiler to search for headers in the top of $(srctree),
where obviously no header file exists.
I was able to build without these extra header search paths.
Acked-by: Christoffer Dall
From: Shaokun Zhang
The 'timer' local variable became unused after commit bee038a67487
("KVM: arm/arm64: Rework the timer code to use a timer_map").
Remove it to avoid [-Wunused-but-set-variable] warning.
Cc: Christoffer Dall
Cc: James Morse
Cc: Suzuki K Pouloze
Reviewed-by: Julien Thierry
From: Dave Martin
Due to what looks like a typo dating back to the original addition
of FPEXC32_EL2 handling, KVM currently initialises this register to
an architecturally invalid value.
As a result, the VECITR field (RES1) in bits [10:8] is initialised
with 0, and the two reserved (RES0) bits
From: Zenghui Yu
Since Suzuki K Poulose's work on Dynamic IPA support, KVM_PHYS_SHIFT will
be used only when machine_type's bits[7:0] equal to 0 (by default). Thus
the outdated comment should be fixed.
Reviewed-by: Suzuki K Poulose
Signed-off-by: Zenghui Yu
Signed-off-by: Marc Zyngier
---
From: Christoffer Dall
Move this little function to the header files for arm/arm64 so other
code can make use of it directly.
Signed-off-by: Christoffer Dall
Signed-off-by: Marc Zyngier
---
arch/arm/include/asm/kvm_emulate.h | 8
arch/arm64/include/asm/kvm_emulate.h | 8
From: Colin Ian King
There is a spelling mistake in a kvm_err error message. Fix it.
Signed-off-by: Colin Ian King
Signed-off-by: Marc Zyngier
---
virt/kvm/arm/arm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/virt/kvm/arm/arm.c b/virt/kvm/arm/arm.c
index
From: Ard Biesheuvel
We currently permit CPUs in the same system to deviate in the exact
topology of the caches, and we subsequently hide this fact from user
space by exposing a sanitised value of the cache type register CTR_EL0.
However, guests running under KVM see the bare value of CTR_EL0,
From: Masahiro Yamada
Currently, the Kbuild core manipulates header search paths in a crazy
way [1].
To fix this mess, I want all Makefiles to add explicit $(srctree)/ to
the search paths in the srctree. Some Makefiles are already written in
that way, but not all. The goal of this work is to
From: Christoffer Dall
VHE systems don't have to emulate the physical timer, we can simply
assign the EL1 physical timer directly to the VM as the host always
uses the EL2 timers.
In order to minimize the amount of cruft, AArch32 gets definitions for
the physical timer too, but is should be
From: Christoffer Dall
Prepare for having 4 timer data structures (2 for now).
Move loaded to the cpu data structure and not the individual timer
structure, in preparation for assigning the EL1 phys timer as well.
Signed-off-by: Christoffer Dall
Signed-off-by: Marc Zyngier
---
From: Christoffer Dall
We are currently emulating two timers in two different ways. When we
add support for nested virtualization in the future, we are going to be
emulating either two timers in two diffferent ways, or four timers in a
single way.
We need a unified data structure to keep track
From: Andre Przywara
At the moment we have separate system register emulation handlers for
each timer register. Actually they are quite similar, and we rely on
kvm_arm_timer_[gs]et_reg() for the actual emulation anyways, so let's
just merge all of those handlers into one function, which just
We previously incorrectly named the define for this system register.
Signed-off-by: Marc Zyngier
Signed-off-by: Christoffer Dall
---
arch/arm/include/asm/arch_gicv3.h | 4 ++--
arch/arm64/include/asm/sysreg.h | 2 +-
virt/kvm/arm/hyp/vgic-v3-sr.c | 2 +-
3 files changed, 4 insertions(+),
Just like on arm64, and for the same reasons, kvm_call_hyp removes
any form of type safety when calling into HYP. But we can still
try to tell the compiler what we're trying to achieve.
Here, we can add code that would do the function call if it wasn't
guarded by an always-false predicate.
From: Christoffer Dall
Instead of calling into kvm_timer_[un]schedule from the main kvm
blocking path, test if the VCPU is on the wait queue from the load/put
path and perform the background timer setup/cancel in this path.
This has the distinct advantage that we no longer race between load/put
Hi Dave,
On 18/02/2019 19:52, Dave Martin wrote:
The reset_unknown() system register helper initialises a guest
register to a distinctive junk value on vcpu reset, to help expose
and debug deficient register initialisation within the guest.
Some registers such as the SVE control register
When I read KVM/ARM64 related code I cannot find any issue or something
could be improved for performance; so this patch series is only for
minor cleaning up and refactoring code.
Hope this is helpful and can be picked up into mainline kernel,
otherwise it's also fine for me if the maintainer or
Hi Marc,
On Fri, Feb 22, 2019 at 08:37:56AM +, Marc Zyngier wrote:
> On Fri, 22 Feb 2019 16:23:24 +0800
> Leo Yan wrote:
>
> > The function kvm_vgic_inject_irq() is not only used by PPIs but also can
> > be used to inject interrupt for SPIs; this patch improves comment for
> > argument
Use macro for ID_AA64MMFR1_EL1.VH bits shift instead of 8 directly.
Signed-off-by: Leo Yan
---
arch/arm64/kernel/head.S | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/kernel/head.S b/arch/arm64/kernel/head.S
index 4471f570a295..3ac377e9fd28 100644
---
Hello Jean-Philippe,
Jean-Philippe Brucker writes:
> Makes sense, though I think other virtio devices have been developed a
> little more organically: device and driver code got upstreamed first,
> and then the specification describing their interface got merged into
> the standard. For example
Since commit f7bec68d2fae ("arm/arm64: KVM: Prune unused #defines"), the
macro HYP_PAGE_OFFSET has been removed, but it's kept in the comment for
the function create_hyp_mappings().
This patch uses PAGE_OFFSET to replace HYP_PAGE_OFFSET and this is
consistent with what is doing in the function.
The function kvm_vgic_inject_irq() is not only used by PPIs but also can
be used to inject interrupt for SPIs; this patch improves comment for
argument @cpuid to reflect support SPIs as well.
Signed-off-by: Leo Yan
---
virt/kvm/arm/vgic/vgic.c | 2 +-
1 file changed, 1 insertion(+), 1
Define macro TCR_EL2_T0SZ_MASK as TCR_T0SZ_MASK, so can remove the hard
number 0x3f.
Signed-off-by: Leo Yan
---
arch/arm64/include/asm/kvm_arm.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/include/asm/kvm_arm.h b/arch/arm64/include/asm/kvm_arm.h
index
On Fri, Feb 22, 2019 at 09:39:23AM +, Marc Zyngier wrote:
[...]
> > > > diff --git a/virt/kvm/arm/vgic/vgic.c b/virt/kvm/arm/vgic/vgic.c
> > > > index 7cfdfbc910e0..79fe64c15051 100644
> > > > --- a/virt/kvm/arm/vgic/vgic.c
> > > > +++ b/virt/kvm/arm/vgic/vgic.c
> > > > @@ -394,7 +394,7 @@
Michael S. Tsirkin writes:
> On Mon, Jan 21, 2019 at 11:29:05AM +, Jean-Philippe Brucker wrote:
>> Hi,
>>
>> On 18/01/2019 15:51, Michael S. Tsirkin wrote:
>> >
>> > On Tue, Jan 15, 2019 at 12:19:52PM +, Jean-Philippe Brucker wrote:
>> >> Implement the virtio-iommu driver, following
On Fri, 22 Feb 2019 12:49:06 +,
Leo Yan wrote:
>
> On Fri, Feb 22, 2019 at 09:39:23AM +, Marc Zyngier wrote:
>
> [...]
>
> > > > > diff --git a/virt/kvm/arm/vgic/vgic.c b/virt/kvm/arm/vgic/vgic.c
> > > > > index 7cfdfbc910e0..79fe64c15051 100644
> > > > > --- a/virt/kvm/arm/vgic/vgic.c
Hi Dave,
On 18/02/2019 19:52, Dave Martin wrote:
The current FPSIMD/SVE context handling support for non-task (i.e.,
KVM vcpu) contexts does not take SVE into account. This means that
NIT: Double-space before "This".
only task contexts can safely use SVE at present.
In preparation for
On Fri, Feb 15, 2019 at 11:23 PM Paolo Bonzini wrote:
>
> On 15/02/19 16:05, Tianyu Lan wrote:
> > Yes, you are right. Thanks to point out and will fix. The last_level
> > flag is to avoid adding middle page node(e.g, PGD, PMD)
> > into flush list. The address range will be duplicated if adding
From: Lan Tianyu
This patch is to introduce tlb flush with range list interface and use
struct kvm_mmu_page as list entry. Use flush list function in the
kvm_mmu_commit_zap_page().
Signed-off-by: Lan Tianyu
---
arch/x86/kvm/mmu.c | 24 +++-
1 file changed, 23
From: Lan Tianyu
This patch is to add kvm_get_memslot() to get struct kvm_memory_slot
via slot it and remove redundant codes. The function will also be used
in the following changes.
Signed-off-by: Lan Tianyu
---
include/linux/kvm_host.h | 1 +
virt/kvm/kvm_main.c | 45
From: Lan Tianyu
This patch is to use tlb range flush to flush memslot's in the
kvm_vm_ioctl_get/clear_dirty_log() instead of flushing tlbs
of entire ept page table when range flush is available.
Signed-off-by: Lan Tianyu
---
arch/x86/kvm/mmu.c | 8 +---
arch/x86/kvm/mmu.h | 7 +++
From: Lan Tianyu
This patchset is to introduce hv ept tlb range list flush function
support in the KVM MMU component. Flushing ept tlbs of several address
range can be done via single hypercall and new list flush function is
used in the kvm_mmu_commit_zap_page() and FNAME(sync_page). This
From: Lan Tianyu
This patch is to add flush parameter for kvm_aga_hva() and move tlb
flush from kvm_mmu_notifier_clear_flush_young() to kvm_age_hva().
kvm_age_hva() can check whether tlb flush is necessary when
return value young is more than 0. Flush tlb if both conditions
are met.
From: Lan Tianyu
This patch is to flush tlb directly in the kvm_mmu_slot_gfn_write_protect()
when range flush is available.
Signed-off-by: Lan Tianyu
---
arch/x86/kvm/mmu.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/x86/kvm/mmu.c b/arch/x86/kvm/mmu.c
index
From: Lan Tianyu
Populate ranges on the flush list into struct hv_guest_mapping_flush_list
when flush list is available in the struct kvm_tlb_range.
Signed-off-by: Lan Tianyu
---
Change since v2:
- Fix calculation of flush pages in the kvm_fill_hv_flush_list_func()
---
From: Lan Tianyu
This patch is to use range flush to flush tlbs of input struct
kvm_mmu_page in the sync_page(). If range flush is not available,
kvm_flush_remote_tlbs_with_address() will call kvm_flush_remote_tlbs().
Signed-off-by: Lan Tianyu
---
arch/x86/kvm/paging_tmpl.h | 5 +++--
1 file
From: Lan Tianyu
Add parameter offset to specify start position to add flush ranges in
guest address list of struct hv_guest_mapping_flush_list.
Signed-off-by: Lan Tianyu
---
arch/x86/hyperv/nested.c| 4 ++--
arch/x86/include/asm/mshyperv.h | 2 +-
arch/x86/kvm/vmx/vmx.c | 2
On Mon, 7 Jan 2019 13:17:37 +
Steven Price wrote:
Hi,
> On 07/01/2019 12:05, Andre Przywara wrote:
> > KVM implements the firmware interface for mitigating cache speculation
> > vulnerabilities. Guests may use this interface to ensure mitigation is
> > active.
> > If we want to migrate such
Hi,
Aside from a rebase against kvm-arm/next, this update introduces a new
UNAFFECTED value for WORKAROUND_1, which is not used at the moment, but
will become useful with some patches extending the host kernel workaround
code [1]. We add the value to the ABI already.
Also we now require an exact
KVM implements the firmware interface for mitigating cache speculation
vulnerabilities. Guests may use this interface to ensure mitigation is
active.
If we want to migrate such a guest to a host with a different support
level for those workarounds, migration might need to fail, to ensure that
Hi Thiago,
On 21/02/2019 22:18, Thiago Jung Bauermann wrote:
>
> Hello Jean-Philippe,
>
> Jean-Philippe Brucker writes:
>> Makes sense, though I think other virtio devices have been developed a
>> little more organically: device and driver code got upstreamed first,
>> and then the
Add documentation for the newly defined firmware registers to save and
restore any vulnerability migitation status.
Signed-off-by: Andre Przywara
---
Documentation/virtual/kvm/arm/psci.txt | 24
1 file changed, 24 insertions(+)
diff --git
On Fri, 22 Feb 2019 11:42:46 +
Julien Grall wrote:
> Hi Marc,
>
> On 22/02/2019 09:18, Marc Zyngier wrote:
> > On Thu, 21 Feb 2019 11:02:56 +
> > Julien Grall wrote:
> >
> > Hi Julien,
> >
> >> Hi Christoffer,
> >>
> >> On 24/01/2019 14:00, Christoffer Dall wrote:
> >>> Note that
On Fri, 22 Feb 2019 10:56:07 +
Dave Martin wrote:
> On Fri, Feb 22, 2019 at 10:01:03AM +, Marc Zyngier wrote:
> > On Thu, 21 Feb 2019 11:42:32 +
> > Dave Martin wrote:
> >
> > > Due to what looks like a typo dating back to the original addition
> > > of FPEXC32_EL2 handling, KVM
On Fri, Feb 22, 2019 at 04:23:25PM +0800, Leo Yan wrote:
> Define macro TCR_EL2_T0SZ_MASK as TCR_T0SZ_MASK, so can remove the hard
> number 0x3f.
>
> Signed-off-by: Leo Yan
Given we do this for the other TCR fields, and the value is correct
AFAICT, this makes sense to me. FWIW:
Reviewed-by:
Hi Marc,
On 22/02/2019 09:18, Marc Zyngier wrote:
On Thu, 21 Feb 2019 11:02:56 +
Julien Grall wrote:
Hi Julien,
Hi Christoffer,
On 24/01/2019 14:00, Christoffer Dall wrote:
Note that to avoid mapping the kvm_vmid_bits variable into hyp, we
simply forego the masking of the vmid value
On Fri, Feb 22, 2019 at 04:23:23PM +0800, Leo Yan wrote:
> Use macro for ID_AA64MMFR1_EL1.VH bits shift instead of 8 directly.
>
> Signed-off-by: Leo Yan
It's always nice to get rid of magic numbers, and this is correct
AFAICT. FWIW:
Reviewed-by: Mark Rutland
Mark.
> ---
>
On Fri, Feb 22, 2019 at 10:01:03AM +, Marc Zyngier wrote:
> On Thu, 21 Feb 2019 11:42:32 +
> Dave Martin wrote:
>
> > Due to what looks like a typo dating back to the original addition
> > of FPEXC32_EL2 handling, KVM currently initialises this register to
> > an architecturally invalid
On Thu, 21 Feb 2019 11:42:32 +
Dave Martin wrote:
> Due to what looks like a typo dating back to the original addition
> of FPEXC32_EL2 handling, KVM currently initialises this register to
> an architecturally invalid value.
>
> As a result, the VECITR field (RES1) in bits [10:8] is
On Fri, 22 Feb 2019 08:49:42 +
Julien Thierry wrote:
> Hi Shaokun,
>
> On 22/02/2019 06:34, Shaokun Zhang wrote:
> > The 'timer' local variable became unused after commit bee038a67487
> > ("KVM: arm/arm64: Rework the timer code to use a timer_map").
> > Remove it to avoid
On Fri, 22 Feb 2019 16:54:39 +0800
Leo Yan wrote:
> Hi Marc,
>
> On Fri, Feb 22, 2019 at 08:37:56AM +, Marc Zyngier wrote:
> > On Fri, 22 Feb 2019 16:23:24 +0800
> > Leo Yan wrote:
> >
> > > The function kvm_vgic_inject_irq() is not only used by PPIs but also can
> > > be used to inject
On Thu, 21 Feb 2019 11:02:56 +
Julien Grall wrote:
Hi Julien,
> Hi Christoffer,
>
> On 24/01/2019 14:00, Christoffer Dall wrote:
> > Note that to avoid mapping the kvm_vmid_bits variable into hyp, we
> > simply forego the masking of the vmid value in kvm_get_vttbr and rely on
> >
Hi Dave,
On 18/02/2019 19:52, Dave Martin wrote:
> To provide a uniform way to check for KVM SVE support amongst other
> features, this patch adds a suitable capability KVM_CAP_ARM_SVE,
> and reports it as present when SVE is available.
>
> Signed-off-by: Dave Martin
> ---
>
Hi Dave,
On 18/02/2019 19:52, Dave Martin wrote:
> Now that all the pieces are in place, this patch offers a new flag
> KVM_ARM_VCPU_SVE that userspace can pass to KVM_ARM_VCPU_INIT to
> turn on SVE for the guest, on a per-vcpu basis.
>
> As part of this, support for initialisation and reset of
Hi Shaokun,
On 22/02/2019 06:34, Shaokun Zhang wrote:
> The 'timer' local variable became unused after commit bee038a67487
> ("KVM: arm/arm64: Rework the timer code to use a timer_map").
> Remove it to avoid [-Wunused-but-set-variable] warning.
>
> Cc: Christoffer Dall
> Cc: Marc Zyngier
> Cc:
On Fri, 22 Feb 2019 16:23:24 +0800
Leo Yan wrote:
> The function kvm_vgic_inject_irq() is not only used by PPIs but also can
> be used to inject interrupt for SPIs; this patch improves comment for
> argument @cpuid to reflect support SPIs as well.
>
> Signed-off-by: Leo Yan
> ---
>
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