Oops, forgot to post this patch that goes before patch 1 in the series.
--8<--
Expose an interface for associating an FPSIMD context with a CPU and
checking the association, for use by KVM.
Signed-off-by: Dave Martin <dave.mar...@arm.com>
---
arch/arm64/include/asm/fpsimd.h | 5 ++
, provding that doesn't
happen the reload cost is at least saved on the next run loop
iteration.
Signed-off-by: Dave Martin <dave.mar...@arm.com>
---
Caveat: this does *not* currently deal properly with host SVE state,
though supporting that shouldn't be drastically different.
---
arch
To make the lazt FPSIMD context switch trap code easier to hack on,
this patch converts it to C.
This is not amazingly efficient, but the trap should typically only
be taken once per host context switch.
Signed-off-by: Dave Martin <dave.mar...@arm.com>
---
arch/arm64/kvm/hyp/entry.S
poke holes it...
Dave Martin (2):
KVM: arm64: Convert lazy FPSIMD context switch trap to C
KVM: arm64: Eliminate most redundant FPSIMD saves and restores
arch/arm64/include/asm/fpsimd.h | 1 +
arch/arm64/include/asm/kvm_host.h| 10 ++-
arch/arm64/include/asm/thread_info.h | 1 +
arch/arm
On Wed, Feb 14, 2018 at 06:38:11PM +0100, Christoffer Dall wrote:
> On Wed, Feb 14, 2018 at 02:43:42PM +0000, Dave Martin wrote:
> > [CC Ard, in case he has a view on how much we care about softirq NEON
> > performance regressions ... and whether my suggestions make sense]
> >
[CC Ard, in case he has a view on how much we care about softirq NEON
performance regressions ... and whether my suggestions make sense]
On Wed, Feb 14, 2018 at 11:15:54AM +0100, Christoffer Dall wrote:
> On Tue, Feb 13, 2018 at 02:08:47PM +0000, Dave Martin wrote:
> > On Tue, Feb 13, 2
On Tue, Feb 13, 2018 at 09:55:02AM +0100, Christoffer Dall wrote:
> On Fri, Feb 09, 2018 at 04:17:39PM +0000, Dave Martin wrote:
> > On Thu, Jan 25, 2018 at 08:54:13PM +0100, Christoffer Dall wrote:
> > > On Tue, Jan 23, 2018 at 04:04:40PM +, Dave Martin wrote:
[...]
>
On Tue, Feb 13, 2018 at 09:51:30AM +0100, Christoffer Dall wrote:
> On Fri, Feb 09, 2018 at 03:59:30PM +0000, Dave Martin wrote:
> > On Wed, Feb 07, 2018 at 06:56:44PM +0100, Christoffer Dall wrote:
> > > On Wed, Feb 07, 2018 at 04:49:55PM +, Dave Martin wrote:
[...]
&
On Thu, Jan 25, 2018 at 08:54:13PM +0100, Christoffer Dall wrote:
> On Tue, Jan 23, 2018 at 04:04:40PM +0000, Dave Martin wrote:
> > On Fri, Jan 12, 2018 at 01:07:32PM +0100, Christoffer Dall wrote:
> > > We are about to defer saving and restoring some groups of system
> >
On Wed, Feb 07, 2018 at 06:56:44PM +0100, Christoffer Dall wrote:
> On Wed, Feb 07, 2018 at 04:49:55PM +0000, Dave Martin wrote:
> > On Thu, Jan 25, 2018 at 08:46:53PM +0100, Christoffer Dall wrote:
> > > On Mon, Jan 22, 2018 at 05:33:28PM +, Dave Martin wrote:
> >
On Wed, Feb 07, 2018 at 05:17:50PM +0100, Christoffer Dall wrote:
> On Wed, Feb 07, 2018 at 03:34:03PM +0000, Dave Martin wrote:
> > On Wed, Feb 07, 2018 at 03:58:31PM +0100, Christoffer Dall wrote:
> > > On Wed, Feb 07, 2018 at 11:33:28AM +, Dave Martin wrote:
[...]
>
On Thu, Jan 25, 2018 at 08:46:53PM +0100, Christoffer Dall wrote:
> On Mon, Jan 22, 2018 at 05:33:28PM +0000, Dave Martin wrote:
> > On Fri, Jan 12, 2018 at 01:07:15PM +0100, Christoffer Dall wrote:
> > > Avoid saving the guest VFP registers and restoring the host VFP
> > &
On Wed, Feb 07, 2018 at 03:58:31PM +0100, Christoffer Dall wrote:
> On Wed, Feb 07, 2018 at 11:33:28AM +0000, Dave Martin wrote:
[...]
> > What if KVM_ARM_SVE_SET_VLS() were to yield 0 if the exact requested set
> > of VLs was configured, -ERANGE if some subset was configur
On Tue, Feb 06, 2018 at 02:17:57PM +0100, Christoffer Dall wrote:
> On Tue, Feb 06, 2018 at 11:43:16AM +0000, Dave Martin wrote:
> > On Mon, Feb 05, 2018 at 05:13:08PM +0100, Christoffer Dall wrote:
> > > Hi Dave,
> > >
> > > On Fri, Jan 26, 2018 at
On Mon, Feb 05, 2018 at 05:13:08PM +0100, Christoffer Dall wrote:
> Hi Dave,
>
> On Fri, Jan 26, 2018 at 05:28:49PM +0000, Dave Martin wrote:
> > New feature KVM_ARM_VCPU_SVE:
> >
> > * enables exposure of SVE to the guest
> >
> > * enables visibility
Hi all,
Reposting this to give people another chance to comment before I move
ahead...
---8<---
Here's a second, slightly more complete stab at the KVM API extensions
for SVE.
I haven't started implementing in earnest yet, so any comments at this
stage would be very helpful.
[libvir-list
On Fri, Jan 12, 2018 at 01:07:21PM +0100, Christoffer Dall wrote:
> VHE kernels run completely in EL2 and therefore don't have a notion of
> kernel and hyp addresses, they are all just kernel addresses. Therefore
> don't call kern_hyp_va() in the VHE switch function.
Isn't this an example of
On Fri, Jan 12, 2018 at 01:07:20PM +0100, Christoffer Dall wrote:
> So far this is just a copy of the legacy non-VHE switch function, but we
> will start reworking these functions in separate directions to work on
> VHE and non-VHE in the most optimal way in later patches.
I'd be concerned that
On Fri, Jan 12, 2018 at 01:07:15PM +0100, Christoffer Dall wrote:
> Avoid saving the guest VFP registers and restoring the host VFP
> registers on every exit from the VM. Only when we're about to run
> userspace or other threads in the kernel do we really have to switch the
> state back to the
On Tue, Jan 16, 2018 at 01:11:49PM +0300, Yury Norov wrote:
> On Mon, Jan 15, 2018 at 05:22:01PM +0000, Dave Martin wrote:
[...]
> > I'll take a look at your code anyway in case there's something
> > else one of us didn't think of.
>
> Thanks, Dave.
>
> This is the b
On Tue, Jan 09, 2018 at 07:51:20PM +0300, Yury Norov wrote:
> On Mon, Jan 08, 2018 at 05:49:05PM +0300, Yury Norov wrote:
> > On Tue, Oct 31, 2017 at 03:50:52PM +0000, Dave Martin wrote:
> > > This series implements Linux kernel support for the ARM Scalable Vector
> &g
On Mon, Jan 08, 2018 at 05:49:05PM +0300, Yury Norov wrote:
> On Tue, Oct 31, 2017 at 03:50:52PM +0000, Dave Martin wrote:
> > This series implements Linux kernel support for the ARM Scalable Vector
> > Extension (SVE). [1] It supersedes the previous v3: see [3] for link
> >
On Wed, Dec 13, 2017 at 04:58:16PM +, Peter Maydell wrote:
> On 13 December 2017 at 16:55, Dave Martin <dave.mar...@arm.com> wrote:
> > Vector length control:
> >
> > Some means is needed to determine the set of vector lengths visible
> > to guest softwar
Hi all,
Here's a second, slightly more complete stab at the KVM API extensions
for SVE.
I haven't started implementing in earnest yet, so any comments at this
stage would be very helpful.
[libvir-list readers: this is a proposal for extending the KVM API on
AArch64 systems to support the
On Mon, Dec 11, 2017 at 08:24:32PM +0100, Christoffer Dall wrote:
> On Mon, Dec 11, 2017 at 02:51:36PM +0000, Dave Martin wrote:
> > On Fri, Nov 24, 2017 at 03:45:38PM +0100, Christoffer Dall wrote:
[...]
> > > So you're saying even if we try the "expose full width and
On Tue, Dec 12, 2017 at 10:40:30AM +, Will Deacon wrote:
> On Mon, Dec 11, 2017 at 11:23:09AM -0800, Kees Cook wrote:
> > On Mon, Dec 11, 2017 at 6:07 AM, Will Deacon wrote:
> > > On Thu, Dec 07, 2017 at 10:50:38AM -0800, Kees Cook wrote:
> > >> My question is mainly: why
On Fri, Nov 24, 2017 at 03:45:38PM +0100, Christoffer Dall wrote:
> On Thu, Nov 23, 2017 at 06:40:50PM +0000, Dave Martin wrote:
> > On Wed, Nov 22, 2017 at 08:52:30PM +0100, Christoffer Dall wrote:
> > > Hi Dave,
> > >
> > > On Tue, Nov 21, 2017 at 01:49:16PM
On Thu, Dec 07, 2017 at 10:49:48AM +, Will Deacon wrote:
> Hi Kees,
>
> On Wed, Dec 06, 2017 at 11:56:50AM -0800, Kees Cook wrote:
> > On Tue, Oct 31, 2017 at 8:51 AM, Dave Martin <dave.mar...@arm.com> wrote:
> > > Miscellaneous:
> > >
> >
, although this patch is not a KVM fix per se, this
means that this check is now done safely in the KVM world switch
path (which is currently the only user of this code).
Signed-off-by: Dave Martin <dave.mar...@arm.com>
Cc: Ard Biesheuvel <ard.biesheu...@linaro.org>
Cc: Christoffer Dall &l
e task_struct freeing work
into the context switch critical section, or otherwise some
deferred cleanup mechanism would need to be introduced, neither of
which seems obviously justified.
Fixes: 005f78cd8849 ("arm64: defer reloading a task's FPSIMD state to userland
resume")
Signed-off-by: Dave M
://lists.infradead.org/pipermail/linux-arm-kernel/2017-December/545126.html
Dave Martin (3):
arm64: fpsimd: Prevent registers leaking from dead tasks
arm64: fpsimd: Abstract out binding of task's fpsimd context to the
cpu.
arm64/sve: Avoid dereference of dead task_struct in KVM guest entry
On Wed, Dec 06, 2017 at 11:53:00AM +0100, Christoffer Dall wrote:
> On Tue, Dec 05, 2017 at 12:31:51PM +0000, Dave Martin wrote:
> > On Tue, Dec 05, 2017 at 10:09:15AM +0100, Christoffer Dall wrote:
> > > On Fri, Dec 01, 2017 at 03:19:40PM +, Dave Martin wrote:
> > &
On Tue, Dec 05, 2017 at 10:43:50AM +0100, Christoffer Dall wrote:
> Hi Dave,
>
> On Mon, Dec 04, 2017 at 03:36:50PM +0000, Dave Martin wrote:
> > On Mon, Dec 04, 2017 at 01:53:21PM +, Ard Biesheuvel wrote:
> > > On 1 December 2017 at 15:19, Dave Martin <
On Tue, Dec 05, 2017 at 10:09:15AM +0100, Christoffer Dall wrote:
> On Fri, Dec 01, 2017 at 03:19:40PM +0000, Dave Martin wrote:
> > The HCR_EL2.TID3 flag needs to be set when trapping guest access to
> > the CPU ID registers is required. However, the decision about
> > wh
On Mon, Dec 04, 2017 at 01:53:21PM +, Ard Biesheuvel wrote:
> On 1 December 2017 at 15:19, Dave Martin <dave.mar...@arm.com> wrote:
> > When deciding whether to invalidate FPSIMD state cached in the cpu,
> > the backend function sve_flush_cpu_state() attempts to dereferenc
function fpsimd_bind_to_cpu().
Signed-off-by: Dave Martin <dave.mar...@arm.com>
Cc: Ard Biesheuvel <ard.biesheu...@linaro.org>
---
arch/arm64/kernel/fpsimd.c | 25 +++--
1 file changed, 15 insertions(+), 10 deletions(-)
diff --git a/arch/arm64/kernel/fpsimd.c b/arch/
.
This patch moves the decision to vcpu_reset_hcr() and records the
choice made in vcpu->arch.hcr_el2. The world switch code can then
load this directly when switching to the guest without the need for
conditional logic on the critical path.
Signed-off-by: Dave Martin <dave.mar...@arm.com>
This mini-series contains a few fixes for known issues in the arm64 SVE
patches that missed the merge window.
They should be considered fixes for v4.15.
Dave Martin (3):
arm64: KVM: Move CPU ID reg trap setup off the world switch path
arm64: fpsimd: Abstract out binding of task's fpsimd
On Wed, Nov 29, 2017 at 03:21:40PM +, Will Deacon wrote:
> On Wed, Nov 29, 2017 at 03:04:12PM +, Alex Bennée wrote:
> >
> > Dave Martin <dave.mar...@arm.com> writes:
> >
> > > This series implements Linux kernel support for the ARM Scala
On Wed, Nov 22, 2017 at 08:52:30PM +0100, Christoffer Dall wrote:
> Hi Dave,
>
> On Tue, Nov 21, 2017 at 01:49:16PM +0000, Dave Martin wrote:
> > Hi all,
> >
> > SVE adds some new registers, and their size depends on the hardware ando
> > on runtime sysreg
On Wed, Nov 22, 2017 at 08:23:44PM +0100, Christoffer Dall wrote:
> On Fri, Nov 17, 2017 at 04:38:54PM +0000, Dave Martin wrote:
> > Currently, SVE use can remain untrapped if a KVM vcpu thread is
> > preempted inside the kernel and we then switch back to some user
> > thread
On Wed, Nov 22, 2017 at 08:23:38PM +0100, Christoffer Dall wrote:
> Hi Dave,
>
> On Fri, Nov 17, 2017 at 04:38:53PM +0000, Dave Martin wrote:
> > When deciding whether to invalidate FPSIMD state cached in the cpu,
> > the backend function sve_flush_cpu_state() at
Hi all,
SVE adds some new registers, and their size depends on the hardware ando
on runtime sysreg settings.
Before coding something, I'd like to get people's views on my current
approach here.
--8<--
New vcpu feature flag:
/*
* userspace can support regs up to at least 2048 bits in size via
On Fri, Nov 17, 2017 at 04:38:51PM +, Dave Martin wrote:
> Throwing out an RFC here now that I've got something _sort of_ working.
>
> This is based on the base SVE patches as now present in
> torvalds/master [1], but not on Christoffer's SVE optimisations (for
(That should be: C
function fpsimd_bind_to_cpu().
Signed-off-by: Dave Martin <dave.mar...@arm.com>
---
arch/arm64/kernel/fpsimd.c | 25 +++--
1 file changed, 15 insertions(+), 10 deletions(-)
diff --git a/arch/arm64/kernel/fpsimd.c b/arch/arm64/kernel/fpsimd.c
index 143b3e7..007140b 100644
---
after boot via the ioctl interface:
this breaks architectural assumptions in the guest, and should
really be forbidden. Also, this is a latent trigger for
buffer overruns, if creation of guests with limited VL is
someday permitted.
Signed-off-by: Dave Martin <dave.mar...@arm.com>
---
arch
in fpsimd_last_state, which we can check without dereferencing
the task pointer.
Signed-off-by: Dave Martin <dave.mar...@arm.com>
---
arch/arm64/kernel/fpsimd.c | 28
1 file changed, 16 insertions(+), 12 deletions(-)
diff --git a/arch/arm64/kernel/fpsimd.c b/arch/arm64/kernel/fp
by a signal etc.
Signed-off-by: Dave Martin <dave.mar...@arm.com>
---
arch/arm64/kernel/fpsimd.c | 2 ++
virt/kvm/arm/arm.c | 6 +++---
2 files changed, 5 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/kernel/fpsimd.c b/arch/arm64/kernel/fpsimd.c
index 3dc8058..3b135eb
a bit
of a hack today -- more detailed notes in the commit message.
[1] c9b012e5f4a1 ("Merge tag 'arm64-upstream' of
git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux")
Dave Martin (4):
arm64: fpsimd: Abstract out binding of task's fpsimd context to the
cpu.
arm64/sve:
On Thu, Nov 09, 2017 at 05:16:40PM +, Alex Bennée wrote:
>
> Dave Martin <dave.mar...@arm.com> writes:
>
> > This patch adds the core support for switching and managing the SVE
> > architectural state of user tasks.
> >
> > Calls to the existing
On Tue, Nov 07, 2017 at 01:22:33PM +, Alex Bennée wrote:
>
> Dave Martin <dave.mar...@arm.com> writes:
>
> > This patch implements support for saving and restoring the SVE
> > registers around signals.
> >
> > A fixed-size header struct sve_context is
On Thu, Nov 02, 2017 at 09:15:57AM +0100, Christoffer Dall wrote:
> On Wed, Nov 01, 2017 at 10:26:03AM +0000, Dave Martin wrote:
> > On Wed, Nov 01, 2017 at 05:47:29AM +0100, Christoffer Dall wrote:
> > > On Tue, Oct 31, 2017 at 03:50:56PM +, Dave Martin wrote:
> >
On Thu, Nov 02, 2017 at 09:15:57AM +0100, Christoffer Dall wrote:
> On Wed, Nov 01, 2017 at 10:26:03AM +0000, Dave Martin wrote:
> > On Wed, Nov 01, 2017 at 05:47:29AM +0100, Christoffer Dall wrote:
> > > On Tue, Oct 31, 2017 at 03:50:56PM +, Dave Martin wrote:
> >
e regset is dynamically sized or not.
> >
> > The only affected user of this interface is the ELF coredump code:
> > This patch ports ELF coredump to dump regsets with their actual
> > size in the coredump. This has no effect except for new regsets
> > that are dynamically
On Wed, Nov 01, 2017 at 05:47:29AM +0100, Christoffer Dall wrote:
> On Tue, Oct 31, 2017 at 03:50:56PM +0000, Dave Martin wrote:
> > Currently, a guest kernel sees the true CPU feature registers
> > (ID_*_EL1) when it reads them using MRS instructions. This means
> > that
must be saved and restored too.
No attempt is made to restore the restore the vector length after
a call, for now. It is deemed rather insane for EFI to change it,
and contemporary EFI implementations certainly won't.
Signed-off-by: Dave Martin <dave.mar...@arm.com>
Reviewed-by: Alex
as
reading as zero, which is consistent with SVE not being
implemented.
This is a temporary measure, and will be removed in a later series
when full KVM support for SVE is implemented.
Signed-off-by: Dave Martin <dave.mar...@arm.com>
Reviewed-by: Alex Bennée <alex.ben...@linaro.org>
Ac
vector length: this
determines the maximum size of SVE context block that can be
observed in any signal frame for the lifetime of the process.
Signed-off-by: Dave Martin <dave.mar...@arm.com>
Cc: Ard Biesheuvel <ard.biesheu...@linaro.org>
Cc: Alex Bennée <alex.ben...@linaro.org&g
This patch adds basic documentation of the user/kernel interface
provided by the for SVE.
Signed-off-by: Dave Martin <dave.mar...@arm.com>
Reviewed-by: Catalin Marinas <catalin.mari...@arm.com>
Cc: Alan Hayward <alan.hayw...@arm.com>
Cc: Alex Bennée <alex.ben...@linaro.
s internal SIGFRAME_MAXSZ is supposed to sanity-check
against generting frames that we consider _impossibly_ large. In
this case, SIGSTKSZ is returned as a "reasonable guess that is at
least bigger than MINSIGSTKSZ" and we WARN().
Signed-off-by: Dave Martin <dave.mar...@arm.com>
-
running on hardware that supports SVE, this enables runtime
kernel support for SVE, and allows user tasks to execute SVE
instructions and make of the of the SVE-specific user/kernel
interface extensions implemented by this series.
Signed-off-by: Dave Martin <dave.mar...@arm.com>
Reviewed-by:
the vector length of any existing
process.
The intended usage model is that if userspace is known to be fully
SVE-tolerant (or a developer is curious to find out) then this
parameter can be cranked up during system startup.
Signed-off-by: Dave Martin <dave.mar...@arm.com>
Reviewed-by: Alex
, since cpu_pm_enter() is supposed to be called only
with interrupts disabled.
Signed-off-by: Dave Martin <dave.mar...@arm.com>
Reviewed-by: Alex Bennée <alex.ben...@linaro.org>
Reviewed-by: Christoffer Dall <christoffer.d...@linaro.org>
Acked-by: Catalin Marinas <catalin.mari...@ar
() remains hardwired to false.
Signed-off-by: Dave Martin <dave.mar...@arm.com>
Reviewed-by: Suzuki K Poulose <suzuki.poul...@arm.com>
Reviewed-by: Catalin Marinas <catalin.mari...@arm.com>
Cc: Alex Bennée <alex.ben...@linaro.org>
---
**Dropped at v3** Reviewed-b
When trapping forbidden attempts by a guest to use SVE, we want the
guest to see a trap consistent with SVE not being implemented.
This patch injects an undefined instruction exception into the
guest in response to such an exception.
Signed-off-by: Dave Martin <dave.mar...@arm.com>
Re
, which the recipient can use to
figure out the content, size and layout of the reset of the regset.
Accessor macros are defined to allow the vector-length-dependent
parts of the regset to be manipulated.
Signed-off-by: Alan Hayward <alan.hayw...@arm.com>
Signed-off-by: Dave Martin <dave.mar..
instructions.
Signed-off-by: Dave Martin <dave.mar...@arm.com>
Reviewed-by: Catalin Marinas <catalin.mari...@arm.com>
Cc: Alex Bennée <alex.ben...@linaro.org>
---
**Dropped at v3** Reviewed-by: Alex Bennée <alex.ben...@linaro.org>
See v3 posting for history.
---
arch/arm64/incl
booting a
CPU, so that it can be updated appropriately.
This patch simply moves the sys_caps_initialised stuff to the top
of the file so that it can be used more widely. There doesn't seem
to be a more obvious place to put it.
Signed-off-by: Dave Martin <dave.mar...@arm.com>
Reviewed-by: Alex
fpsimd_signal_preserve_current_state() is added to update _both_
the FPSIMD and SVE views in the task struct, to make it easier to
populate this information into the signal frame. Because of the
redundancy between the two views of the state, only one is updated
otherwise.
Signed-off-by: Dave Martin <dave.mar...@arm.com&
that are not a power of two. To handle
this, logic is added to check a requested vector length against a
possibly sparse bitmap of available vector lengths at runtime, so
that the best supported value can be chosen.
Signed-off-by: Dave Martin <dave.mar...@arm.com>
Reviewed-by: Catalin Marinas <cat
. This
should have no impact on behaviour.
Signed-off-by: Dave Martin <dave.mar...@arm.com>
Reviewed-by: Alex Bennée <alex.ben...@linaro.org>
Reviewed-by: Catalin Marinas <catalin.mari...@arm.com>
Acked-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
---
arch/arm64/kerne
TIF_SVE_VL_INHERIT to control whether to inherit or reset the
vector length. Currently these are inactive. Subsequent patches
will provide the capability to configure them.
Signed-off-by: Dave Martin <dave.mar...@arm.com>
Reviewed-by: Alex Bennée <alex.ben...@linaro.org>
Reviewed-by: Cat
the vector length.
Setting of the vector length is done as part of register restore.
Since people building kernels may not all get an SVE-enabled
toolchain for a while, this patch uses macros that generate
explicit opcodes in place of assembler mnemonics.
Signed-off-by: Dave Martin <dave.mar...@arm.
The SVE architecture adds some system registers, ID register fields
and a dedicated ESR exception class.
This patch adds the appropriate definitions that will be needed by
the kernel.
Signed-off-by: Dave Martin <dave.mar...@arm.com>
Reviewed-by: Alex Bennée <alex.ben...@linaro.org&
.
Signed-off-by: Dave Martin <dave.mar...@arm.com>
Reviewed-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
Reviewed-by: Alex Bennée <alex.ben...@linaro.org>
Reviewed-by: Catalin Marinas <catalin.mari...@arm.com>
---
arch/arm64/kernel/fpsimd.c | 6 --
1 file changed, 4 in
length, it is not possible
to define a fixed C struct to describe all the registers. Instead,
Macros are defined in sigcontext.h to facilitate access to the
parts of the structure.
Signed-off-by: Dave Martin <dave.mar...@arm.com>
Reviewed-by: Catalin Marinas <catalin.mari...@arm.com>
Cc:
* fork and clone
Code is added to sync data between thread.fpsimd_state and
thread.sve_state whenever enabling/disabling SVE, in a manner
consistent with the SVE architectural programmer's model.
Signed-off-by: Dave Martin <dave.mar...@arm.com>
Reviewed-by: Catalin Marinas <catalin.mari...@ar
in a later patch, once
SVE support is complete enough to be enabled safely.
Signed-off-by: Dave Martin <dave.mar...@arm.com>
Reviewed-by: Alex Bennée <alex.ben...@linaro.org>
Reviewed-by: Catalin Marinas <catalin.mari...@arm.com>
---
arch/arm64/Kconfig | 11 +
the limit set by ZCR_EL2.)
This patch makes the appropriate changes to the EL2 early setup
code.
Signed-off-by: Dave Martin <dave.mar...@arm.com>
Reviewed-by: Catalin Marinas <catalin.mari...@arm.com>
Cc: Alex Bennée <alex.ben...@linaro.org>
---
**Dropped at v3** Reviewed-by: Ale
dependency.
This will aid bisection of the patches implementing support for the
ARM Scalable Vector Extension (SVE).
Signed-off-by: Dave Martin <dave.mar...@arm.com>
Reviewed-by: Alex Bennée <alex.ben...@linaro.org>
Acked-by: Catalin Marinas <catalin.mari...@arm.com>
Cc: Ard Biesh
rectories explicitly, which
is ideal here.
This patch ports register_insn_emulation_sysctl() over to the
register_sysctl() interface and removes the redundant ctl_table for
"abi".
Signed-off-by: Dave Martin <dave.mar...@arm.com>
Reviewed-by: Alex Bennée <alex.ben...@l
the potential for future surprises, this patch does an
explicit access_ok() check on the extra data space when parsing an
extra_context record.
Fixes: 33f082614c34 ("arm64: signal: Allow expansion of the signal frame")
Signed-off-by: Dave Martin <dave.mar...@arm.com>
---
a
for AArch32: however,
these could be handled in a similar way in future, as necessary.
Signed-off-by: Dave Martin <dave.mar...@arm.com>
Reviewed-by: Marc Zyngier <marc.zyng...@arm.com>
Acked-by: Catalin Marinas <catalin.mari...@arm.com>
Cc: Christoffer Dall <christoffer.d...@linaro
a get_size() implementation.
Signed-off-by: Dave Martin <dave.mar...@arm.com>
Reviewed-by: Alex Bennée <alex.ben...@linaro.org>
Reviewed-by: Catalin Marinas <catalin.mari...@arm.com>
Cc: Oleg Nesterov <o...@redhat.com>
Cc: Alexander Viro <v...@zeniv.linux.org.uk>
Cc: Thoma
asmlinkage annotations for
do_fpsimd_acc() and do_fpsimd_exc().
Signed-off-by: Dave Martin <dave.mar...@arm.com>
---
arch/arm64/kernel/fpsimd.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/kernel/fpsimd.c b/arch/arm64/kernel/fpsimd.c
index 5d547de..e85
git://linux-arm.org/linux-dm.git sve/v4+fixes
Dave Martin (30):
regset: Add support for dynamically sized regsets
arm64: fpsimd: Correctly annotate exception helpers called from asm
arm64: signal: Verify extra data is user-readable in sys_rt_sigreturn
arm64: KVM: Hide unsupported AA
On Mon, Oct 30, 2017 at 04:12:13PM +, Alex Bennée wrote:
>
> Dave Martin <dave.mar...@arm.com> writes:
>
> > On Fri, Oct 27, 2017 at 06:52:50PM +0100, Alex Bennée wrote:
> >>
> >> Dave Martin <dave.mar...@arm.com> writes:
> >>
>
On Fri, Oct 27, 2017 at 06:52:50PM +0100, Alex Bennée wrote:
>
> Dave Martin <dave.mar...@arm.com> writes:
>
> > This patch adds two arm64-specific prctls, to permit userspace to
> > control its vector length:
> >
> > * PR_SVE_SET_VL: set the thread's SVE
vector length: this
determines the maximum size of SVE context block that can be
observed in any signal frame for the lifetime of the process.
Signed-off-by: Dave Martin <dave.mar...@arm.com>
Cc: Ard Biesheuvel <ard.biesheu...@linaro.org>
Cc: Alex Bennée <alex.ben...@linaro.org&g
booting a
CPU, so that it can be updated appropriately.
This patch simply moves the sys_caps_initialised stuff to the top
of the file so that it can be used more widely. There doesn't seem
to be a more obvious place to put it.
Signed-off-by: Dave Martin <dave.mar...@arm.com>
Reviewed-by: Alex
the limit set by ZCR_EL2.)
This patch makes the appropriate changes to the EL2 early setup
code.
Signed-off-by: Dave Martin <dave.mar...@arm.com>
Reviewed-by: Catalin Marinas <catalin.mari...@arm.com>
Cc: Alex Bennée <alex.ben...@linaro.org>
---
**Dropped at v3** Reviewed-by: Ale
the vector length of any existing
process.
The intended usage model is that if userspace is known to be fully
SVE-tolerant (or a developer is curious to find out) then this
parameter can be cranked up during system startup.
Signed-off-by: Dave Martin <dave.mar...@arm.com>
Reviewed-by: Alex
running on hardware that supports SVE, this enables runtime
kernel support for SVE, and allows user tasks to execute SVE
instructions and make of the of the SVE-specific user/kernel
interface extensions implemented by this series.
Signed-off-by: Dave Martin <dave.mar...@arm.com>
Reviewed-by:
This patch adds basic documentation of the user/kernel interface
provided by the for SVE.
Signed-off-by: Dave Martin <dave.mar...@arm.com>
Cc: Alan Hayward <alan.hayw...@arm.com>
Cc: Alex Bennée <alex.ben...@linaro.org>
Cc: Mark Rutland <mark.rutl...@arm.com>
Cc: Mi
When trapping forbidden attempts by a guest to use SVE, we want the
guest to see a trap consistent with SVE not being implemented.
This patch injects an undefined instruction exception into the
guest in response to such an exception.
Signed-off-by: Dave Martin <dave.mar...@arm.com>
Re
, since cpu_pm_enter() is supposed to be called only
with interrupts disabled.
Signed-off-by: Dave Martin <dave.mar...@arm.com>
Reviewed-by: Alex Bennée <alex.ben...@linaro.org>
Reviewed-by: Christoffer Dall <christoffer.d...@linaro.org>
Acked-by: Catalin Marinas <catalin.mari...@ar
instructions.
Signed-off-by: Dave Martin <dave.mar...@arm.com>
Reviewed-by: Catalin Marinas <catalin.mari...@arm.com>
Cc: Alex Bennée <alex.ben...@linaro.org>
---
**Dropped at v3** Reviewed-by: Alex Bennée <alex.ben...@linaro.org>
due to non-trivial changes/fixes aft
s internal SIGFRAME_MAXSZ is supposed to sanity-check
against generting frames that we consider _impossibly_ large. In
this case, SIGSTKSZ is returned as a "reasonable guess that is at
least bigger than MINSIGSTKSZ" and we WARN().
Signed-off-by: Dave Martin <dave.mar...@arm.com>
-
TIF_SVE_VL_INHERIT to control whether to inherit or reset the
vector length. Currently these are inactive. Subsequent patches
will provide the capability to configure them.
Signed-off-by: Dave Martin <dave.mar...@arm.com>
Reviewed-by: Alex Bennée <alex.ben...@linaro.org>
Reviewed-by: Cat
. This
should have no impact on behaviour.
Signed-off-by: Dave Martin <dave.mar...@arm.com>
Reviewed-by: Alex Bennée <alex.ben...@linaro.org>
Reviewed-by: Catalin Marinas <catalin.mari...@arm.com>
Acked-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
---
arch/arm64/kerne
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