Re: [RESEND PATCH] KVM: arm: VGIC: properly initialise private IRQ affinity

2019-08-22 Thread Marc Zyngier
On 22/08/2019 14:42, Andre Przywara wrote: > On Thu, 22 Aug 2019 01:13:32 +0800 > Zenghui Yu wrote: > > Hi, > >> On 2019/8/22 1:00, Andre Przywara wrote: >>> At the moment we initialise the target *mask* of a virtual IRQ to the >>> VCPU it belongs to, even though this mask is only defined for GI

Re: [RESEND PATCH] KVM: arm: VGIC: properly initialise private IRQ affinity

2019-08-22 Thread Andre Przywara
On Thu, 22 Aug 2019 01:13:32 +0800 Zenghui Yu wrote: Hi, > On 2019/8/22 1:00, Andre Przywara wrote: > > At the moment we initialise the target *mask* of a virtual IRQ to the > > VCPU it belongs to, even though this mask is only defined for GICv2 and > > quickly runs out of bits for many GICv3 gu

Re: [RESEND PATCH] KVM: arm: VGIC: properly initialise private IRQ affinity

2019-08-21 Thread Zenghui Yu
On 2019/8/22 1:00, Andre Przywara wrote: At the moment we initialise the target *mask* of a virtual IRQ to the VCPU it belongs to, even though this mask is only defined for GICv2 and quickly runs out of bits for many GICv3 guests. This behaviour triggers an UBSAN complaint for more than 32 VCP

Re: [RESEND PATCH] KVM: arm: VGIC: properly initialise private IRQ affinity

2019-08-21 Thread Marc Zyngier
On 21/08/2019 18:01, Julien Grall wrote: > Hi Andre, > > On 21/08/2019 18:00, Andre Przywara wrote: >> At the moment we initialise the target *mask* of a virtual IRQ to the >> VCPU it belongs to, even though this mask is only defined for GICv2 and >> quickly runs out of bits for many GICv3 guests.

Re: [RESEND PATCH] KVM: arm: VGIC: properly initialise private IRQ affinity

2019-08-21 Thread Julien Grall
Hi Andre, On 21/08/2019 18:00, Andre Przywara wrote: At the moment we initialise the target *mask* of a virtual IRQ to the VCPU it belongs to, even though this mask is only defined for GICv2 and quickly runs out of bits for many GICv3 guests. This behaviour triggers an UBSAN complaint for more t

[RESEND PATCH] KVM: arm: VGIC: properly initialise private IRQ affinity

2019-08-21 Thread Andre Przywara
At the moment we initialise the target *mask* of a virtual IRQ to the VCPU it belongs to, even though this mask is only defined for GICv2 and quickly runs out of bits for many GICv3 guests. This behaviour triggers an UBSAN complaint for more than 32 VCPUs: -- [ 5659.462377] UBSAN: Undefined beh

Re: [PATCH] KVM: arm: VGIC: properly initialise private IRQ affinity

2019-03-07 Thread Christophe de Dinechin
> On 6 Mar 2019, at 11:40, Andre Przywara wrote: > > At the moment we initialise the target *mask* of a virtual IRQ to the > VCPU it belongs to, even though this mask is only defined for GICv2 and > quickly runs out of bits for many GICv3 guests. Just for my education, “targets” seems defined

Re: [PATCH] KVM: arm: VGIC: properly initialise private IRQ affinity

2019-03-06 Thread Andre Przywara
On Wed, 6 Mar 2019 12:42:21 +0100 Christophe de Dinechin wrote: > > On 6 Mar 2019, at 11:40, Andre Przywara wrote: > > > > At the moment we initialise the target *mask* of a virtual IRQ to the > > VCPU it belongs to, even though this mask is only defined for GICv2 and > > quickly runs out of bi

Re: [PATCH] KVM: arm: VGIC: properly initialise private IRQ affinity

2019-03-06 Thread Marc Zyngier
On 06/03/2019 11:42, Christophe de Dinechin wrote: > > >> On 6 Mar 2019, at 11:40, Andre Przywara wrote: >> >> At the moment we initialise the target *mask* of a virtual IRQ to the >> VCPU it belongs to, even though this mask is only defined for GICv2 and >> quickly runs out of bits for many GIC

[PATCH] KVM: arm: VGIC: properly initialise private IRQ affinity

2019-03-06 Thread Andre Przywara
At the moment we initialise the target *mask* of a virtual IRQ to the VCPU it belongs to, even though this mask is only defined for GICv2 and quickly runs out of bits for many GICv3 guests. This behaviour triggers an UBSAN complaint for more than 32 VCPUs: -- [ 5659.462377] UBSAN: Undefined beh