Re: [PATCH v2 2/5] arm64: Work around Falkor erratum 1003

2017-01-11 Thread Christopher Covington
Hi Christoffer, On 01/04/2017 05:33 AM, Christoffer Dall wrote: > On Thu, Dec 29, 2016 at 05:43:32PM -0500, Christopher Covington wrote: >> From: Shanker Donthineni >> >> On the Qualcomm Datacenter Technologies Falkor v1 CPU, memory accesses may >> allocate TLB entries

Re: [PATCH v2 2/5] arm64: Work around Falkor erratum 1003

2017-01-06 Thread Timur Tabi
Christopher Covington wrote: > Also, since this can't be changed via the menu, why bother putting it in? I put it in in response to review comments asking for the magic number to be clarified by a #define or variable. I could not find a suitably shared header between the files in question, so I

Re: [PATCH v2 2/5] arm64: Work around Falkor erratum 1003

2017-01-06 Thread Timur Tabi
Christopher Covington wrote: > Looks like you've made an unrelated whitespace change that affected the entire table, > not just the line you're adding. I'm making space for "QCOM_FALKOR_ERRATUM_1003". Ok, but you're also shrinking the other columns. I think a better solution is to make the

Re: [PATCH v2 2/5] arm64: Work around Falkor erratum 1003

2017-01-06 Thread Christopher Covington
On 01/03/2017 10:55 AM, Mark Rutland wrote: > Hi, > > On Thu, Dec 29, 2016 at 05:43:32PM -0500, Christopher Covington wrote: >> +config QCOM_FALKOR_E1003_RESERVED_ASID >> +int >> +default 1 >> +depends on QCOM_FALKOR_ERRATUM_1003 >> + > > I don't think this needs to be configurable,

Re: [PATCH v2 2/5] arm64: Work around Falkor erratum 1003

2017-01-06 Thread Christopher Covington
On 12/29/2016 06:08 PM, Timur Tabi wrote: > On 12/29/2016 04:43 PM, Christopher Covington wrote: >> +config QCOM_FALKOR_E1003_RESERVED_ASID >> +int >> +default 1 >> +depends on QCOM_FALKOR_ERRATUM_1003 > > Also, since this can't be changed via the menu, why bother putting it in? I

Re: [PATCH v2 2/5] arm64: Work around Falkor erratum 1003

2017-01-06 Thread Christopher Covington
On 12/29/2016 06:02 PM, Timur Tabi wrote: > On 12/29/2016 04:43 PM, Christopher Covington wrote: >> -| Implementor| Component | Erratum ID | Kconfig >>| >> -++-+-+-+ >> -| ARM|

Re: [PATCH v2 2/5] arm64: Work around Falkor erratum 1003

2017-01-04 Thread Christoffer Dall
On Thu, Dec 29, 2016 at 05:43:32PM -0500, Christopher Covington wrote: > From: Shanker Donthineni > > On the Qualcomm Datacenter Technologies Falkor v1 CPU, memory accesses may > allocate TLB entries using an incorrect ASID when TTBRx_EL1 is being > updated. Changing the

Re: [PATCH v2 2/5] arm64: Work around Falkor erratum 1003

2017-01-03 Thread Mark Rutland
Hi, On Thu, Dec 29, 2016 at 05:43:32PM -0500, Christopher Covington wrote: > +config QCOM_FALKOR_E1003_RESERVED_ASID > + int > + default 1 > + depends on QCOM_FALKOR_ERRATUM_1003 > + I don't think this needs to be configurable, so let's drop this into a header, e.g. drop: #define

Re: [PATCH v2 2/5] arm64: Work around Falkor erratum 1003

2016-12-29 Thread kbuild test robot
Hi Shanker, [auto build test ERROR on next-20161224] [also build test ERROR on v4.10-rc1] [cannot apply to arm64/for-next/core v4.9-rc8 v4.9-rc7 v4.9-rc6] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system] url:

Re: [PATCH v2 2/5] arm64: Work around Falkor erratum 1003

2016-12-29 Thread Timur Tabi
On 12/29/2016 04:43 PM, Christopher Covington wrote: +config QCOM_FALKOR_E1003_RESERVED_ASID + int + default 1 + depends on QCOM_FALKOR_ERRATUM_1003 Also, since this can't be changed via the menu, why bother putting it in? -- Qualcomm Datacenter Technologies, Inc. as an

Re: [PATCH v2 2/5] arm64: Work around Falkor erratum 1003

2016-12-29 Thread Timur Tabi
On 12/29/2016 04:43 PM, Christopher Covington wrote: -| Implementor| Component | Erratum ID | Kconfig | -++-+-+-+ -| ARM| Cortex-A53 | #826319 | ARM64_ERRATUM_826319

[PATCH v2 2/5] arm64: Work around Falkor erratum 1003

2016-12-29 Thread Christopher Covington
From: Shanker Donthineni On the Qualcomm Datacenter Technologies Falkor v1 CPU, memory accesses may allocate TLB entries using an incorrect ASID when TTBRx_EL1 is being updated. Changing the TTBRx_EL1[ASID] and TTBRx_EL1[BADDR] fields separately using a reserved ASID