Hi Marc,
> > > +#define PERF_ATTR_CFG1_COUNTER_64BIT BIT(0)
> >
> > Although this isn't the new code (but just a name change),
> > wouldn't it be nicer to have armv8pmu_event_is_64bit()
> > (in arch/arm64/kernel/perf_event.c) use the macro as well ?
>
> We tried that in the past, and the amount
Hi Reiji,
On Sat, 12 Nov 2022 07:55:38 +,
Reiji Watanabe wrote:
>
> Hi Marc,
>
> On Mon, Nov 7, 2022 at 12:54 AM Marc Zyngier wrote:
> >
> > Ricardo recently pointed out that the PMU chained counter emulation
> > in KVM wasn't quite behaving like the one on actual hardware, in
> > the
Hi Marc,
On Mon, Nov 7, 2022 at 12:54 AM Marc Zyngier wrote:
>
> Ricardo recently pointed out that the PMU chained counter emulation
> in KVM wasn't quite behaving like the one on actual hardware, in
> the sense that a chained counter would expose an overflow on
> both halves of a chained
Ricardo recently pointed out that the PMU chained counter emulation
in KVM wasn't quite behaving like the one on actual hardware, in
the sense that a chained counter would expose an overflow on
both halves of a chained counter, while KVM would only expose the
overflow on the top half.
The
