On 14 May 2015 at 16:41, Michael S. Tsirkin m...@redhat.com wrote:
On Thu, May 14, 2015 at 04:19:23PM +0200, Laszlo Ersek wrote:
On 05/14/15 15:48, Michael S. Tsirkin wrote:
On Thu, May 14, 2015 at 03:32:10PM +0200, Laszlo Ersek wrote:
On 05/14/15 15:00, Andrew Jones wrote:
On Thu, May 14,
On Thu, May 14, 2015 at 03:36:37PM +0200, Andrew Jones wrote:
On Thu, May 14, 2015 at 02:11:59PM +0100, Peter Maydell wrote:
On 14 May 2015 at 14:03, Andrew Jones drjo...@redhat.com wrote:
On Thu, May 14, 2015 at 11:37:46AM +0100, Peter Maydell wrote:
On 14 May 2015 at 11:31, Andrew Jones
On 05/14/15 15:00, Andrew Jones wrote:
On Thu, May 14, 2015 at 01:38:11PM +0100, Peter Maydell wrote:
On 14 May 2015 at 13:28, Paolo Bonzini pbonz...@redhat.com wrote:
Well, PCI BARs are generally MMIO resources, and hence should not be cached.
As an optimization, OS drivers can mark them as
On Thu, May 14, 2015 at 01:38:11PM +0100, Peter Maydell wrote:
On 14 May 2015 at 13:28, Paolo Bonzini pbonz...@redhat.com wrote:
Well, PCI BARs are generally MMIO resources, and hence should not be cached.
As an optimization, OS drivers can mark them as cacheable or
write-combining or
On Thu, May 14, 2015 at 03:32:10PM +0200, Laszlo Ersek wrote:
On 05/14/15 15:00, Andrew Jones wrote:
On Thu, May 14, 2015 at 01:38:11PM +0100, Peter Maydell wrote:
On 14 May 2015 at 13:28, Paolo Bonzini pbonz...@redhat.com wrote:
Well, PCI BARs are generally MMIO resources, and hence should
