Re: [PATCH v9 10/17] KVM: arm64: introduce new KVM ITS device

Hi, On 14/07/16 09:36, Marc Zyngier wrote: > On 13/07/16 02:59, Andre Przywara wrote: >> diff --git a/virt/kvm/arm/vgic/vgic-its.c b/virt/kvm/arm/vgic/vgic-its.c >> index 06ad94d..393ad3a 100644 >> --- a/virt/kvm/arm/vgic/vgic-its.c >> +++ b/virt/kvm/arm/vgic/vgic-its.c ... >> +static

[patch] arm64: KVM: clean up a condition

My static checker complains that this condition looks like it should be == instead of =. This isn't a fast path, so we don't need to be fancy. Signed-off-by: Dan Carpenter diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c index a57d650..b0b225c 100644

[PATCH V3 4/5] kvm/stats: Add provisioning for 64-bit vm and vcpu statistics

vms and vcpus have statistics associated with them which can be viewed within the debugfs. Currently it is assumed within the vcpu_stat_get() and vm_stat_get() functions that all of these statistics are represented as u32s, however the next patch adds some u64 statistics. Thus modify these two

Re: [PATCH V3 4/5] kvm/stats: Add provisioning for 64-bit vm and vcpu statistics

On 13/07/16 19:04, Christian Borntraeger wrote: > On 07/13/2016 10:53 AM, Suraj Jitindar Singh wrote: >> vms and vcpus have statistics associated with them which can be viewed >> within the debugfs. Currently it is assumed within the vcpu_stat_get() and >> vm_stat_get() functions that all of

[PATCH v10 02/17] KVM: arm/arm64: check return value for kvm_register_vgic_device

kvm_register_device_ops() can return an error, so lets check its return value and propagate this up the call chain. Signed-off-by: Andre Przywara --- virt/kvm/arm/vgic/vgic-kvm-device.c | 15 +-- virt/kvm/arm/vgic/vgic-v2.c | 11 ---

[PATCH v10 12/17] KVM: arm64: connect LPIs to the VGIC emulation

LPIs are dynamically created (mapped) at guest runtime and their actual number can be quite high, but is mostly assigned using a very sparse allocation scheme. So arrays are not an ideal data structure to hold the information. We use a spin-lock protected linked list to hold all mapped LPIs,

[PATCH v10 08/17] KVM: arm64: handle ITS related GICv3 redistributor registers

In the GICv3 redistributor there are the PENDBASER and PROPBASER registers which we did not emulate so far, as they only make sense when having an ITS. In preparation for that emulate those MMIO accesses by storing the 64-bit data written into it into a variable which we later read in the ITS

[PATCH v10 13/17] KVM: arm64: read initial LPI pending table

The LPI pending status for a GICv3 redistributor is held in a table in (guest) memory. To achieve reasonable performance, we cache the pending bit in our struct vgic_irq. The initial pending state must be read from guest memory upon enabling LPIs for this redistributor. As we can't access the

[PATCH v10 16/17] KVM: arm64: implement MSI injection in ITS emulation

When userland wants to inject an MSI into the guest, it uses the KVM_SIGNAL_MSI ioctl, which carries the doorbell address along with the payload and the device ID. With the help of the KVM IO bus framework we learn the corresponding ITS from the doorbell address. We then use our wrapper functions

[PATCH v10 09/17] KVM: arm64: introduce ITS emulation file with MMIO framework

The ARM GICv3 ITS emulation code goes into a separate file, but needs to be connected to the GICv3 emulation, of which it is an option. The ITS MMIO handlers require the respective ITS pointer to be passed in, so we amend the existing VGIC MMIO framework to let it cope with that. Also we introduce

[PATCH v10 07/17] irqchip: refactor and add GICv3 definitions

arm-gic-v3.h contains bit and register definitions for the GICv3 and ITS, at least for the bits the we currently care about. The ITS emulation needs more definitions, so add them and refactor the memory attribute #defines to be more universally usable. To avoid changing all users, we still provide

[PATCH v10 05/17] KVM: kvm_io_bus: add kvm_io_bus_get_dev() call

The kvm_io_bus framework is a nice place of holding information about various MMIO regions for kernel emulated devices. Add a call to retrieve the kvm_io_device structure which is associated with a certain MMIO address. This avoids to duplicate kvm_io_bus' knowledge of MMIO regions without having

[PATCH v10 03/17] KVM: extend struct kvm_msi to hold a 32-bit device ID

The ARM GICv3 ITS MSI controller requires a device ID to be able to assign the proper interrupt vector. On real hardware, this ID is sampled from the bus. To be able to emulate an ITS controller, extend the KVM MSI interface to let userspace provide such a device ID. For PCI devices, the device ID

[PATCH v10 10/17] KVM: arm64: introduce new KVM ITS device

Introduce a new KVM device that represents an ARM Interrupt Translation Service (ITS) controller. Since there can be multiple of this per guest, we can't piggy back on the existing GICv3 distributor device, but create a new type of KVM device. On the KVM_CREATE_DEVICE ioctl we allocate and

[PATCH v10 06/17] KVM: arm/arm64: VGIC: add refcounting for IRQs

In the moment our struct vgic_irq's are statically allocated at guest creation time. So getting a pointer to an IRQ structure is trivial and safe. LPIs are more dynamic, they can be mapped and unmapped at any time during the guest's _runtime_. In preparation for supporting LPIs we introduce

[PATCH v10 15/17] KVM: arm64: implement ITS command queue command handlers

The connection between a device, an event ID, the LPI number and the associated CPU is stored in in-memory tables in a GICv3, but their format is not specified by the spec. Instead software uses a command queue in a ring buffer to let an ITS implementation use its own format. Implement handlers

[PATCH v10 14/17] KVM: arm64: allow updates of LPI configuration table

The (system-wide) LPI configuration table is held in a table in (guest) memory. To achieve reasonable performance, we cache this data in our struct vgic_irq. If the guest updates the configuration data (which consists of the enable bit and the priority value), it issues an INV or INVALL command to

[PATCH v10 00/17] KVM: arm64: GICv3 ITS emulation

Hi, this series allows those KVM guests that use an emulated GICv3 to use LPIs as well, though in the moment this is limited to emulated PCI devices. This is based on kvmarm/queue, which now only features the new VGIC implementation. Another round of fixes: An optimization from Marc to only

[PATCH v10 04/17] KVM: arm/arm64: extend arch CAP checks to allow per-VM capabilities

KVM capabilities can be a per-VM property, though ARM/ARM64 currently does not pass on the VM pointer to the architecture specific capability handlers. Add a "struct kvm*" parameter to those function to later allow proper per-VM capability reporting. Signed-off-by: Andre Przywara

[PATCH v10 11/17] KVM: arm64: implement basic ITS register handlers

Add emulation for some basic MMIO registers used in the ITS emulation. This includes: - GITS_{CTLR,TYPER,IIDR} - ID registers - GITS_{CBASER,CREADR,CWRITER} (which implement the ITS command buffer handling) - GITS_BASER Most of the handlers are pretty straight forward, only the CWRITER handler

[PATCH v10 01/17] KVM: arm/arm64: move redistributor kvm_io_devices

Logically a GICv3 redistributor is assigned to a (v)CPU, so we should aim to keep redistributor related variables out of our struct vgic_dist. Let's start by replacing the redistributor related kvm_io_device array with two members in our existing struct vgic_cpu, which are naturally per-VCPU and

[kvm-unit-tests PATCH v3 00/10] arm/arm64: add gic framework

v3: - Rebased on latest master - Added Alex's r-b's v2: Rebased on latest master + my "populate argv[0]" series (will send a REPOST for that shortly. Additionally a few patches got fixes/features; 07/10 got same fix as kernel 7c9b973061 "irqchip/gic-v3: Configure all interrupts as

[kvm-unit-tests PATCH v3 01/10] lib: xstr: allow multiple args

Make implementation equivalent to Linux's include/linux/stringify.h Signed-off-by: Andrew Jones --- lib/libcflat.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/lib/libcflat.h b/lib/libcflat.h index 72b1bf9668ef1..82005f5d014fb 100644 ---

[kvm-unit-tests PATCH v3 02/10] arm64: fix get_"sysreg32" and make MPIDR 64bit

mrs is always 64bit, so we should always use a 64bit register. Sometimes we'll only want to return the lower 32, but not for MPIDR, as that does define fields in the upper 32. Reviewed-by: Alex Bennée Signed-off-by: Andrew Jones ---

[kvm-unit-tests PATCH v3 05/10] arm/arm64: irq enable/disable

Reviewed-by: Alex Bennée Signed-off-by: Andrew Jones --- lib/arm/asm/processor.h | 10 ++ lib/arm64/asm/processor.h | 10 ++ 2 files changed, 20 insertions(+) diff --git a/lib/arm/asm/processor.h b/lib/arm/asm/processor.h index

[kvm-unit-tests PATCH v3 07/10] arm/arm64: add initial gicv3 support

Signed-off-by: Andrew Jones --- v2: configure irqs as NS GRP1 --- lib/arm/asm/arch_gicv3.h | 184 ++ lib/arm/asm/gic-v3.h | 321 + lib/arm/asm/gic.h | 1 + lib/arm/gic.c | 73

[kvm-unit-tests PATCH v3 08/10] arm/arm64: gicv2: add an IPI test

Signed-off-by: Andrew Jones --- v2: add more details in the output if a test fails, report spurious interrupts if we get them --- arm/Makefile.common | 6 +- arm/gic.c | 194 arm/unittests.cfg | 7 ++ 3

[kvm-unit-tests PATCH v3 10/10] arm/arm64: gic: don't just use zero

Allow user to select who sends ipis and with which irq, rather than just always sending irq=0 from cpu0. Signed-off-by: Andrew Jones --- v2: actually check that the irq received was the irq sent, and (for gicv2) that the sender is the expected one. --- arm/gic.c | 80

[kvm-unit-tests PATCH v3 06/10] arm/arm64: add initial gicv2 support

Add some gicv2 support. This just adds init and enable functions, allowing unit tests to start messing with it. Signed-off-by: Andrew Jones --- arm/Makefile.common| 1 + lib/arm/asm/gic-v2.h | 74 ++ lib/arm/asm/gic.h

[kvm-unit-tests PATCH v3 04/10] arm/arm64: add some delay routines

Allow a thread to wait some specified amount of time. Can specify in cycles, usecs, and msecs. Reviewed-by: Alex Bennée Signed-off-by: Andrew Jones --- lib/arm/asm/processor.h | 19 +++ lib/arm/processor.c | 15 +++

[kvm-unit-tests PATCH v3 09/10] arm/arm64: gicv3: add an IPI test

Signed-off-by: Andrew Jones --- v2: use IRM for gicv3 broadcast --- arm/gic.c | 157 ++ arm/unittests.cfg | 6 +++ 2 files changed, 154 insertions(+), 9 deletions(-) diff --git a/arm/gic.c b/arm/gic.c index

Re: [PATCH v9 15/17] KVM: arm64: implement ITS command queue command handlers

On 14/07/16 17:33, Marc Zyngier wrote: > On 14/07/16 16:35, Andre Przywara wrote: >> Hi Marc, >> >> On 14/07/16 11:38, Marc Zyngier wrote: >>> On 13/07/16 02:59, Andre Przywara wrote: The connection between a device, an event ID, the LPI number and the associated CPU is stored in