Re: [PATCH v11 0/8] KVM PCIe/MSI passthrough on ARM/ARM64: kernel part 1/3: iommu changes

Hi Eric, On Tue, Jul 19, 2016 at 12:55:03PM +, Eric Auger wrote: > This series introduces the msi-iommu api used to: > > - allocate/free resources for MSI IOMMU mapping > - set the MSI iova window aperture > - map/unmap physical addresses onto MSI IOVAs. > - determine whether an msi needs to

Re: [PATCH v11 0/8] KVM PCIe/MSI passthrough on ARM/ARM64: kernel part 1/3: iommu changes

Hi Dennis On 20/07/2016 11:56, Dennis Chen wrote: > Hi Eric, > > On Tue, Jul 19, 2016 at 12:55:03PM +, Eric Auger wrote: >> This series introduces the msi-iommu api used to: >> >> - allocate/free resources for MSI IOMMU mapping >> - set the MSI iova window aperture >> - map/unmap physical

Re: [PATCH v11 09/10] genirq/msi: map/unmap the MSI doorbells on msi_domain_alloc/free_irqs

On Tue, 19 Jul 2016, Eric Auger wrote: > /** > + * msi_handle_doorbell_mappings: in case the irq data corresponds to an > + * MSI that requires iommu mapping, traverse the irq domain hierarchy > + * to retrieve the doorbells to handle and iommu_map/unmap them according > + * to @map boolean. > +

Re: [RFC PATCH v1 1/4] arm/arm64: vgic-new: Introduce 64-bit reg access support

On 20/07/16 14:02, vijay.kil...@gmail.com wrote: > From: Vijaya Kumar K > > vgic_attr_regs_access() handles only 32-bit register > value. Introduce union ureg to handle both 32 and 64 bit > register size. > > Signed-off-by: Vijaya Kumar K > ---

Re: [RFC v7 5/7] KVM: arm/arm64: enable irqchip routing

Hi Marc, On 19/07/2016 18:16, Marc Zyngier wrote: > On 19/07/16 16:46, Paolo Bonzini wrote: >> >> >> On 19/07/2016 16:56, Marc Zyngier wrote: >>> On 18/07/16 14:25, Eric Auger wrote: This patch adds compilation and link against irqchip. Main motivation behind using irqchip code is

Re: [PATCH v11 06/10] genirq/msi-doorbell: msi_doorbell_safe

On Tue, 19 Jul 2016, Eric Auger wrote: > +bool msi_doorbell_safe(void) > +{ > + struct irqchip_doorbell *db; > + bool irq_remapping = true; > + > + mutex_lock(_doorbell_mutex); > + list_for_each_entry(db, _doorbell_list, next) { > + irq_remapping &=

Re: [PATCH v11 10/10] genirq/msi: use the MSI doorbell's IOVA when requested

On Tue, 19 Jul 2016, Eric Auger wrote: First of all - valid for all patches: Subject: sys/subsys: Sentence starts with an uppercase letter Now for this particular one: genirq/msi: use the MSI doorbell's IOVA when requested > On MSI message composition we now use the MSI doorbell's IOVA in >

Re: [PATCH v11 05/10] genirq/msi-doorbell: msi_doorbell_pages

Hi Thomas, On 19/07/2016 16:38, Thomas Gleixner wrote: > On Tue, 19 Jul 2016, Eric Auger wrote: >> msi_doorbell_pages sum up the number of iommu pages of a given order > > adding () to the function name would make it immediately clear that > msi_doorbell_pages is a function. > >> +/** >> + *

Re: [PATCH v11 04/10] genirq/msi-doorbell: allow MSI doorbell (un)registration

Hi Thomas, On 19/07/2016 16:22, Thomas Gleixner wrote: > On Tue, 19 Jul 2016, Eric Auger wrote: >> + >> +#include >> +#include >> +#include >> + >> +struct irqchip_doorbell { >> +struct irq_chip_msi_doorbell_info info; >> +struct list_head next; > > Again, please align the struct

[RFC PATCH v1 2/4] arm/arm64: vgic-new: Add distributor and redistributor access

From: Vijaya Kumar K VGICv3 Distributor and Redistributor registers are accessed using KVM_DEV_ARM_VGIC_GRP_DIST_REGS and KVM_DEV_ARM_VGIC_GRP_DIST_REGS with KVM_SET_DEVICE_ATTR and KVM_GET_DEVICE_ATTR ioctls. These registers are accessed as 32-bit and cpu mpidr value

[RFC PATCH v1 0/4] arm/arm64: vgic-new: Implement API for vGICv3 live migration

From: Vijaya Kumar K This patchset adds API for saving and restoring of VGICv3 registers to support live migration with new vgic feature. This API definition is as per draft version of VGICv3 specification

Re: [PATCH v11 0/8] KVM PCIe/MSI passthrough on ARM/ARM64: kernel part 1/3: iommu changes

On Wed, Jul 20, 2016 at 01:03:00PM +0200, Auger Eric wrote: > Hi Dennis > On 20/07/2016 11:56, Dennis Chen wrote: > > Hi Eric, > > > > On Tue, Jul 19, 2016 at 12:55:03PM +, Eric Auger wrote: > >> This series introduces the msi-iommu api used to: > >> > >> - allocate/free resources for MSI

Re: [PATCH v11 4/8] iommu/msi-iommu: initialization

Hi Eric, Some small questions/comments below: On Tue, Jul 19, 2016 at 12:55:07PM +, Eric Auger wrote: > iommu_get/put_msi_cookie allocates/frees the resource used to store > and ref count the MSI doorbell mappings. iommu_msi_set_aperture > initializes the iova domain used for MSI IOVA

[RFC PATCH v1 3/4] arm/arm64: vgic-new: Introduce find_reg_by_id()

From: Vijaya Kumar K In order to implement vGICv3 CPU interface access, we will need to perform table lookup of system registers. We would need both index_to_params() and find_reg() exported for that purpose, but instead we export a single function which combines them

[RFC PATCH v1 4/4] arm/arm64: vgic-new: Implement VGICv3 CPU interface access

From: Vijaya Kumar K CPU sysregs access size is always 64 bits. MPIDR value passed along with reg id is used to identify the CPU. Signed-off-by: Pavel Fedin Signed-off-by: Vijaya Kumar K ---

[RFC PATCH v1 1/4] arm/arm64: vgic-new: Introduce 64-bit reg access support

From: Vijaya Kumar K vgic_attr_regs_access() handles only 32-bit register value. Introduce union ureg to handle both 32 and 64 bit register size. Signed-off-by: Vijaya Kumar K --- virt/kvm/arm/vgic/vgic-kvm-device.c | 19 ---

[PATCH v7 01/15] FDT: introduce global phandle allocation

Allocating an FDT phandle (a unique identifier) using a static variable in a static inline function defined in a header file works only if all users are in the same source file. So trying to allocate a handle from two different compilation units fails. Introduce global phandle allocation and

[PATCH v7 11/15] PCI: inject PCI device ID on MSI injection

The ITS emulation requires a unique device ID to be passed along the MSI payload when kvmtool wants to trigger an MSI in the guest. According to the proposed changes to the interface add the PCI bus/device/function triple to the structure passed with the ioctl. Check the respective capability

[PATCH v7 10/15] add kvm__check_vm_capability

KVM capabilities can be per-VM, in this case the ioctl should be issued on the VM file descriptor, not on the system fd. Since this feature is guarded by a (system) capability itself, wrap the call into a function of its own. Signed-off-by: Andre Przywara ---

[PATCH v7 02/15] arm: use new phandle allocation functions

To refer to the GIC FDT node, we used to pass the GIC phandle to most of the functions dealing with FDT nodes. Since we now have a global phandle reference, use that to refer to the GIC handle in various places and get rid of the now unneeded parameter passing. Signed-off-by: Andre Przywara

[PATCH v7 08/15] arm: allow creation of an MSI register frame region

The GICv3 ITS expects a separate 64K page to hold ITS registers. Add a function to reserve such a page in the guest's I/O memory and use that for the ITS vGIC type. Signed-off-by: Andre Przywara --- arm/gic.c| 63

[PATCH v7 09/15] arm: FDT: create MSI controller DT node

The ARM GICv3 ITS requires a separate device tree node to describe the ITS. Add this as a child to the GIC interrupt controller node to let a guest discover and use the ITS if the user requests it. Since we now need to specify #address-cells for the GIC node, we have to add two zeroes to the

[PATCH v7 00/15] kvmtool: arm: ITS emulation and GSI routing support

Hi, this series teaches kvmtool how to support KVM's ITS emulation. Also (as this is somewhat related and has been co-developed) it enables GSI routing for ARM/ARM64, which allows IRQFDs to be used, for instance to use vhost_net. At the moment this is dependent on the guest using the ITS

[PATCH v7 05/15] virtio: fix endianness check for vhost support

Currently we deny any VHOST_* functionality if the architecture supports guests with different endianness than the host. Most of the time even on those architectures the endianness of guest and host are the same, though, so we are denying the glory of VHOST needlessly. Switch from compile time

[PATCH v7 04/15] MSI-X: update GSI routing after changed MSI-X configuration

When we set up GSI routing to map MSIs to KVM's GSI numbers, we write the current device's MSI setup into the kernel routing table. However the device driver in the guest can use PCI configuration space accesses to change the MSI configuration (address and/or payload data). Whenever this happens

[PATCH v7 12/15] arm: setup SPI IRQ routing tables

Since we soon start using GSI routing on ARM platforms too, we have to setup the initial SPI routing table. Before the first call to KVM_SET_GSI_ROUTING, the kernel holds this table internally, but this is overwritten with the ioctl, so we have to explicitly set it up here. The routing is actually

[PATCH v7 13/15] extend GSI IRQ routing to take a device ID

For ITS emulation we need the device ID along with the MSI payload and doorbell address to identify an MSI, so we need to put it in the GSI IRQ routing table too. There is a per-VM capability by which the kernel signals the need for a device ID, so check this and put the device ID into the routing

[PATCH v7 14/15] arm64: enable GICv3-ITS emulation

With everything in place for the ITS emulation add a new option to the --irqchip parameter to allow the user to specify --irqchip=gicv3-its to enable the ITS emulation. This will trigger creating the FDT node and an ITS register frame to tell the kernel we want ITS emulation in the guest.

[PATCH v7 03/15] irq: move IRQ routing into irq.c

The current IRQ routing code in x86/irq.c is mostly implementing a generic KVM interface which other architectures may use too. Move the code to set up an MSI route into the generic irq.c file and guard it with the KVM_CAP_IRQ_ROUTING capability to return an error if the kernel does not support