Re: [RFC PATCH v3 5/5] arm/arm64: vgic-new: Implement KVM_DEV_ARM_VGIC_GRP_LEVEL_INFO ioctl

On Tue, Aug 30, 2016 at 04:00:34PM +0200, Christoffer Dall wrote: > On Wed, Aug 24, 2016 at 04:50:09PM +0530, vijay.kil...@gmail.com wrote: > > From: Vijaya Kumar K > > > > Userspace requires to store and restore of line_level for > > level triggered interrupts. For this

[PATCH 0/2] arm{,64}/kvm: excise redundant cache maintenance

As noted in a jailhouse thread a short while ago [1,2], the presence of the virtualization extensions implies that page table walks are coherent, and do not require that updates are cleaned to the PoU. These patches remove the redundant maintenance and related infrastructure. As I do not have a

[PATCH 2/2] arm64/kvm: remove unused stub functions

Now that 32-bit KVM no longer performs cache maintenance for page table updates, we no longer need empty stubs for arm64. Remove them. Signed-off-by: Mark Rutland Cc: Christoffer Dall Cc: Marc Zyngier Cc:

Re: [Qemu-devel] [kvm-unit-tests PATCH v3 03/10] arm/arm64: smp: support more than 8 cpus

Hi Drew, Proper commit message? ... also selects the vgic model corresponding to the host > Reviewed-by: Alex Bennée > Signed-off-by: Andrew Jones > --- > arm/run | 19 --- > arm/selftest.c| 5 - >

Re: [Qemu-devel] [kvm-unit-tests PATCH v3 01/10] lib: xstr: allow multiple args

Hi Drew, On 15/07/2016 15:00, Andrew Jones wrote: > Make implementation equivalent to Linux's include/linux/stringify.h > > Signed-off-by: Andrew Jones > --- > lib/libcflat.h | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/lib/libcflat.h

Re: [Qemu-devel] [kvm-unit-tests PATCH v3 02/10] arm64: fix get_"sysreg32" and make MPIDR 64bit

Hi, On 15/07/2016 15:00, Andrew Jones wrote: > mrs is always 64bit, so we should always use a 64bit register. > Sometimes we'll only want to return the lower 32, but not for > MPIDR, as that does define fields in the upper 32. > > Reviewed-by: Alex Bennée >

Re: [RFC PATCH v3 5/5] arm/arm64: vgic-new: Implement KVM_DEV_ARM_VGIC_GRP_LEVEL_INFO ioctl

On Wed, Aug 24, 2016 at 04:50:09PM +0530, vijay.kil...@gmail.com wrote: > From: Vijaya Kumar K > > Userspace requires to store and restore of line_level for > level triggered interrupts. For this ioctl KVM_DEV_ARM_VGIC_GRP_LEVEL_INFO > is defined. > > Signed-off-by:

[PATCH 1/2] arm/kvm: excise redundant cache maintenance

When modifying Stage-2 page tables, we perform cache maintenance to account for non-coherent page table walks. However, this is unnecessary, as page table walks are guaranteed to be coherent in the presence of the virtualization extensions. Per ARM DDI 0406C.c, section B1.7 ("The Virtualization

[PATCH] KVM: arm: vgic: Drop build compatibility hack for older kernel versions

As kvm_set_routing_entry() was changing prototype between 4.7 and 4.8, an ugly hack was put in place in order to survive both building in -next and the merge window. Now that everything has been merged, let's dump the compatibility hack for good. Signed-off-by: Marc Zyngier

Re: [PATCH 0/2] arm{,64}/kvm: excise redundant cache maintenance

On Tue, Aug 30, 2016 at 05:05:54PM +0100, Mark Rutland wrote: > As noted in a jailhouse thread a short while ago [1,2], the presence of the > virtualization extensions implies that page table walks are coherent, and do > not require that updates are cleaned to the PoU. > > These patches remove

[PATCH] KVM: Remove deprecated create_singlethread_workqueue

The workqueue "irqfd_cleanup_wq" queues a single work item >shutdown and hence doesn't require ordering. It is a host-wide workqueue for issuing deferred shutdown requests aggregated from all vm* instances. It is not being used on a memory reclaim path. Hence, it has been converted to use

[PATCH v3] arm64: KVM: Optimize __guest_enter/exit() to save a few instructions

We are doing an unnecessary stack push/pop operation when restoring the guest registers x0-x18 in __guest_enter(). This patch saves the two instructions by using x18 as a base register. No need to store the vcpu context pointer in stack because it is redundant, the same information is available in

Re: [RFC PATCH v3 4/5] arm/arm64: vgic-new: Implement VGICv3 CPU interface access

On Wed, Aug 24, 2016 at 04:50:08PM +0530, vijay.kil...@gmail.com wrote: > From: Vijaya Kumar K > > VGICv3 CPU interface registers are accessed using > KVM_DEV_ARM_VGIC_CPU_SYSREGS ioctl. These registers are accessed > as 64-bit. The cpu MPIDR value is passed along with

Re: [PATCH v2] arm64: KVM: Save four instructions in __guest_enter/exit()

Hi Marc, On 08/30/2016 05:54 AM, Marc Zyngier wrote: On 30/08/16 10:55, Christoffer Dall wrote: On Mon, Aug 29, 2016 at 10:51:14PM -0500, Shanker Donthineni wrote: We are doing an unnecessary stack push/pop operation when restoring the guest registers x0-x18 in __guest_enter(). This patch

Re: [RFC PATCH v3 2/5] arm/arm64: vgic-new: Add distributor and redistributor access

On Wed, Aug 24, 2016 at 04:50:06PM +0530, vijay.kil...@gmail.com wrote: > From: Vijaya Kumar K > > VGICv3 Distributor and Redistributor registers are accessed using > KVM_DEV_ARM_VGIC_GRP_DIST_REGS and KVM_DEV_ARM_VGIC_GRP_DIST_REGS > with KVM_SET_DEVICE_ATTR and

Re: [RFC PATCH v3 3/5] arm/arm64: vgic-new: Introduce find_reg_by_id()

On Wed, Aug 24, 2016 at 04:50:07PM +0530, vijay.kil...@gmail.com wrote: > From: Vijaya Kumar K > > In order to implement vGICv3 CPU interface access, we will need to perform > table lookup of system registers. We would need both index_to_params() and > find_reg()

Re: [PATCH v2] arm64: KVM: Save four instructions in __guest_enter/exit()

On Mon, Aug 29, 2016 at 10:51:14PM -0500, Shanker Donthineni wrote: > We are doing an unnecessary stack push/pop operation when restoring > the guest registers x0-x18 in __guest_enter(). This patch saves the > two instructions by using x18 as a base register. No need to store > the vcpu context

Re: [PATCH v2] arm64: KVM: Save four instructions in __guest_enter/exit()

On 30/08/16 10:55, Christoffer Dall wrote: > On Mon, Aug 29, 2016 at 10:51:14PM -0500, Shanker Donthineni wrote: >> We are doing an unnecessary stack push/pop operation when restoring >> the guest registers x0-x18 in __guest_enter(). This patch saves the >> two instructions by using x18 as a base

Re: [RFC PATCH v3 1/5] arm/arm64: vgic-new: Implement support for userspace access

On Wed, Aug 24, 2016 at 04:50:05PM +0530, vijay.kil...@gmail.com wrote: > From: Vijaya Kumar K > > Read and write of some registers like ISPENDR and ICPENDR > from userspace requires special handling when compared to > guest access for these registers. > > Refer to

Re: [RFC PATCH v3 1/5] arm/arm64: vgic-new: Implement support for userspace access

On Wed, Aug 24, 2016 at 04:50:05PM +0530, vijay.kil...@gmail.com wrote: > From: Vijaya Kumar K > > Read and write of some registers like ISPENDR and ICPENDR > from userspace requires special handling when compared to > guest access for these registers. > > Refer to

Re: [RFC PATCH v3 1/5] arm/arm64: vgic-new: Implement support for userspace access

[replying to myself...] On Tue, Aug 30, 2016 at 12:31:50PM +0200, Christoffer Dall wrote: > On Wed, Aug 24, 2016 at 04:50:05PM +0530, vijay.kil...@gmail.com wrote: > > From: Vijaya Kumar K [...] > > > static const struct vgic_register_region vgic_v3_dist_registers[]