[PATCH v3 1/5] arm64: Define Falkor v1 CPU

From: Shanker Donthineni Define the MIDR implementer and part number field values for the Qualcomm Datacenter Technologies Falkor processor version 1 in the usual manner. Signed-off-by: Shanker Donthineni Signed-off-by: Christopher Covington

[PATCH v3 3/5] arm64: Create and use __tlbi_dsb() macros

This refactoring will allow an errata workaround that repeats tlbi dsb sequences to only change one location. This is not intended to change the generated assembly and comparison of before and after preprocessor output of arch/arm64/mm/mmu.c and vmlinux objdump shows no functional changes.

[PATCH v3 5/5] arm64: Work around Falkor erratum 1009

During a TLB invalidate sequence targeting the inner shareable domain, Falkor may prematurely complete the DSB before all loads and stores using the old translation are observed; instruction fetches are not subject to the conditions of this erratum. Signed-off-by: Christopher Covington

[PATCH v3 4/5] arm64: Use __tlbi_dsb() macros in KVM code

Refactor the KVM code to use the newly introduced __tlbi_dsb macros, which will allow an errata workaround that repeats tlbi dsb sequences to only change one location. This is not intended to change the generated assembly and comparing before and after vmlinux objdump shows no functional changes.

[PATCH v3 2/5] arm64: Work around Falkor erratum 1003

From: Shanker Donthineni On the Qualcomm Datacenter Technologies Falkor v1 CPU, memory accesses may allocate TLB entries using an incorrect ASID when TTBRx_EL1 is being updated. Changing the TTBRx_EL1[ASID] and TTBRx_EL1[BADDR] fields separately using a reserved ASID

Re: [PATCH v3 2/5] arm64: Work around Falkor erratum 1003

Some minor comments below, nothing fundamental (as long as you say the new sequence doesn't have the speculative TLB load problem I mentioned on a previous version). On Wed, Jan 11, 2017 at 09:41:15AM -0500, Christopher Covington wrote: > diff --git a/Documentation/arm64/silicon-errata.txt >

Re: [PATCH v3 2/5] arm64: Work around Falkor erratum 1003

On 11/01/17 18:06, Catalin Marinas wrote: > Some minor comments below, nothing fundamental (as long as you say the > new sequence doesn't have the speculative TLB load problem I mentioned > on a previous version). > > On Wed, Jan 11, 2017 at 09:41:15AM -0500, Christopher Covington wrote: >> diff

Re: [PATCH v3 2/5] arm64: Work around Falkor erratum 1003

On Wed, Jan 11, 2017 at 12:35:55PM -0600, Timur Tabi wrote: > On 01/11/2017 12:33 PM, Mark Rutland wrote: > >It'll need to affect all lines since the kconfig column needs to expand > >by at least one character to fit QCOM_FALKOR_ERRATUM_1003. > > Or we can make the macro shorter. The name, as it

Re: [PATCH v3 2/5] arm64: Work around Falkor erratum 1003

On 01/11/2017 12:37 PM, Mark Rutland wrote: The name, as it is, is perfectly descriptive. Let's not sacrifice legibility over a non-issue. I don't want to kick a dead horse or anything, but changing it to QCOM_FLKR_ERRATUM_1003 would eliminate all the spacing problems without sacrificing

Re: [PATCH v3 2/5] arm64: Work around Falkor erratum 1003

On Wed, Jan 11, 2017 at 06:22:08PM +, Marc Zyngier wrote: > On 11/01/17 18:06, Catalin Marinas wrote: > > On Wed, Jan 11, 2017 at 09:41:15AM -0500, Christopher Covington wrote: > >> diff --git a/arch/arm64/mm/proc.S b/arch/arm64/mm/proc.S > >> index 32682be..9ee46df 100644 > >> ---

Re: [PATCH v3 2/5] arm64: Work around Falkor erratum 1003

On Wed, Jan 11, 2017 at 12:40:42PM -0600, Timur Tabi wrote: > On 01/11/2017 12:37 PM, Mark Rutland wrote: > >The name, as it is, is perfectly descriptive. > > > >Let's not sacrifice legibility over a non-issue. > > I don't want to kick a dead horse or anything, but changing it to >

Re: [PATCH v3 2/5] arm64: Work around Falkor erratum 1003

[finally, some proper bikeshedding] On 11/01/17 18:40, Timur Tabi wrote: > On 01/11/2017 12:37 PM, Mark Rutland wrote: >> The name, as it is, is perfectly descriptive. >> >> Let's not sacrifice legibility over a non-issue. > > I don't want to kick a dead horse or anything, but changing it to >

[kvm-unit-tests PATCH 6/6] run_tests: allow passing of options to QEMU

This allows additional options to be passed to QEMU. It follows the convention of passing parameters after a -- to the child process. In my case I'm using it to toggle MTTCG on an off: ./run_tests.sh -- --accel tcg,thread=multi Signed-off-by: Alex Bennée --- v1 -

[kvm-unit-tests PATCH 4/6] docs: mention checkpatch in the README

Signed-off-by: Alex Bennée --- README.md | 1 + 1 file changed, 1 insertion(+) diff --git a/README.md b/README.md index 5027b62..9462824 100644 --- a/README.md +++ b/README.md @@ -79,3 +79,4 @@ You can add the following to .git/config to do this automatically for you:

[PATCH] KVM: arm64: Increase number of memslots to 512

From: Linu Cherian Having only 32 memslots is a real constraint for the maximum number of PCI devices that can be assigned to a single guest. Assuming each PCI device/virtual function having two memory BAR regions, we could assign only 15 devices/virtual functions to a

Re: [PATCH v2 2/5] arm64: Work around Falkor erratum 1003

Hi Christoffer, On 01/04/2017 05:33 AM, Christoffer Dall wrote: > On Thu, Dec 29, 2016 at 05:43:32PM -0500, Christopher Covington wrote: >> From: Shanker Donthineni >> >> On the Qualcomm Datacenter Technologies Falkor v1 CPU, memory accesses may >> allocate TLB entries

kvm: deadlock in kvm_vgic_map_resources

Hello, While running syzkaller fuzzer I've got the following deadlock. On commit 9c763584b7c8911106bb77af7e648bef09af9d80. = [ INFO: possible recursive locking detected ] 4.9.0-rc6-xc2-00056-g08372dd4b91d-dirty #50 Not tainted

[kvm-unit-tests PATCH 2/6] lib/pci: fix BAR format strings

Using %x as a format string is not portable across 32/64 bit builds. Use explicit PRIx32 format strings like the 64 bit version above. Signed-off-by: Alex Bennée --- lib/pci.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/lib/pci.c b/lib/pci.c

[kvm-unit-tests PATCH 3/6] docs: move README to README.md and symlink

This allows a slightly nicer formatting of the text when displayed on some repository hosts. We keep a symlink from README for the old-school purists. Signed-off-by: Alex Bennée --- README| 69 + README.md | 81