[PATCH v2] KVM: arm64: pass vcpu esr_el2 and far_el2 sysre to user space

For the firmware-first RAS solution, SEA and SEI is injected by the user space, user space needs to know the vcpu's esr_el2 and far_el2 value, so add them to sysreg. user space uses the IOCTL KVM_GET_ONE_REG can get their value. Signed-off-by: Dongjiu Geng ---

Re: [PATCH] KVM: arm64: add esr_el2 and far_el2 to sysreg

Marc, On 2017/8/8 0:56, Marc Zyngier wrote: > On 07/08/17 17:23, gengdongjiu wrote: >> Hi Marc, >> As James's suggestion, I move injection SEA Error logic to the user >> space(Qemu), Qemu sets the related guest OS esr/elr/pstate/spsr >> through IOCTL KVM_SET_ONE_REG. For the SEA, when Qemu

[PATCH] arm64: KVM: Reject non-compliant HVC calls from guest kernel

The SMC/HVC instructions with an immediate value non-zero are not compliant according to 'SMC calling convention system software document'. Add a validation check in handle_hvc() to avoid malicious HVC calls from VM, and inject an undefined instruction for those calls.

Re: [PATCH v2] KVM: arm64: pass vcpu esr_el2 and far_el2 sysre to user space

On Tue, Aug 08 2017 at 3:17:34 am BST, Dongjiu Geng wrote: > For the firmware-first RAS solution, SEA and SEI is injected > by the user space, user space needs to know the vcpu's esr_el2 and > far_el2 value, so add them to sysreg. user space uses > the IOCTL

Re: [PATCH v2] KVM: arm64: pass vcpu esr_el2 and far_el2 sysre to user space

Marc, On 2017/8/8 3:07, Marc Zyngier wrote: > So if you want that information, extract it, expose what is required, > strictly what is required, and only when it is required. > > In the meantime, I'm NAKing this patch, and any patch that will expose > _EL2 registers outside of nested

[PATCH] KVM: arm64: add esr_el2 and far_el2 to sysreg

For the firmware-first RAS solution, SEA and SEI is injected by the user space, user space needs to know the esr_el2 and far_el2's value, so add them to sysreg. user space uses the IOCTL KVM_GET_ONE_REG can get their value. Signed-off-by: Dongjiu Geng Signed-off-by:

Re: [PATCH] KVM: arm64: add esr_el2 and far_el2 to sysreg

+James, since he deals with all things RAS. Please keep him on CC at all times. On 07/08/17 17:08, Dongjiu Geng wrote: > For the firmware-first RAS solution, SEA and SEI is injected > by the user space, user space needs to know the esr_el2 and > far_el2's value, so add them to sysreg. user space

Re: [PATCH] KVM: arm64: add esr_el2 and far_el2 to sysreg

Hi Marc, As James's suggestion, I move injection SEA Error logic to the user space(Qemu), Qemu sets the related guest OS esr/elr/pstate/spsr through IOCTL KVM_SET_ONE_REG. For the SEA, when Qemu sets the esr_el1.IL bit, it needs to refer to esr_el2.IL, else Qemu does not know the trapped

Re: [PATCH] KVM: arm64: add esr_el2 and far_el2 to sysreg

Hi gengdongjiu, On 07/08/17 17:23, gengdongjiu wrote: > As James's suggestion, I move injection SEA Error logic to the user > space(Qemu), Qemu sets the related guest OS esr/elr/pstate/spsr (because for firmware-first its the CPER records that matter, and only QEMU knows where it reserved the

Re: [PATCH] KVM: arm64: add esr_el2 and far_el2 to sysreg

On 07/08/17 17:23, gengdongjiu wrote: > Hi Marc, > As James's suggestion, I move injection SEA Error logic to the user > space(Qemu), Qemu sets the related guest OS esr/elr/pstate/spsr > through IOCTL KVM_SET_ONE_REG. For the SEA, when Qemu sets the esr_el1.IL > bit, it needs to refer to

Re: [PATCH] KVM: arm64: add esr_el2 and far_el2 to sysreg

Ok, thanks for James's confirmation. Another question, For the SEI, I want to also use SIGBUS both for the KVM user and non-kvm user, if SEA and SEI Error all use the SIGBUS to notify user space(Qemu), the user space(Qemu) will be confused, and do not know whether this is SEA or SEI error. so