Re: [PATCH v4 00/21] SError rework + RAS for firmware first support

Hi gengdongjiu, On 15/11/17 09:15, gengdongjiu wrote: > On 2017/11/15 0:03, James Morse wrote: >>> Hope this helps? >> Yes, I'll go looking for a way to expose VSESR_EL2 to user-space. > > what is the purpose to expose VSESR_EL2? > do you mean set its value after migration? Yes. Ideally Qemu

Re: [v3,2/2] arm64: Add software workaround for Falkor erratum 1041

On Sun, 12 Nov 2017, Shanker Donthineni wrote: The ARM architecture defines the memory locations that are permitted to be accessed as the result of a speculative instruction fetch from an exception level for which all stages of translation are disabled. Specifically, the core is permitted to

Re: [PATCH 33/37] KVM: arm/arm64: Move arm64-only vgic-v2-sr.c file to arm64

Hi, On 12/10/17 11:41, Christoffer Dall wrote: > The vgic-v2-sr.c file now only contains the logic to replay unaligned > accesses to the virtual CPU interface on 16K and 64K page systems, which > is only relevant on 64-bit platforms. Therefore move this file to the > arm64 KVM tree, remove the

Re: [PATCH 24/37] KVM: arm64: Prepare to handle traps on deferred EL0 sysregs

On 12/10/17 11:41, Christoffer Dall wrote: We can trap access to ACTLR_EL1 which we can later defer to only save/restore during vcpu_load and vcpu_put, so let's read the value directly from the CPU when necessary. Signed-off-by: Christoffer Dall ---

Re: [PATCH v4 00/21] SError rework + RAS for firmware first support

Hi james, On 2017/11/15 0:03, James Morse wrote: >> Hope this helps? > Yes, I'll go looking for a way to expose VSESR_EL2 to user-space. what is the purpose to expose VSESR_EL2? do you mean set its value after migration? May be we can use similar below Mechanism

Re: [PATCH v3 2/2] arm64: Add software workaround for Falkor erratum 1041

On Tue, Nov 14, 2017 at 7:05 PM, Stephen Boyd wrote: > This also applies to Kryo CPUs. I have a patch[1] for the 1003 > Falkor errata that adds the Kryo MIDR check which can also be > used for this errata. > > [1] https://patchwork.kernel.org/patch/10048987/ Please submit

Re: [PATCH v8 0/7] Support RAS virtualization in KVM

Hi James, Thank you very much for your comments and review. On 2017/11/15 0:00, James Morse wrote: > Hi Dongjiu Geng, > > On 10/11/17 19:54, Dongjiu Geng wrote: >> This series patches mainly do below things: >> >> 1. Trap RAS ERR* registers Accesses to EL2 from Non-secure EL1, >>KVM will

Re: [PATCH v8 7/7] arm64: kvm: handle SError Interrupt by categorization

Hi James, Thanks a lot for the review. On 2017/11/15 0:00, James Morse wrote: > Hi Dongjiu Geng, > > On 10/11/17 19:54, Dongjiu Geng wrote: >> If it is not RAS SError, directly inject virtual SError, >> which will keep the old way. If it is RAS SError, firstly >> let host ACPI module to

Re: [PATCH v4 00/21] SError rework + RAS for firmware first support

> > (While VSESR_EL2 is 64bit[0], the value gets written into the ESR, which is > 32bit, so I doubt the top 32bits can be used, currently they are all > reserved.) In fact the valid bits for vsesr_el2 is 25bit, which will set to ESR.ISS, bits [24:0]. ESR.IL and ESR.EC are not set by vsesr_el2.

Re: [PATCH 08/37] KVM: arm64: Defer restoring host VFP state to vcpu_put

On Thu, Oct 12, 2017 at 12:41:12PM +0200, Christoffer Dall wrote: > Avoid saving the guest VFP registers and restoring the host VFP > registers on every exit from the VM. Only when we're about to run > userspace or other threads in the kernel do we really have to switch the > state back to the

Re: [3/3] arm64: Add software workaround for Falkor erratum 1041

On Fri, 10 Nov 2017, Manoj Iyer wrote: On Thu, 9 Nov 2017, Manoj Iyer wrote: James, Looks like my VM test raised a false alarm. I retested stock Artful 4.13 kernel (No erratum 1041 patches applied). James, an update on the crash (false alarm). We suspect this is a firmware crash due