Hi Eric,
On 04/07/16 16:00, Auger Eric wrote:
> Hi Peter,
>
> On 04/07/2016 16:32, Peter Maydell wrote:
>> On 4 July 2016 at 15:27, Auger Eric wrote:
>>> Andre,
>>>
>>> On 04/07/2016 16:05, Andre Przywara wrote:
Hi,
On 04/07/16 10:00, Auger Eric wrote:
Extend kvm_kernel_irq_routing_entry to transport the device id
field, devid. A new flags field makes possible to indicate the
devid is valid. Those additions are used for ARM GICv3 ITS MSI
injection.
Signed-off-by: Eric Auger
Acked-by: Christoffer Dall
Up to now, only irqchip routing entries could be set. This patch
adds the capability to insert MSI routing entries.
For ARM64, let's also increase KVM_MAX_IRQ_ROUTES to 4096: this
include SPI irqchip routes plus MSI routes. In the future this
might be extended.
Signed-off-by: Eric Auger
With the advent of GICv3 ITS in-kernel emulation, KVM MSI routing
becomes mandated for proper VIRTIO-PCI vhost integration.
In QEMU, when the VIRTIO-PCI device is programmed with the MSI message,
we previously used direct_mapping trick: this consists in extracting the
IRQ ID found in the MSI
This patch adds compilation and link against irqchip.
Main motivation behind using irqchip code is to enable MSI
routing code. In the future irqchip routing may also be useful
when targeting multiple irqchips.
Routing standard callbacks now are implemented in vgic-irqfd:
- kvm_set_routing_entry
On ARM, the MSI msg (address and data) comes along with
out-of-band device ID information. The device ID encodes the
device that writes the MSI msg. Let's convey the device id in
kvm_irq_routing_msi and use KVM_MSI_VALID_DEVID flag value in
kvm_irq_routing_entry to indicate the msi devid is
If the ITS modality is not available, let's simply support MSI
injection by transforming the MSI.data into an SPI ID.
This becomes possible to use KVM_SIGNAL_MSI ioctl and MSI
routing for arm too.
Signed-off-by: Eric Auger
---
v4 -> v5:
- on vgic_v2m_inject_msi check
on ARM, a devid field is populated in kvm_msi struct in case the
flag is set to KVM_MSI_VALID_DEVID. Let's propagate both flags and
devid field in kvm_kernel_irq_routing_entry.
Signed-off-by: Eric Auger
Acked-by: Christoffer Dall
---
v4 ->
Hi Peter,
On 04/07/2016 16:32, Peter Maydell wrote:
> On 4 July 2016 at 15:27, Auger Eric wrote:
>> Andre,
>>
>> On 04/07/2016 16:05, Andre Przywara wrote:
>>> Hi,
>>>
>>> On 04/07/16 10:00, Auger Eric wrote:
From a QEMU integration point of view this means the init
On 4 July 2016 at 15:27, Auger Eric wrote:
> Andre,
>
> On 04/07/2016 16:05, Andre Przywara wrote:
>> Hi,
>>
>> On 04/07/16 10:00, Auger Eric wrote:
>>> From a QEMU integration point of view this means the init sequence used
>>> for KVM GIC interrupt controllers cannot be
Andre,
On 04/07/2016 16:05, Andre Przywara wrote:
> Hi,
>
> On 04/07/16 10:00, Auger Eric wrote:
>> Hi Andre,
>>
>> On 28/06/2016 14:32, Andre Przywara wrote:
>>> Introduce a new KVM device that represents an ARM Interrupt Translation
>>> Service (ITS) controller. Since there can be multiple of
On 04/07/2016 16:00, Andre Przywara wrote:
> Hi,
>
> On 04/07/16 14:54, Auger Eric wrote:
>> Hi Andre,
>>
>> On 04/07/2016 15:38, Andre Przywara wrote:
>>> 2) on KVM_DEV_ARM_VGIC_GRP_ADDR check that "initialized" is false
>>> 3) on KVM_DEV_ARM_VGIC_CTRL_INIT check that "initialized" is false
Hi,
On 04/07/16 10:00, Auger Eric wrote:
> Hi Andre,
>
> On 28/06/2016 14:32, Andre Przywara wrote:
>> Introduce a new KVM device that represents an ARM Interrupt Translation
>> Service (ITS) controller. Since there can be multiple of this per guest,
>> we can't piggy back on the existing GICv3
Hi,
On 04/07/16 14:54, Auger Eric wrote:
> Hi Andre,
>
> On 04/07/2016 15:38, Andre Przywara wrote:
>> 2) on KVM_DEV_ARM_VGIC_GRP_ADDR check that "initialized" is false
>> 3) on KVM_DEV_ARM_VGIC_CTRL_INIT check that "initialized" is false
>> 4) after KVM_DEV_ARM_VGIC_CTRL_INIT set initialized to
Hi Eric,
On 04/07/16 09:17, Auger Eric wrote:
> Hi Andre,
>
> On 28/06/2016 14:32, Andre Przywara wrote:
>> The ARM GICv3 ITS emulation code goes into a separate file, but needs
>> to be connected to the GICv3 emulation, of which it is an option.
>> The ITS MMIO handlers require the respective
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