Re: [RFC PATCH 6/7] arm64: KVM: Handle trappable TLB instructions

2016-09-01 Thread Punit Agrawal
Will Deacon writes: > On Fri, Aug 26, 2016 at 10:37:08AM +0100, Punit Agrawal wrote: >> > Will Deacon writes: >> >> The easiest thing to do is just TLBI VMALLE1IS for all trapped operations, >> >> but you might want to see how that performs. >> > >> >

Re: [Qemu-devel] [kvm-unit-tests PATCH v3 08/10] arm/arm64: gicv2: add an IPI test

2016-09-01 Thread Auger Eric
Hi Drew, On 15/07/2016 15:00, Andrew Jones wrote: > Signed-off-by: Andrew Jones > --- > v2: add more details in the output if a test fails, > report spurious interrupts if we get them > --- > arm/Makefile.common | 6 +- > arm/gic.c | 194 >

Re: [Qemu-devel] [kvm-unit-tests PATCH v3 09/10] arm/arm64: gicv3: add an IPI test

2016-09-01 Thread Auger Eric
Hi Drew, On 15/07/2016 15:00, Andrew Jones wrote: > Signed-off-by: Andrew Jones > > --- > v2: use IRM for gicv3 broadcast > --- > arm/gic.c | 157 > ++ > arm/unittests.cfg | 6 +++ > 2 files changed, 154

Re: [PATCH] KVM: Remove deprecated create_singlethread_workqueue

2016-09-01 Thread Paolo Bonzini
On 30/08/2016 19:59, Bhaktipriya Shridhar wrote: > The workqueue "irqfd_cleanup_wq" queues a single work item > >shutdown and hence doesn't require ordering. It is a host-wide > workqueue for issuing deferred shutdown requests aggregated from all > vm* instances. It is not being used on a memory

Re: [PATCH] arm64: KVM: VHE: reset PSTATE.PAN on entry to EL2

2016-09-01 Thread Marc Zyngier
On 01/09/16 15:29, Vladimir Murzin wrote: > SCTLR_EL2.SPAN bit controls what happens with the PSTATE.PAN bit on an > exception. However, this bit has no effect on the PSTATE.PAN when > HCR_EL2.E2H or HCR_EL2.TGE is unset. Thus when VHE is used and > exception taken from a guest PSTATE.PAN bit left

Re: [RFC PATCH 6/7] arm64: KVM: Handle trappable TLB instructions

2016-09-01 Thread Will Deacon
On Fri, Aug 26, 2016 at 10:37:08AM +0100, Punit Agrawal wrote: > > Will Deacon writes: > >> The easiest thing to do is just TLBI VMALLE1IS for all trapped operations, > >> but you might want to see how that performs. > > > > That sounds reasonable for correctness. But I

Re: [PATCH 3/5] arm64: KVM: vgic-v2: Add the GICV emulation infrastructure

2016-09-01 Thread Christoffer Dall
On Thu, Sep 01, 2016 at 03:28:36PM +0100, Marc Zyngier wrote: > On 01/09/16 13:46, Christoffer Dall wrote: > > On Fri, Aug 19, 2016 at 01:38:13PM +0100, Marc Zyngier wrote: > >> In order to efficiently perform the GICV access on behalf of the > >> guest, we need to be able to do avoid going back

Re: [PATCH 3/5] arm64: KVM: vgic-v2: Add the GICV emulation infrastructure

2016-09-01 Thread Peter Maydell
On 1 September 2016 at 15:28, Marc Zyngier wrote: > On 01/09/16 13:46, Christoffer Dall wrote: >> On Fri, Aug 19, 2016 at 01:38:13PM +0100, Marc Zyngier wrote: >>> +__skip_instr(vcpu); >> >> does this interact in any amusing way with single-step guest

[PATCH] arm64: KVM: VHE: reset PSTATE.PAN on entry to EL2

2016-09-01 Thread Vladimir Murzin
SCTLR_EL2.SPAN bit controls what happens with the PSTATE.PAN bit on an exception. However, this bit has no effect on the PSTATE.PAN when HCR_EL2.E2H or HCR_EL2.TGE is unset. Thus when VHE is used and exception taken from a guest PSTATE.PAN bit left unchanged and we continue with a value guest has

Re: [PATCH 3/5] arm64: KVM: vgic-v2: Add the GICV emulation infrastructure

2016-09-01 Thread Marc Zyngier
On 01/09/16 13:46, Christoffer Dall wrote: > On Fri, Aug 19, 2016 at 01:38:13PM +0100, Marc Zyngier wrote: >> In order to efficiently perform the GICV access on behalf of the >> guest, we need to be able to do avoid going back all the way to > > s/do// > >> the host kernel. >> >> For this, we

Re: [PATCH 0/2] arm{,64}/kvm: excise redundant cache maintenance

2016-09-01 Thread Christoffer Dall
On Tue, Aug 30, 2016 at 07:00:20PM +0100, Mark Rutland wrote: > On Tue, Aug 30, 2016 at 05:05:54PM +0100, Mark Rutland wrote: > > As noted in a jailhouse thread a short while ago [1,2], the presence of the > > virtualization extensions implies that page table walks are coherent, and do > > not

Re: [Qemu-devel] [kvm-unit-tests PATCH v3 07/10] arm/arm64: add initial gicv3 support

2016-09-01 Thread Auger Eric
Hi Drew, On 15/07/2016 15:00, Andrew Jones wrote: > Signed-off-by: Andrew Jones > > --- > v2: configure irqs as NS GRP1 > --- > lib/arm/asm/arch_gicv3.h | 184 ++ > lib/arm/asm/gic-v3.h | 321 > + >

Re: [Qemu-devel] [kvm-unit-tests PATCH v3 05/10] arm/arm64: irq enable/disable

2016-09-01 Thread Auger Eric
Hi, On 15/07/2016 15:00, Andrew Jones wrote: > Reviewed-by: Alex Bennée > Signed-off-by: Andrew Jones > --- > lib/arm/asm/processor.h | 10 ++ > lib/arm64/asm/processor.h | 10 ++ > 2 files changed, 20 insertions(+) > > diff --git

Re: [Qemu-devel] [kvm-unit-tests PATCH v3 04/10] arm/arm64: add some delay routines

2016-09-01 Thread Auger Eric
Hi Drew, On 15/07/2016 15:00, Andrew Jones wrote: > Allow a thread to wait some specified amount of time. Can > specify in cycles, usecs, and msecs. > > Reviewed-by: Alex Bennée > Signed-off-by: Andrew Jones > --- > lib/arm/asm/processor.h | 19