Re: [PATCH v4 3/4] arm64: Use __tlbi() macros in KVM code

On Wed, Jan 25, 2017 at 10:52:31AM -0500, Christopher Covington wrote: > Refactor the KVM code to use the __tlbi macros, which will allow an errata > workaround that repeats tlbi dsb sequences to only change one location. > This is not intended to change the generated assembly and comparing before

[PATCH v4 3/4] arm64: Use __tlbi() macros in KVM code

Refactor the KVM code to use the __tlbi macros, which will allow an errata workaround that repeats tlbi dsb sequences to only change one location. This is not intended to change the generated assembly and comparing before and after vmlinux objdump shows no functional changes. Signed-off-by:

[PATCH v4 1/4] arm64: Define Falkor v1 CPU

From: Shanker Donthineni Define the MIDR implementer and part number field values for the Qualcomm Datacenter Technologies Falkor processor version 1 in the usual manner. Signed-off-by: Shanker Donthineni Signed-off-by: Christopher Covington

[PATCH v4 2/4] arm64: Work around Falkor erratum 1003

The Qualcomm Datacenter Technologies Falkor v1 CPU may allocate TLB entries using an incorrect ASID when TTBRx_EL1 is being updated. When the erratum is triggered, page table entries using the new translation table base address (BADDR) will be allocated into the TLB using the old ASID. All

[PATCH 2/3] arm/arm64: KVM: Stop propagating cacheability status of a faulted page

Now that we unconditionally flush newly mapped pages to the PoC, there is no need to care about the "uncached" status of individual pages - they must all be visible all the way down. Signed-off-by: Marc Zyngier --- arch/arm/include/asm/kvm_mmu.h | 3 +--

[PATCH 1/3] arm/arm64: KVM: Enforce unconditional flush to PoC when mapping to stage-2

When we fault in a page, we flush it to the PoC (Point of Coherency) if the faulting vcpu has its own caches off, so that it can observe the page we just brought it. But if the vcpu has its caches on, we skip that step. Bad things happen when *another* vcpu tries to access that page with its own

[PATCH 3/3] arm/arm64: KVM: Get rid of KVM_MEMSLOT_INCOHERENT

KVM_MEMSLOT_INCOHERENT is not used anymore, as we've killed its only use in the arm/arm64 MMU code. Let's remove the last artifacts. Signed-off-by: Marc Zyngier --- arch/arm/kvm/mmu.c | 9 - include/linux/kvm_host.h | 1 - 2 files changed, 10 deletions(-)

[PATCH 0/3] Fix cache flushing when mapping at stage-2

When we fault in a page, we flush it to the PoC (Point of Coherency) if the faulting vcpu has its own caches off, so that it can observe the page we just brought it. But if the vcpu has its caches on, we skip that step. Bad things happen when *another* vcpu tries to access that page with its

Re: [PATCH v2] KVM: arm/arm64: vgic: Add debugfs vgic-state file

On Wed, Jan 25, 2017 at 01:38:40PM +0100, Christoffer Dall wrote: > On Wed, Jan 25, 2017 at 10:07:15AM +0100, Auger Eric wrote: > > Hi Christoffer, > > > > On 24/01/2017 14:25, Christoffer Dall wrote: > > > Add a file to debugfs to read the in-kernel state of the vgic. We don't > > > do any

Re: [PATCH v2] KVM: arm/arm64: vgic: Add debugfs vgic-state file

On Wed, Jan 25, 2017 at 10:07:15AM +0100, Auger Eric wrote: > Hi Christoffer, > > On 24/01/2017 14:25, Christoffer Dall wrote: > > Add a file to debugfs to read the in-kernel state of the vgic. We don't > > do any locking of the entire VGIC state while traversing all the IRQs, > > so if the VM

Re: [PATCH v2] KVM: arm/arm64: vgic: Add debugfs vgic-state file

Hi Christoffer, On 24/01/17 13:25, Christoffer Dall wrote: > Add a file to debugfs to read the in-kernel state of the vgic. We don't > do any locking of the entire VGIC state while traversing all the IRQs, > so if the VM is running the user/developer may not see a quiesced state, > but should

Re: [PATCH v2] KVM: arm/arm64: vgic: Add debugfs vgic-state file

Hi Christoffer, On 24/01/2017 14:25, Christoffer Dall wrote: > Add a file to debugfs to read the in-kernel state of the vgic. We don't > do any locking of the entire VGIC state while traversing all the IRQs, > so if the VM is running the user/developer may not see a quiesced state, > but should

Re: Booting a kernel to EL1 in Armv8.1

On Tue, Jan 24, 2017 at 09:50:04PM +, Raz wrote: > Hello > > I am trying to boot EL1 kernel in a platform based on Armv8.1. > I am using fvp as a hardware. > What I am trying to achieve is to execute some kernel code in > EL2 exception level.. When you boot a reasonably recent kernel on VHE,

Booting a kernel to EL1 in Armv8.1

Hello I am trying to boot EL1 kernel in a platform based on Armv8.1. I am using fvp as a hardware. What I am trying to achieve is to execute some kernel code in EL2 exception level.. The current VHE patch is booting the kernel into EL2. So I took an older kernel and I tried to set TTBR1_EL2 to