Hi Catalin,
On 09/08/17 18:25, Catalin Marinas wrote:
> On Fri, Jul 28, 2017 at 03:10:09PM +0100, James Morse wrote:
>> @@ -520,9 +514,16 @@ el1_preempt:
>> el0_sync:
>> kernel_entry 0
>> mrs x25, esr_el1// read the syndrome register
>> +mrs x26, far_el1
On 10/08/2017 16:45, Andrew Jones wrote:
> Rather than unconditionally attempting ptimer tests, which
> won't work on older KVM, check the KVM version first, reporting
> SKIP when the tests would fail. This also allows vtimer and
> ptimer tests to be merged into just "timer" tests.
>
>
Rather than unconditionally attempting ptimer tests, which
won't work on older KVM, check the KVM version first, reporting
SKIP when the tests would fail. This also allows vtimer and
ptimer tests to be merged into just "timer" tests.
Signed-off-by: Andrew Jones
---
* Ard Biesheuvel [170810 02:23]:
> On 9 August 2017 at 22:05, Tony Lindgren wrote:
> > * Ard Biesheuvel [170809 12:24]:
> >> On 9 August 2017 at 20:05, Tony Lindgren wrote:
> >> > * Ard Biesheuvel
KVM calls __kvm_vcpu_run() in a loop with interrupts masked for the
duration of the call. On a non-vhe system we HVC to EL2 and the
host DAIF flags are save/restored via the SPSR.
On a system with vhe, we branch to the EL2 code because the kernel
also runs at EL2. This means the other kernel DAIF
On 9 August 2017 at 22:05, Tony Lindgren wrote:
> * Ard Biesheuvel [170809 12:24]:
>> On 9 August 2017 at 20:05, Tony Lindgren wrote:
>> > * Ard Biesheuvel [170805 13:54]:
>> >> This replaces a couple of
On Thu, Aug 10, 2017 at 12:33:08PM +0530, Kalra, Ashish wrote:
>
> Just realized that KVM/ARM now supports EL1 physical timer emulation
> for guests and had a look at the patch set that enables VMs to use the EL1
> physical timer through trap-and-emulate for arm64. I am using an
> older KVM
Just realized that KVM/ARM now supports EL1 physical timer emulation
for guests and had a look at the patch set that enables VMs to use the
EL1 physical timer through trap-and-emulate for arm64. I am using an
older KVM release which is causing guest termination on physical
timer access.