>> >Hi,
>> >
>> >On Wed, Nov 21, 2018 at 04:56:54PM +0800, peng.h...@zte.com.cn wrote:
>> >> >On 19/11/2018 09:10, Mark Rutland wrote:
>> >> >> On Sat, Nov 17, 2018 at 10:58:37AM +0800, peng.h...@zte.com.cn wrote:
>> >> On 16/11/18 00:23, peng.h...@zte.com.cn wrote:
>> >> >> Hi,
>> >>
On Thu, Nov 22, 2018 at 07:37:59PM +, Jean-Philippe Brucker wrote:
> The virtio IOMMU is a para-virtualized device, allowing to send IOMMU
> requests such as map/unmap over virtio transport without emulating page
> tables. This implementation handles ATTACH, DETACH, MAP and UNMAP
> requests.
>
On Thu, Nov 22, 2018 at 07:37:59PM +, Jean-Philippe Brucker wrote:
> The virtio IOMMU is a para-virtualized device, allowing to send IOMMU
> requests such as map/unmap over virtio transport without emulating page
> tables. This implementation handles ATTACH, DETACH, MAP and UNMAP
> requests.
>
On Thu, Nov 22, 2018 at 07:37:59PM +, Jean-Philippe Brucker wrote:
> The virtio IOMMU is a para-virtualized device, allowing to send IOMMU
> requests such as map/unmap over virtio transport without emulating page
> tables. This implementation handles ATTACH, DETACH, MAP and UNMAP
> requests.
>
We are soon going to play with TCR_EL1.EPD{0,1}, so let's add the
relevant definitions.
Signed-off-by: Marc Zyngier
---
arch/arm64/include/asm/pgtable-hwdef.h | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm64/include/asm/pgtable-hwdef.h
b/arch/arm64/include/asm/pgtable-hwdef.h
An SVE system is so far the only case where we mandate VHE. As we're
starting to grow this requirements, let's slightly rework the way we
deal with that situation, allowing for easy extension of this check.
Signed-off-by: Marc Zyngier
---
arch/arm/include/asm/kvm_host.h | 2 +-
In order to ensure that slipping HCR_EL2.TGE is done at the right
time when switching translation regime, let insert the required ISBs
that will be patched in when erratum 1165522 is detected.
Signed-off-by: Marc Zyngier
---
arch/arm64/include/asm/kvm_hyp.h | 7 +++
In order to avoid TLB corruption whilst invalidating TLBs on CPUs
affected by erratum 1165522, we need to prevent S1 page tables
from being usable.
For this, we set the EL1 S1 MMU on, and also disable the page table
walker (by setting the TCR_EL1.EPD* bits to 1).
This ensures that once we switch
Early Cortex-A76 suffer from an erratum that can result in invalid
TLBs when the CPU speculatively executes an AT instruction in the
middle of a guest world switch, while the guest virtual memory
configuration is in an inconsistent state.
We handle this issue by mandating the use of VHE and
Contrary to the non-VHE version of the TLB invalidation helpers, the VHE
code has interrupts enabled, meaning that we can take an interrupt in
the middle of such a sequence, and start running something else with
HCR_EL2.TGE cleared.
That's really not a good idea.
Take the heavy-handed option
In order to easily mitigate ARM erratum 1165522, we need to force
affected CPUs to run in VHE mode if using KVM.
Signed-off-by: Marc Zyngier
---
arch/arm64/include/asm/cpucaps.h | 3 ++-
arch/arm64/include/asm/kvm_host.h | 4
arch/arm64/kernel/cpu_errata.c| 8
3 files
It is a bit odd that we only install stage-2 translation after having
cleared HCR_EL2.TGE, which means that there is a window during which
AT requests could fail as stage-2 is not configured yet.
Let's move stage-2 configuration before we clear TGE, making the
guest entry sequence clearer: we
Now that the infrastructure to handle erratum 1165522 is in place,
let's make it a selectable option and add the required documentation.
Signed-off-by: Marc Zyngier
---
Documentation/arm64/silicon-errata.txt | 1 +
arch/arm64/Kconfig | 12
2 files changed, 13
On Thu, Nov 22, 2018 at 02:07:18PM +0100, Christoffer Dall wrote:
> On Thu, Nov 22, 2018 at 01:32:37PM +0100, Dave P Martin wrote:
> > On Thu, Nov 22, 2018 at 11:27:53AM +, Alex Bennée wrote:
> > >
> > > Christoffer Dall writes:
> > >
> > > > [Adding Peter and Alex for their view on the
Hi Jan,
On 23/11/2018 12:29, James Morse wrote:
> On 23/11/2018 09:36, Jan Bolke wrote:
>> I am using the Kvm Api and try to integrate it as an instruction set
>> simulator
>> in a SystemC environment.
>
>
>> I need some mechanism to count executed instructions in the guest (or
>> cycles).
>>
On Fri, Nov 23, 2018 at 12:29:08PM +, James Morse wrote:
> Hi Jan,
>
> (CC: +Andrew)
>
> On 23/11/2018 09:36, Jan Bolke wrote:
> > I am not sure if this question is well-placed here, so sorry if it misses
> > the
> > purpose of this mailing list.
>
> arm64? kvm? Sounds like you've come to
Hi Jan,
(CC: +Andrew)
On 23/11/2018 09:36, Jan Bolke wrote:
> I am not sure if this question is well-placed here, so sorry if it misses the
> purpose of this mailing list.
arm64? kvm? Sounds like you've come to the right place!
> I am using the Kvm Api and try to integrate it as an
Hi,
I am not sure if this question is well-placed here, so sorry if it misses the
purpose of this mailing list.
My name is Jan and i am currently writing my master's thesis.
I am using the Kvm Api and try to integrate it as an instruction set simulator
in a SystemC environment.
Anyway,
I
On Fri, Nov 23, 2018 at 02:01:56PM +0800, peng.h...@zte.com.cn wrote:
> >Hi,
> >
> >On Wed, Nov 21, 2018 at 04:56:54PM +0800, peng.h...@zte.com.cn wrote:
> >> >On 19/11/2018 09:10, Mark Rutland wrote:
> >> >> On Sat, Nov 17, 2018 at 10:58:37AM +0800, peng.h...@zte.com.cn wrote:
> >> On
Hi Jean,
On 11/22/18 8:37 PM, Jean-Philippe Brucker wrote:
> Implement the virtio-iommu driver, following specification v0.9 [1].
>
> Since v4 [2] I fixed the issues reported by Eric, and added Reviewed-by
> from Eric and Rob. Thanks!
>
> I changed the specification to fix one inconsistency
Hi Jean,
On 11/22/18 8:37 PM, Jean-Philippe Brucker wrote:
> The virtio IOMMU is a para-virtualized device, allowing to send IOMMU
> requests such as map/unmap over virtio transport without emulating page
> tables. This implementation handles ATTACH, DETACH, MAP and UNMAP
> requests.
>
> The
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